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Cyclone III Device Handbook
Volume 2
101 Innovation DriveSan Jose, CA http://www.77cn.com.cnCIII5V2-4.0
2011
Document last updated for Altera Complete Design Suite version:
Document publication date:
11.1
December 2011
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logosare trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
ISO trademarks or service marks are the property of their respective holders as described at http://www.77cn.com.cn/common/legal.html. Altera warrants performance of its
semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and9001:2008 services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or serviceRegistereddescribed herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relyingon any published information and before placing orders for products or services.
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
Contents
Chapter Revision Dates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vChapter1.Cyclone III Device Data Sheet
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–5I/O Standard Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–10Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–14Switching Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–14Core Performance Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–14Clock Tree Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–14PLL Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–15Embedded Multiplier Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–16Memory Block Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–16Configuration and JTAG Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–16Periphery Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17High-Speed I/O Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–18External Memory Interface Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–22Duty Cycle Distortion Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–25OCT Calibration Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–25IOE Programmable Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–25I/O Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–26Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–27Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–32
Chapter2.CycloneIII LS Device Data Sheet
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4I/O Standard Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–10Power Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–13Switching Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–14Core Performance Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–14Clock Tree Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–14PLL Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–15Embedded Multiplier Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–16Memory Block Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–16Configuration and JTAG Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–17Periphery Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–17High-Speed I/O Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–18External Memory Interface Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–22Duty Cycle Distortion Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–24OCT Calibration Timing Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–25IOE Programmable Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–25
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
ivContents
I/O Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–26Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–26Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–32
Additional Information
How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter Revision Dates
The chapters in this document, Cyclone III Device Handbook, were revised on the following dates. Where chapters or groups of chapters are available separately, part numbers are listed.
Chapter1.
Cyclone III Device Data SheetRevised:December 2011Part Number:CIII52001-3.4Chapter2.
CycloneIII LS Device Data SheetRevised:December 2011Part Number:CIII52002-1.3
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
viCyclone III Device HandbookVolume 2
Chapter Revision Dates
December 2011Altera Corporation
1.Cyclone III Device Data Sheet
CIII52001-3.4
This chapter describes the electric characteristics, switching characteristics, and I/O timing for Cyclone®III devices. A glossary is also included for your reference.
Electrical Characteristics
The following sections provide information about the absolute maximum ratings, recommended operating conditions, DC characteristics, and other specifications for CycloneIII devices.
Operating Conditions
When Cyclone III devices are implemented in a system, they are rated according to a set of defined parameters. To maintain the highest possible performance and reliability of Cyclone III devices, system designers must consider the operating requirements in this document. Cyclone III devices are offered in commercial,
industrial, and automotive grades. Commercial devices are offered in –6(fastest), –7, and –8 speed grades. Industrial and automotive devices are offered only in –7 speed grade.
1
In this chapter, a prefix associated with the operating temperature range is attached to the speed grades; commercial with “C” prefix, industrial with “I” prefix, and
automotive with “A” prefix. Commercial devices are therefore indicated as C6, C7, and C8 per respective speed grades. Industrial and automotive devices are indicated as I7 and A7, respectively.
Absolute Maximum Ratings
Absolute maximum ratings define the maximum operating conditions for Cyclone III devices. The values are based on experiments conducted with the device and theoretical modeling of breakdown and damage mechanisms. The functional
operation of the device is not implied at these conditions. Table1–1 lists the absolute maximum ratings for Cyclone III devices.
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
ISO trademarks or service marks are the property of their respective holders as described at http://www.77cn.com.cn/common/legal.html. Altera warrants performance of its
9001:2008 semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and
Registeredservices at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service
described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
Cyclone III Device HandbookVolume 2
December 2011
Subscribe
1–2
Chapter 1:Cyclone III Device Data Sheet
Electrical Characteristics
1
Conditions beyond those listed in Table1–1 cause permanent damage to the device. Additionally, device operation at the absolute maximum ratings for extended periods of time has adverse effects on the device.
Table1–1.Cyclone III Devices Absolute Maximum Ratings (1)SymbolVCCINTVCCIOVCCAVCCD_PLLVIIOUTVESDHBMVESDCDMTSTGTJ
Parameter
Supply voltage for internal logicSupply voltage for output buffers
Supply voltage (analog) for phase-locked loop (PLL) regulator
Supply voltage (digital) for PLLDC input voltageDC output current, per pin
Electrostatic discharge voltage using the human body model
Electrostatic discharge voltage using the charged device modelStorage temperature
Operating junction temperature
Min–0.5–0.5–0.5–0.5–0.5–25— —–65–40
Max1.83.93.751.83.9540 ±2000±500150125
UnitVVVVVmAVV°C°C
Note to Table1–1:
(1)Supply voltage specifications apply to voltage readings taken at the device pins with respect to ground, not at the
power supply.
Maximum Allowed Overshoot or Undershoot Voltage
During transitions, input signals may overshoot to the voltage listed in Table1–2 and undershoot to –2.0 V for a magnitude of currents less than 100mA and for periods shorter than 20ns. Table1–2 lists the maximum allowed input overshoot voltage and the duration of the overshoot voltage as a percentage over the lifetime of the device. The maximum allowed overshoot duration is specified as percentage of high-time over the lifetime of the device.
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter 1:Cyclone III Device Data SheetElectrical Characteristics
1–3
1
A DC signal is equivalent to 100% duty cycle. For example, a signal that overshoots to 4.2 V can only be at 4.2 V for 10.74% over the lifetime of the device; for device lifetime of 10 years, this amounts to 10.74/10ths of a year.
Table1–2.Cyclone III Devices Maximum Allowed Overshoot During Transitions over a 10-Year Time Frame(1)Symbol
Parameter
ConditionVI = 3.95 VVI = 4.0 VV
I = 4.05 VVI = 4.10 VVI = 4.15 VVI = 4.20 V
Vi
AC Input Voltage
VI = 4.25 VVI = 4.30 VVI = 4.35 VVI = 4.40 VVI = 4.45 VVI = 4.50 VVI = 4.60 VVI = 4.70 V
Note to Table1–2:
(1)Figure1–1 shows the methodology to determine the overshoot duration. In the example in Figure1–1, overshoot
voltage is shown in red and is present on the input pin of the Cyclone III device at over 4.1V but below 4.2V. From Table1–1, for an overshoot of 4.1V, the percentage of high time for the overshoot can be as high as 31.97% over a 10-year period. Percentage of high time is calculated as ([delta T]/T)×100. This 10-year period assumes the device is always turned on with 100% I/O toggle rate and 50% duty cycle signal. For lower I/O toggle rates and situations in which the device is in an idle state, lifetimes are increased.
Overshoot Duration as % of High Time
10095.6755.2431.9718.5210.746.233.622.11.220.710.410.140.047
Unit%%%%%%%%%%%%%%
Figure1–1 shows the methodology to determine the overshoot duration.Figure1–1.Cyclone III Devices Overshoot Duration
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
1–4
Chapter 1:Cyclone III Device Data Sheet
Electrical Characteristics
Recommended Operating Conditions
This section lists the functional operation limits for AC and DC parameters for Cyclone III devices. The steady-state voltage and current values expected from
Cyclone III devices are provided in Table1–3. All supplies must be strictly monotonic without plateaus.
Table1–3.Cyclone III Devices Recommended Operating Conditions
SymbolVCCINT (3)
Parameter
Supply voltage for internal logicSupply voltage for output buffers, 3.3-V operation
Supply voltage for output buffers, 3.0-V operation
Supply voltage for output buffers, 2.5-V operation
Supply voltage for output buffers, 1.8-V operation
Supply voltage for output buffers, 1.5-V operation
Supply voltage for output buffers, 1.2-V operation
VCCA (3)VCCD_PLL (3)VIVO
Supply (analog) voltage for PLL regulator
Supply (digital) voltage for PLLInput voltageOutput voltage
(1), (2)
Conditions
———————————
For commercial useFor industrial useFor extended temperatureFor automotive useStandard power-on reset
(POR) (5)
Fast POR (6)
Min1.153.1352.852.3751.711.4251.142.3751.15–0.500–40–40–4050 µs50 µs—
Typ1.23.332.51.81.51.22.51.2—————————
Max1.253.4653.152.6251.891.5751.262.6251.253.6VCCIO8510012512550 ms3 ms10
UnitVVVVVVVVVVV°C°C°C°C——mA
VCCIO (3), (4)
TJ
Operating junction temperature
tRAMPIDiode
Power supply ramp timeMagnitude of DC current across PCI-clamp diode when enabled
—
Notes to Table1–3:
(1)VCCIO for all I/O banks must be powered up during device operation. All VCCA pins must be powered to 2.5 V (even when PLLs are not used), and
must be powered up and powered down at the same time.(2)VCCD_PLL must always be connected to VCCINT through a decoupling capacitor and ferrite bead.(3)The VCC must rise monotonically.
(4)All input buffers are powered by the VCCIO supply.
(5)POR time for Standard POR ranges between 50–200 ms. Each individual power supply should reach the recommended operating range within
50 ms.(6)POR time for Fast POR ranges between 3–9 ms. Each individual power supply should reach the recommended operating range within 3 ms.
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter 1:Cyclone III Device Data SheetElectrical Characteristics
1–5
DC Characteristics
This section lists the I/O leakage current, pin capacitance, on-chip termination (OCT) tolerance, and bus hold specifications for Cyclone III devices.Supply Current
Standby current is the current the device draws after the device is configured with no inputs or outputs toggling and no activity in the device. Use the Excel-based early power estimator (EPE) to get the supply current estimates for your design because these currents vary largely with the resources used. Table1–4 lists I/O pin leakage current for Cyclone III devices.
fFor more information about power estimation tools, refer to the PowerPlay Early Power
Estimator User Guide and the PowerPlay Power Analysis chapter in the QuartusII Handbook.
Table1–4.Cyclone III Devices I/O Pin Leakage Current(1), (2)SymbolIIIOZ
Parameter
Input pin leakage currentTristated I/O pin leakage current
ConditionsVI = 0V to VCCIOMAXVO = 0V to VCCIOMAX
Min–10–10
Typ——
Max1010
UnitμAμA
Notes to Table1–4:
(1)This value is specified for normal device operation. The value varies during device power-up. This applies for all
VCCIO settings (3.3, 3.0, 2.5, 1.8, 1.5, and 1.2 V).(2)10 μA I/O leakage current limit is applicable when the internal clamping diode is off. A higher current can be the
observed when the diode is on.
Bus Hold
Bus hold retains the last valid logic state after the source driving it either enters the high impedance state or is removed. Each I/O pin has an option to enable bus hold in user mode. Bus hold is always disabled in configuration mode.Table1–5 lists bus hold specifications for CycloneIII devices.
Table1–5.Cyclone III Devices Bus Hold Parameter
(Part 1 of 2)
(1)
VCCIO (V)
Parameter
Condition
Min
Bus-hold low,
sustaining currentBus-hold high,
sustaining current
VIN > VIL (maximum)
1.2Max
Min
1.5Max
Min
1.8Max
Min
2.5Max
3.0Min
Max
3.3Min
Max
Unit
8—12—30—50—70—70—μA
VIN < VIL (minimum)
–8—–12—–30—–50—–70—–70—μA
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
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Chapter 1:Cyclone III Device Data Sheet
Electrical Characteristics
Table1–5.Cyclone III Devices Bus Hold Parameter(Part 2 of 2)
(1)
VCCIO (V)
Parameter
Condition
Min
Bus-hold low,
overdrive currentBus-hold high, overdrive currentBus-hold trip point
Note to Table1–5:
(1)The bus-hold trip points are based on calculated input voltages from the JEDEC standard.
1.2Max
Min
1.5Max
Min
1.8Max
Min
2.5Max
3.0Min
Max
3.3Min
Max
Unit
0 V < VIN < VCCIO
—125—175—200—300—500—500μA
0 V < VIN < VCCIO
—–125—–175—–200—–300—–500—–500μA
—0.30.90.3751.1250.681.070.71.70.820.82V
OCT Specifications
Table1–6 lists the variation of OCT without calibration across process, temperature, and voltage.
Table1–6.Cyclone III Devices Series OCT without Calibration Specifications
Resistance Tolerance
Description
VCCIO (V)3.0
Series OCT without calibration
2.51.81.51.2
Commercial
Max
±30±30+40+50+50
Industrial and Automotive
Max
±40±40±50±50±50
Unit%%%%%
OCT calibration is automatically performed at device power-up for OCT enabled I/Os.
Table1–7 lists the OCT calibration accuracy at device power-up.
Table1–7.Cyclone III Devices Series OCT with Calibration at Device Power-Up Specifications
Calibration Accuracy
Description
VCCIO (V)3.0
Series OCT with calibration at device power-up
2.51.81.51.2
Commercial Max
±10±10±10±10±10
Industrial and Automotive
Max
±10±10±10±10±10
Unit%%%%%
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter 1:Cyclone III Device Data SheetElectrical Characteristics
1–7
The OCT resistance may vary with the variation of temperature and voltage after calibration at device power-up. Use Table1–8 and Equation1–1 to determine the final OCT resistance considering the variations after calibration at device power-up. Table1–8 lists the change percentage of the OCT resistance with voltage and temperature.
Table1–8.Cyclone III Devices OCT Variation After Calibration at Device Power-Up
Nominal Voltage
3.02.51.81.51.2
Equation1–1.
(1), (2), (3), (4), (5), (6)
(7)
dR/dT (%/°C)0.2620.2340.2190.1990.161
dR/dV (%/mV)–0.026–0.039–0.086–0.136–0.288
ΔRV = (V2 – V1) × 1000 × dR/dVΔRT = (T2 – T1) × dR/dT
(8)
For ΔRx < 0; MFx = 1/ (|ΔRx|/100 + 1)For ΔRx > 0; MFx = ΔRx/100 + 1MF = MFV × MFT
(11)(12)
(9)
(10)
Rfinal = Rinitial × MF
Notes to Equation1–1:
(1)T2 is the final temperature. (2)T1 is the initial temperature. (3)MF is multiplication factor. (4)Rfinal is final resistance. (5)Rinitial is initial resistance. (6)Subscript × refers to both V and T.(7)ΔRV is variation of resistance with voltage. (8)ΔRT is variation of resistance with temperature.
(9)dR/dT is the change percentage of resistance with temperature after calibration at device power-up. (10)dR/dV is the change percentage of resistance with voltage after calibration at device power-up. (11)V2 is final voltage. (12)V1 is the initial voltage.
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
1–8
Chapter 1:Cyclone III Device Data Sheet
Electrical Characteristics
Example1–1 shows you the example to calculate the change of 50 Ω I/O impedance from 25°C at 3.0 V to 85°C at 3.15 V:Example1–1.
ΔRV = (3.15 – 3) × 1000 × –0.026 = –3.83ΔRT = (85 – 25) × 0.262 = 15.72Because ΔRV is negative,
MFV = 1 / (3.83/100 + 1) = 0.963Because ΔRT is positive,
MFT = 15.72/100 + 1 = 1.157MF = 0.963 × 1.157 = 1.114Rfinal = 50 × 1.114 = 55.71 Ω
Pin Capacitance
Table1–9 lists the pin capacitance for CycloneIII devices.Table1–9.Cyclone III Devices Pin CapacitanceSymbolCIOTBCIOLRCLVDSLRCVREFLR
(1)
Parameter
Input capacitance on top/bottom I/O pinsInput capacitance on left/right I/O pins
Input capacitance on left/right I/O pins with dedicated LVDS output
Input capacitance on left/right dual-purpose VREF pin when used as VREF or user I/O pin
Input capacitance on top/bottom dual-purpose VREF pin when used as VREF or user I/O pin
Input capacitance on top/bottom dedicated clock input pins
Input capacitance on left/right dedicated clock input pins
Typical – QFP
778
Typical – FBGA
657
UnitpFpFpFpFpFpFpF
23 (2)76
23 (2)65
CVREFTB
(1)
CCLKTBCCLKLR
Notes to Table1–9:
(1)When VREF pin is used as regular input or output, a reduced performance of toggle rate and tCO is expected due to
higher pin capacitance.(2)CVREFTB for EP3C25 is 30pF.
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter 1:Cyclone III Device Data SheetElectrical Characteristics
1–9
Internal Weak Pull-Up and Weak Pull-Down Resistor
Table1–10 lists the weak pull-up and pull-down resistor values for Cyclone III devices.
Table1–10.Cyclone III Devices Internal Weak Pull-Up and Weak Pull-Down ResistorSymbol
Parameter
Conditions
VCCIO = 3.3 V ± 5% (2), (3)
V = 3.0 V ± 5% (2), (3)
Value of I/O pin pull-up resistor before CCIO
(2),(3)
and during configuration, as well as VCCIO = 2.5 V ± 5% user mode if the programmable VCCIO = 1.8 V ± 5% (2), (3)pull-up resistor option is enabled
VCCIO = 1.5 V ± 5% (2), (3)
VCCIO = 1.2 V ± 5% (2), (3)VCCIO = 3.3 V ± 5% (4)
R_PD
Value of I/O pin pull-down resistor before and during configuration
VCCIO = 3.0 V ± 5% (4)VCCIO = 2.5 V ± 5% (4)VCCIO = 1.8 V ± 5% (4)VCCIO = 1.5 V ± 5% (4)
Notes to Table1–10:
(1)All I/O pins have an option to enable weak pull-up except configuration, test, and JTAG pin. Weak pull-down feature is only available for JTAG
TCK.(2)Pin pull-up resistance values may be lower if an external source drives the pin higher than VCCIO.
(3)R_PU = (VCCIO–VI)/IR_PU
Minimum condition: –40°C; VCCIO = VCC + 5%, VI = VCC + 5% – 50mV;Typical condition: 25°C; VCCIO = VCC, VI = 0V;
Maximum condition: 125°C; VCCIO = VCC – 5%, VI = 0V; in which VI refers to the input voltage at the I/O pin.(4)R_PD = VI/IR_PD
Minimum condition: –40°C; VCCIO = VCC + 5%, VI = 50mV;Typical condition: 25°C; VCCIO = VCC, VI = VCC–5%;
Maximum condition: 125°C; VCCIO = VCC – 5%, VI = VCC–5%; in which VI refers to the input voltage at the I/O pin.
(1)
Min77810131966678
Typ25283557821431922253550
Max41476110816335130364371112
UnitkΩkΩkΩkΩkΩkΩkΩkΩkΩkΩkΩ
R_PU
Hot Socketing
Table1–11 lists the hot-socketing specifications for CycloneIII devices.Table1–11.Cyclone III Devices Hot-Socketing Specifications
SymbolIIOPIN(DC)IIOPIN(AC)
Note to Table1–11:
(1)The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN|=C
dv/dt, in which C is I/O pin capacitance and dv/dt is the slew rate.
ParameterDC current per I/O pinAC current per I/O pin
Maximum300 μA8 mA (1)
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
1–10
Chapter 1:Cyclone III Device Data Sheet
Electrical Characteristics
Schmitt Trigger Input
CycloneIII devices support Schmitt trigger input on TDI, TMS, TCK, nSTATUS, nCONFIG, nCE, CONF_DONE, and DCLK pins. A Schmitt trigger feature introduces hysteresis to the input signal for improved noise immunity, especially for signal with slow edge rate. Table1–12 lists the hysteresis specifications across supported VCCIO range for Schmitt trigger inputs in CycloneIII devices.
Table1–12.Hysteresis Specifications for Schmitt Trigger Input in Cyclone III Devices
Symbol
Parameter
ConditionsVCCIO=3.3 V
VSCHMITT
Hysteresis for Schmitt trigger input
VCCIO=2.5 VVCCIO=1.8 VVCCIO=1.5 V
Minimum200200140110
Typical————
Maximum————
UnitmVmVmVmV
I/O Standard Specifications
The following tables list input voltage sensitivities (VIH and VIL), output voltage (VOH and VOL), and current drive characteristics (IOH and IOL) for various I/O standards supported by Cyclone III devices. Table1–13 through Table1–18 provide the I/O standard specifications for Cyclone III devices.
Table1–13.Cyclone III Devices Single-Ended I/O Standard Specifications
I/O Standard3.3-V LVTTL (3)3.3-V LVCMOS (3)3.0-V LVTTL (3)3.0-V LVCMOS (3)2.5-V LVTTL and LVCMOS (3)1.8-V LVTTL and LVCMOS1.5-V LVCMOS1.2-V LVCMOS3.0-V PCI 3.0-V PCI-X
Notes to Table1–13:
(1)For voltage referenced receiver input waveform and explanation of terms used in Table1–13, refer to “Single-ended Voltage referenced I/O Standard”
in “Glossary” on page1–27.(2)AC load CL = 10 pF.
(3)For more detail about interfacing Cyclone III devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O standards, refer to AN447: Interfacing CycloneIII
Devices with 3.3/3.0/2.5-V LVTTL and LVCMOS I/O Systems.
(1), (2)
VCCIO (V)Min3.1353.1352.852.852.3751.711.4251.142.852.85
Typ3.33.33.03.02.51.81.51.23.03.0
Max3.4653.4653.153.152.6251.891.5751.263.153.15
VIL (V)Min——–0.3–0.3–0.3–0.3–0.3–0.3——
Max0.80.80.80.80.70.35 * VCCIO0.35 * VCCIO0.35 * VCCIO0.3 * VCCIO0.35* VCCIO
Min1.71.71.71.71.7
VIH (V)
Max3.63.6VCCIO + 0.3VCCIO + 0.33.62.25
VOL OH (V)Max0.450.20.450.20.40.450.25 * VCCIO0.25 * VCCIO
Min2.4VCCIO – 0.22.4VCCIO – 0.22.0VCCIO – 0.450.75 * VCCIO0.75 * VCCIO0.9 * VCCIO0.9 * VCCIO
IOL(mA) 4240.112221.51.5
IOH(mA) –4–2–4–0.1–1–2–2–2–0.5–0.5
0.65 * VCCIO
0.65 *
VCCIO + 0.3
VCCIO
0.65 *
VCCIO + 0.3
VCCIO0.5 * VCCIO0.5 * VCCIO
VCCIO + 0.30.1 * VCCIOVCCIO + 0.30.1 * VCCIO
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter 1:Cyclone III Device Data SheetElectrical Characteristics
1–11
Table1–14.Cyclone III Devices Single-Ended SSTL and HSTL I/O Reference Voltage SpecificationsI/O StandardSSTL-2 Class I, IISSTL-18 Class I, IIHSTL-18 Class I, IIHSTL-15 Class I, IIHSTL-12 Class I, II
VCCIO (V)Min2.3751.71.711.4251.14
Typ2.51.81.81.51.2
Max2.6251.91.891.5751.26
Min1.190.8330.850.710.48 * VCCIO (3)0.47 * VCCIO (4)
VREF (V)Typ1.250.90.90.750.5 * VCCIO (3)0.5 * VCCIO (4)
Max1.310.9690.950.790.52 * VCCIO (3)0.53 * VCCIO (4)
MinVREF – 0.04VREF – 0.040.850.71—
(1)
VTT (V) (2)
TypVREFVREF0.90.750.5 * VCCIO
MaxVREF + 0.04VREF + 0.040.950.79—
Notes to Table1–14:
(1)For an explanation of terms used in Table1–14, refer to “Glossary” on page1–27. (2)VTT of transmitting device must track VREF of the receiving device.(3)Value shown refers to DC input reference voltage, VREF(DC).(4)Value shown refers to AC input reference voltage, VREF(AC).
Table1–15.Cyclone III Devices Single-Ended SSTL and HSTL I/O Standards Signal Specifications I/O StandardSSTL-2 Class ISSTL-2 Class IISSTL-18 Class ISSTL-18 Class IIHSTL-18 Class IHSTL-18 Class IIHSTL-15 Class IHSTL-15 Class II
VIL(DC) (V)Min————————
MaxVREF – 0.18VREF – 0.18VREF – 0.125VREF – 0.125VREF – 0.1VREF – 0.1VREF – 0.1VREF – 0.1VREF – 0.08VREF – 0.08
MinVREF + 0.18VREF + 0.18VREF + 0.125VREF + 0.125VREF + 0.1VREF + 0.1VREF + 0.1VREF + 0.1
VIH(DC) (V)
Max————————
VIL(AC) (V)Min————————
MaxVREF – 0.35VREF – 0.35VREF – 0.25VREF – 0.25VREF – 0.2VREF – 0.2VREF – 0.2VREF – 0.2VREF – 0.15VREF – 0.15
MinVREF + 0.35VREF + 0.35VREF + 0.25VREF + 0.25VREF + 0.2VREF + 0.2VREF + 0.2VREF + 0.2VREF + 0.15VREF + 0.15
VIH(AC) (V)
Max————————VCCIO + 0.24VCCIO + 0.24
VOL (V)MaxVTT – 0.57VTT – 0.76VTT – 0.4750.280.40.40.40.40.25 × VCCIO0.25 × VCCIO
VOH (V)MinVTT + 0.57 VTT + 0.76 VTT + 0.475VCCIO – 0.28VCCIO – 0.4VCCIO – 0.4VCCIO – 0.4VCCIO – 0.40.75 × VCCIO0.75 × VCCIO
IOL (mA)8.116.46.713.4816816814
IOH (mA)–8.1–16.4–6.7–13.4–8–16–8–16–8–14
HSTL-12
–0.15
Class I HSTL-12
–0.15
Class II
VREF +
VCCIO + 0.15–0.24
0.08
VREF +
VCCIO + 0.15–0.24
0.08
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
1–12
Chapter 1:Cyclone III Device Data Sheet
Electrical Characteristics
fFor more illustrations of receiver input and transmitter output waveforms, and for
other differential I/O standards, refer to the High-Speed Differential Interfaces in CycloneIII Devices chapter.
Table1–16.Cyclone III Devices Differential SSTL I/O Standard Specifications(1)I/O Standard
Min
SSTL-2 Class I, IISSTL-18 Class I, II
2.3751.7
VCCIO (V)Typ2.51.8
Max
VSwing(DC) (V)Min
Max
Min
VX(AC) (V)
Typ——
MaxVCCIO/2 + 0.2VCCIO/2 + 0.175
VSwing(AC)
(V)MinMax0.70.5
VCCI
O
VOX(AC) (V)MinVCCIO/2 – 0.125VCCIO/2 – 0.125
Typ——
MaxVCCIO/2 + 0.125VCCIO/2 + 0.125
2.6250.36VCCIOVCCIO/2 – 0.21.90
0.25VCCIO
VCCIO/2 – 0.175
VCCI
O
Note to Table1–16:
(1)Differential SSTL requires a VREF input.
Table1–17.Cyclone III Devices Differential HSTL I/O Standard Specifications(1)
VCCIO (V)
I/O StandardHSTL-18 Class I, IIHSTL-15 Class I, IIHSTL-12 Class I, II
Min1.711.4251.14
Typ1.81.51.2
Max1.891.5751.26
VDIF(DC) (V)Min0.20.20.16
Max——VCCIO
Min0.850.710.48 * VCCIO
VX(AC) (V)Typ———
Max0.950.790.52 * VCCIO
Min0.850.710.48 * VCCIO
VCM(DC) (V)Typ———
Max0.950.790.52 * VCCIO
VDIF(AC) (V)Min0.40.40.3
Max——0.48 * VCCIO
Note to Table1–17:
(1)Differential HSTL requires a VREF input.
Table1–18.Cyclone III Devices Differential I/O Standard SpecificationsI/O StandardLVPECL (Row I/Os)
(4)
(1)
(Part 1 of 2)
VOD (mV) (3)
MaxMinTyp1.801.801.551.801.801.551.801.802471.55
—
600
1.1251.251.375
—
—
—
—
—
—
—
—
—
—
—
—
Max
Min
VOS (V) (3)
Typ
Max
VCCIO (V)Min
Typ
Max
VID (mV)Min
Max
Min
VIcM (V)
(2)
Condition500 Mbps ≤ DMAX ≤ 700 Mbps
0.05DMAX ≤ 500 Mbps
2.375
2.5
2.625
100
—
0.55
1.05DMAX > 700 Mbps
LVPECL (Column I/Os) (4)
0.05DMAX ≤ 500Mbps
2.375
2.5
2.625
100
—
0.55
500Mbps ≤ DMAX ≤ 700Mbps
1.05DMAX > 700Mbps0.05DMAX ≤ 500Mbps
500Mbps ≤ DMAX ≤ 700Mbps
LVDS (Row
2.375
I/Os)
2.52.625100—0.55
1.05DMAX > 700Mbps
Cyclone III Device HandbookVolume 2
December 2011Altera Corporation
Chapter 1:Cyclone III Device Data SheetElectrical Characteristics
1–13
Table1–18.Cyclone III Devices Differential I/O Standard SpecificationsI/O StandardLVDS (Column I/Os)BLVDS (Row I/Os)
(5)
(1)
(Part 2 of 2)
VOD (mV) (3)
MaxMinTyp1.801.802471.55—
—
—
—
—
—
—
—
600
1.1251.251.375Max
Min
VOS (V) (3)
Typ
Max
VCCIO (V)Min
Typ
Max
VID (mV)Min
Max
Min
VIcM (V)
(2)
Condition500Mbps ≤ DMAX ≤ 700Mbps
0.05DMAX ≤ 500Mbps
2.375
2.5
2.625
100
—
0.55
1.05DMAX > 700Mbps
2.375
2.5
2.625
100
—
—
—
BLVDS (Column I/Os) (5)mini-LVDS (Row I/Os)
(6)
2.3752.52.625100——————————
2.3752.52.625—————300—6001.01.21.4
mini-LVDS (Column I/Os) (6)RSDS® (Row I/Os)(6) RSDS (Column I/Os) (6)PPDS®
(Row I/Os) (6) PPDS (Column I/Os) (6)
2.3752.52.625—————300—6001.01.21.4
2.3752.52.625—————1002006000.51.21.5
2.3752.52.625—————1002006000.51.21.5
2.3752.52.625—————1002006000.51.21.4
2.3752.52.625—————1002006000.51.21.4
Notes to Table1–18:
(1)For an explanation of terms used in Table1–18, refer to “Transmitter Output Waveform” in “Glossary” on page1–27.(2)VIN range: 0V ≤ VIN ≤ 1.85V.Ω.(3)RL range: 90 ≤ RL ≤ 110
(4)LVPECL input standard is only supported at clock input. Output standard is not supported.(5)No fixed VIN, VOD, and VOS specifications for BLVDS. They are dependent on the system topology.(6)Mini-LVDS, RSDS, and PPDS standards are only supported at the output pins for Cyclone III devices.
December 2011Altera Corporation
Cyclone III Device Handbook
Volume 2
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