ZYNQ_嵌入式软件开发

ZYNQ平台嵌入式软件开发

Zynq-7000 All Programmable SoC双核 ARM Cortex -A9 MPCore高达 1GHz可通过 NEON扩展及单双精度浮点单元进行增强 32kB指令及 32kB数据 L1缓存

统一的 512kB L2缓存 256kB片上存储器 DDR3、DDR3L、DDR2以及 LPDDR2动态存储控制器

2个 QSPI、NAND Flash以及 NOR闪存控制器2个 USB2.0 (OTG)、2个 GbE、2个 CAN2、0B、2个 SD/SDIO、2个 UART、2个 SPI、2个 I2C、4个32b GPIO

一级引导载入程序、AES和 SHA 256b解密的RSA认证以及安全引导认证双 12位 1Msps数模转换器最多接受17对差分模拟输入 Advanced Low Power 28nm Programmable Logic

Page 2

Zynq-7000操作系统支持开源OSLinux 3.8.0 Andriod 2.3 FreeRTOS

商业OSAdeneo Embedded - Windows Embedded Compact 7 eSOL - uITRON/T-Kernel ExpressLogic - ThreadX Micrium - uC/OS Wind River - Linux ENEA - OSE SYSGO - PikeOS ETAS - RTA-OS iVeia - Android Xilinx - PetaLinux Quadros - Quadros Wind River - VxWorks Green Hills Software - INTEGRITY

Page 3

Zynq-7000开发工具 ---- XPSXPS可实现完整的配置和定制操作

管理 Zynq-7000 AP SoC外设 IO引脚启动配置和初始化器件安全、回读引导和比特流管理措施项目专用配置感知无需用户掌握具体硬件知识利用可展开的软件图自动构建一级引导载入程序

Page 4

Zynq-7000开发工具 ---- XPS使用 Eclipse CDT开发环境 (version 3.8)完整的集成设计环境 (IDE)可用于连接 Vivado和 ISE嵌入式硬件设计环境实现完整的软件设计和调试流程支持，包括全新多内核和硬件/软件调试功能

Xilinx版 Mentor Sourcery CodeBench Lite (version 2012.09)支持定制库和器件驱动程序

裸机与 Linux开发支持同构和异构开发的多内核

Page 5

Zynq-7000嵌入式软件开发流程利用ISE工具完成硬件设计利用SDK工具生成FSBL(First Stage Boot Loader)

利用JTAG工具下载调试FSBL的功能利用SDK工具生成由FSBL、Bitstream、SSBL(Second Stage Boot Loader)组成的BOOT.BIN

将BOOT.BIN、OS映像文件、内存文件系统等文件拷贝到系统设计指定的存储设备中(QSPI\NAND\NOR Flash、SD卡),调试操作系统基本功能开发调试用户态功能程序

Page 6

Zynq-7000启动流程MMU, Icache, Dcache, L2 cache are all disabled Both processors are in the supervisor state ROM code is masked and inaccessible 192 KB of OCM is accessible starting at address 0x0 while 64 KB is accessible starting at address 0xFFFF0000 CPU0 branches into the stage 1 image if no failure takes place CPU1 is in a WFE state while executing code located at address 0xFFFFFE00 to 0xFFFFFFF0

Page 7

Zynq-7000 First Stage Boot Loader功能简介由BootROM将其从外部存储设备拷贝到OCM运行完成硬件初始化，为SSBL提供可工作的硬件环境解析BOOT.BIN文件，加载Bitstream、SSBL AMP环境下需要加载CPU1上运行的EL

F文件 CPU0进入到SSBL中执行

FSBL工程根据XPS的XML文档选择需要的BSP驱动，并生成ps7_init.c文件相关文档： /support/documentation/user_g uides/ug821-zynq-7000-swdev.pdf

Page 8

Zynq-7000 Bootgen and BIF file formatBootgenA standalone tool for creating a bootable image suitable for the Zynq7000 AP SoC processor. The program assembles the boot image by prefixing a header block to a list of partitions. Each partition can be optionally encrypted and authenticated.

BIFThe BIF file specifies each component of the boot image, in order of boot, and allows optional attributes to be applied to each image component. Each image component is usually mapped to a partition, but in some cases an image component can be mapped to more than one partition if the image component is not contiguous in memory.

相关文档/support/documentation/user_guides/ug821-zynq7000-swdev.pdf

Page 9

Zynq-7000 RepositorySDK中BSP驱动调试执行Clean Project后，工程中的BSP代码会被清除，后续Build Project命令会从SDK安装目录拷贝新的BSP代码通过创建并添加本地Repository,可以在不影响其他Workspace的情况下进行修改调试BSP代码。添加新的Repo的步骤可通过以下方式搜索：SDK中按F1,打开帮助窗口，并点击Search链接搜索框中输入Setting up software repositories,选择第一个链接

Page 10

Zynq-7000 DeviceTreeThe ARM architecture has become a major headache in the Linux community: Even though the processors share the same compiler and many functionalities, each embodiment (i.e. chip) has its own addresses for the registers, and a slightly different configuration. On top of that, each board has its own set of external components. The result is a wild forest of header files, patches and special configuration parameters in the kernel tree, each combination matching a specific board with a specific chip containing an ARM processor. In short, it has turned out to be an ugly and unmaintainable pile of hacks which nobody is really fond of.

More info Refer to: /tutorials/device-tree-zynq-1

Device Tree in Linux Kernel/Device+Tree+Generator

Page 11

Zynq-7000 Linux on ZynqU-boothttps:///Xilinx/u-boot-xlnx

Ramdisk/Build+and+Modify+a+Rootfs

Kernel https:///Xilinx/linux-xlnx Drivers: /Linux+Drivers

Page 12

Zynq-7000 Multi-OS SupportAMPThe Zynq AP SoC can be configured to run independent software stacks on each of its processor cores. Such approaches can be configured as either unsupervised AMP (where one of the operating systems is responsible for system management and coordination), or as an AMP configuration created using ARM TrustZone architecture which provides a light weight virtual machine of sorts, on which Linux and RTOS code can independently execute.

Example: Xapp1078: Linux/ Bare

-metal AMP Xapp1079: Bare-metal/ Bare-metal AMP More info Refer to:/Multi-OS+Support+(AMP+%26+Hypervisor)

Page 13

Zynq-7000 Power ManagementCpufreqThe cpufreq framework is used to scale the CPU frequency.

CpuidleThe cpuidle framework manages CPU idle levels.

SuspendThe suspend framework provides the interface to enter sleep states, like the well known 'suspend to disk/RAM' on laptops.

Wake on UART Wake on GPIO Wake on Debugger More info Refer to:/Zynq+Power+Management

Page 14

Zynq-7000 ZedBoardKey FeaturesZynq Processor Dual ARM® Cortex -A9 MPCore Up to 667 MHz operation NEON Processing/ FPU Engines Memory

512 MB DDR3 memory (1066 Mbps) 256 Mb Quad SPI Flash Full size SD/MMC card cage 4 GB SD Card Included Connectivity10/100/1000 Ethernet USB OTG (Device/Host/OTG) USB UART Expansion FMC (Low Pin Count) (5) Pmod headers (2x6) Video/Display HDMI output (1080p60+ audio) VGA connector 128 x 32 OLED User LEDs (9) User Inputs Slide switches (8) Push button switches (7)

Page 15

Zynq-7000 ZedBoardKey FeaturesAudio 24-bit stereo audio CODEC Stereo line in/out Headphone Microphone input Analog Xilinx XADC header Supports 4 analog inputs 2 Differential/ 4 Single-ended Debug/Programming

On-board USB JTAG programming port ARM Debug Access Port (DAP)Power 12V DC input@ 3.0 A (Max) Dimensions

Length: 6.3 inches Width: 5.3 inches CertificationCE and RoHS certified

Page 16

Zynq-7000 ZedBoard ResourceReference DesignAMP on Zedboard LCD& Touch Panel

HDMI Video OutputMotor Controller Ubuntu\Andriod\WinCE On Zedboard OpenCV

More and more…

Online Resource /tag/2213 Page 17

Zynq-7000 ZedBoard书籍本书分为基础篇和进阶篇两部分。基础篇中主要介绍了ZedBoard板、Zynq器件、开发工具链、Zynq的体系结构及其启动过程等基本的器件与板卡情况，同时考虑了软件工程师的知识结构。在第8章中介绍了FPGA的原理，以及硬件加速的原理，便于软件工程师理解FPGA。在第9章中通过基础实验带领大家浅尝Zynq的开发过程，并带领大家用 ZedBoard板搭建出一个单板计算机系统。进阶篇中，首先介绍了利用虚拟平台QEMU进行软件开发的流程。在第11章中详细分析了 Zynq中处理器与硬件逻辑的连接关系。第12章主要介绍了在Zynq上利用AutoESL进行软硬件协同设计的理念与过程。第13章占了全书四分之一的篇幅，介绍了使用Zynq实现逻辑、驱动、操作系统、高清视频显示、OpenCV、网络摄像机等12个应用案例，这是本书的精华之一。在第14章，将13章中提到的独立案例再融合成4个系统案例，这4个系统案例都会应用到前面章节的知识，以此帮助大家尽快掌握在Zynq上进行系统级设计的方法。

Page 18

Zynq-7000网络资

源Xilinx官网 /support/ /

ARM/help/index.jsp

Page 19

Thank you

本文来源：https://www.bwwdw.com/article/wk24.html