AEC_Q100_Rev_G_Base_Document

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AEC - Q100 - Rev-G

May 14, 2007

STRESS TEST QUALIFICATION

FOR

INTEGRATED CIRCUITS

Automotive Electronics Council

Component Technical Committee

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AEC - Q100 - REV-G

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Automotive Electronics Council

Component Technical Committee

TABLE OF CONTENTS

Appendix 1:

Appendix 2:

Appendix 3:

Appendix 4:

Appendix 5:

Definition of a Qualification Family

Q100 Certification of Design, Construction and Qualification Plastic Package Opening for Wire Bond Testing

Minimum Requirements for Qualification Plans and Results Part Design Criteria to Determine Need for EMC Testing

Attachments

AEC-Q100-001:

AEC-Q100-002:

AEC-Q100-003:

AEC-Q100-004:

AEC-Q100-005:

AEC-Q100-006:

AEC-Q100-007:

AEC-Q100-008:

AEC-Q100-009:

AEC-Q100-010:

AEC-Q100-011:

WIRE BOND SHEAR TEST

HUMAN BODY MODEL (HBM) ELECTROSTATIC DISCHARGE (ESD) TEST MACHINE MODEL (MM) ELECTROSTATIC DISCHARGE (ESD) TEST IC LATCH-UP TEST

NONVOLATILE MEMORY WRITE/ERASE ENDURANCE, DATA RETENTION, AND OPERATIONAL LIFE TEST

ELECTRO-THERMALLY INDUCED PARASITIC GATE LEAKAGE (GL) TEST FAULT SIMULATION AND TEST GRADING EARLY LIFE FAILURE RATE (ELFR) ELECTRICAL DISTRIBUTION ASSESSMENT SOLDER BALL SHEAR TEST

CHARGED DEVICE MODEL (CDM) ELECTROSTATIC DISCHARGE (ESD) TEST

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Acknowledgment

Any document involving a complex technology brings together experience and skills from many sources. The revision of this document:

Mark A. Kelly Jean Clarac Brian Jendro Hadi Mehrooz Robert V. Knoell Tim Haifley Daniel Vanderstraeten Earl Fischer Mike Klucher Xin Miao Zhao John Timms Roy Ozark Nick Lycoudes Kenton Van Klompenberg Werner Kanert Elfriede Geyer John Bertaux Gary Fisher Tom Lawler Sohail Malik Scott Daniels Tom Tobin Mike Buzinski Rob Horton Annette Nettles Masamichi Murase Zhongning Liang Mark Gabrielle Ken Berry Bruce Townsend Adam Fogle Brian Mielewski James Williams Diana Siddall Anca Voicu Lewis Venters Peter Kowalczyk Joe Wurts Don Pecko

Delphi Corporation Siemens VDO Siemens VDO Siemens VDO Visteon Corporation Altera AMI Semiconductor Autoliv Cirrus Logic Cirrus Logic Continental Automotive Systems Continental Automotive Systems Freescale Gentex Infineon Technologies Infineon Technologies International Rectifier Johnson Controls Lattice Semiconductor Lattice Semiconductor Maxim Maxim Microchip Microchip NEC Electronics NEC Electronics NXP Semiconductors ON Semiconductor Renesas Technology Spansion Spansion STMicroelectronics Texas Instruments Texas Instruments Xilinx Cirrus Logic Delphi Corporation Maxim Xilinx

David Locker Jeff Jarvis

AMRDEC AMRDEC

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NOTICE

AEC documents contain material that has been prepared, reviewed, and approved through the AEC Technical Committee.

AEC documents are designed to serve the automotive electronics industry through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than AEC members, whether the standard is to be used either domestically or internationally.

AEC documents are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action AEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the AEC documents. The information included in AEC documents represents a sound approach to product specification and application, principally from the automotive unless all requirements stated in the document are met.

Inquiries, comments, and suggestions relative to the content of this AEC document should be addressed to the AEC Technical Committee on the link .

Published by the Automotive Electronics Council.

This document may be downloaded free of charge, however AEC retains the copyright on this material. By

Printed in the U.S.A. All rights reserved

Committee.

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FOR PACKAGED INTEGRATED CIRCUITS

Text enhancements and differences made since the last revision of this document are shown as underlined areas. Several figures and tables have also been revised, but changes to these areas have not been underlined.

1.

SCOPE

test driven qualification requirements and references test conditions for qualification of integrated circuits

Use of this document does not relieve the IC supplier of their responsibility to meet their own company's internal qualification program. In this document, "user" is defined as all customers using a device qualified per this specification. The user is responsible to confirm and validate all qualification data that substantiates conformance to this document. Supplier usage of the device temperature grades as stated in this specification in their part information is strongly encouraged.

1.1 1.2

Purpose

The purpose of this specification is to determine that a device is capable of passing the specified stress tests and thus can be expected to give a certain level of quality/reliability in the application. Reference Documents

Current revision of the referenced documents will be in effect at the date of agreement to the qualification plan. Subsequent qualification plans will automatically use updated revisions of these referenced documents.

Automotive

AEC-Q001 Guidelines for Part Average Testing AEC-Q002 Guidelines for Statistical Yield Analysis

AEC-Q003 Guidelines for Characterizing the Electrical Performance SAE J1752/3 Integrated Circuits Radiated Emissions Measurement Procedure

Military

MIL-STD-883 Test Methods and Procedures for Microelectronics

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Industrial

JEDEC JESD-22 Reliability Test Methods for Packaged Devices EIA/JESD78 IC Latch-Up Test

UL-STD-94 Tests for Flammability of Plastic materials for parts in Devices and Appliances

Mount Devices

1.3

1.3.1

Definitions

AEC Q100 Qualification

Successful completion and documentation of the test results from requirements outlined in this document allows the supplier to claim that the part is “AEC Q100 qualified”. The supplier, in agreement with the user, can perform qualification at sample sizes and conditions less stringent than what this document requires. However, that part cannot be considered “AEC Q100 qualified” until such time that the unfulfilled requirements can be completed.

Approval for Use in an Application

"Approval" is defined as user approval for use of a part in their application. The user's method of approval is beyond the scope of this document.

Definition of Part Operating Temperature Grade

The part operating temperature grades are defined below:

Grade 0: -40°C to +150°C ambient operating temperature range Grade 1: -40°C to +125°C ambient operating temperature range Grade 2: -40°C to +105°C ambient operating temperature range Grade 3: -40°C to +85°C ambient operating temperature range Grade 4: 0°C to +70°C ambient operating temperature range

2. 2.1

GENERAL REQUIREMENTS Objective

The objective of this specification is to establish a standard that defines operating temperature grades for integrated circuits based on a minimum set of qualification requirements.

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2.2

Precedence of Requirements

In the event of conflict in the requirements of this standard and those of any other documents, the following order of precedence applies: a. b. c. d. e.

The purchase order

The individual device specification This document

The reference documents in section 1.2 of this document The supplier's data sheet

For the device to be considered a qualified part per this specification, the purchase order and/or the individual device specification cannot waive or detract from the requirements of this document.

2.3

2.3.1

Use of Generic Data to Satisfy Qualification and Requalification Requirements Definition of Generic Data

The use of generic data to simplify the qualification process is strongly encouraged. Generic data can be submitted to the user as soon as it becomes available to determine the need for any additional testing. To be considered, the generic data must be based on a matrix of specific requirements associated with each characteristic of the device and manufacturing process as shown in Table 3 and Appendix 1. If the generic data contains any failures, the data is not usable as generic data unless the supplier has documented and implemented corrective action or containment for the failure condition that is acceptable to the user.

Appendix 1 defines the criteria by which components are grouped into a qualification family for the purpose of considering the data from all family members to be equal and generically acceptable for the qualification of the device in question. For each stress test, two or more qualification families can be combined if the reasoning is technically sound (i.e., supported by data).

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Table 1: Part Qualification/Requalification Lot Requirements

Part Information

New device, no applicable generic data. A part in a family is qualified. The part to be qualified is less complex and meets the Family Qualification Definition per Appendix 1. A new part that has some applicable generic data.

Lot Requirements for Qualification

Lot and sample size requirements per Table 2. Only device specific tests as defined in section 4.2 are required. Lot and sample size

requirements per Table 2 for the required tests. Review Appendix 4 to determine required tests from Table 2. Lot and sample sizes per Table 2 for the required tests.

Review Table 3 to determine which tests from Table 2 are required. Lot and sample sizes per Table 2 for the required tests.

The electrical end-point testing on at least 1 lot (that completed qualification testing) must meet or exceed the temperature extremes for the device Grade required. Sample sizes shall be per Table 2.

Refer to Appendix 1, section 3. Refer to Appendix 1, section 3.

Part process change.

Part was environmentally tested to all the test extremes, but was electrically end-point tested at a temperature less than the Grade required. Qualification/Requalification involving multiple sites.

Qualification/Requalification involving multiple families.

With proper attention to these qualification family guidelines, information applicable to other devices in the family can be accumulated. This information can be used to demonstrate generic reliability of a device family and minimize the need for device-specific qualification test programs. This can be achieved through qualification and monitoring of the most complex (e.g., more memory, A/D, larger die size) device in the qualification family and applying this data to less complex devices that subsequently join this family. Sources of generic data should come from supplier-certified test labs, and can include internal supplier's qualifications, cell structure/standard circuit characterization and testing, user-specific qualifications, and supplier's in-process monitors. The generic data to be submitted must meet or exceed the test conditions specified in Table 2. End-point test temperatures must address the worst case temperature extremes for the device operating temperature grade being qualified on at least one lot of data. Failure to do so will result in the supplier testing 1 lot or, if there is no applicable or acceptable existing generic data, 3 lots for the stress test(s) in question on the device to be qualified. The user(s) will be the final authority on the acceptance of generic data in lieu of test data.

Table 3 defines a set of qualification tests that must be considered for any changes proposed for the component. The Table 3 matrix is the same for both new processes and requalification associated with a process change. This table is a superset of tests that the supplier and user should use as a baseline for discussion of tests that are required for the qualification in question. It is the supplier's responsibility to present rationale for why any of the recommended tests need not be performed.

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2.3.3

Time Limit for Acceptance of Generic Data

There are no time limits for the acceptability of generic data as long as all reliability data taken since the initial qualification is submitted to the user for evaluation. This data must come from the specific part or a part in the same qualification family, as defined in Appendix 1. This data includes any customer specific data (if customer is non-AEC, withhold customer name), process change qualification, and periodic reliability monitor data (see Figure 1).

History

Process ChangeQualification

Process ChangeQualification

Customer #1SpecificQualification

Customer #2SpecificQualification

Present

Qualification data + Processchange qualification data +Reliability monitor data =acceptable generic data

Supplier InternalQualification

Internal DeviceCharacterization

Note:Some process changes (e.g., die shrink) will affect the use of

generic data such that data obtained before these types ofchanges will not be acceptable for use as generic data.

2.4

2.4.1

Test Samples Lot Requirements

Test samples shall consist of a representative device from the qualification family. Where multiple lot testing is required due to a lack of generic data, test samples as indicated in Table 2 must be composed of approximately equal numbers from non-consecutive wafer lots, assembled in non-consecutive molding lots. That is, they must be separated in the fab or assembly process line by at least one non-qualification lot.

2.4.2

Production Requirements

All qualification devices shall be produced on tooling and processes at the manufacturing site that will be used to support part deliveries at production volumes. Other electrical test sites may be used for electrical measurements after their electrical quality is validated.

Supplier Startof Production

Periodic ReliabilityMonitor Tests

Figure 1: Generic Data Time Line

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2.4.3

Reusability of Test Samples

Devices that have been used for nondestructive qualification tests may be used to populate other qualification tests. Devices that have been used for destructive qualification tests may not be used any further except for engineering analysis.

2.4.4

Sample Size Requirements

Sample sizes used for qualification testing and/or generic data submission must be consistent with the If the supplier elects to use generic data for qualification, the specific test conditions and results must be recorded and available to the user (preferably in the format shown in Appendix 4). Existing applicable generic data should first be used to satisfy these requirements and those of section 2.3 for each test requirement in Table 2. Device specific qualification testing should be performed if the generic data does not satisfy these requirements.

2.4.5

Pre- and Post-stress Test Requirements

End-point test temperatures (room, hot and/or cold) are specified in the "Additional Requirements" column of Table 2 for each test. The specific value of temperature must address the worst case operating temperature grade extremes on at least one lot of data (generic or device specific) submitted per test. For example, if a supplier designs a device intended solely for use in an operating temperature Grade 3 environment (e.g., -40°C to +85°C), the end-point test temperature extremes need only address those application limits. Qualification to applications in higher operating temperature grade environments (e.g., -40°C to +125°C for Grade 1) will require testing of at least one lot using these additional end-point test temperature extremes.

2.5

Definition of Test Failure After Stressing

Test failures are defined as those devices not meeting the individual device specification, criteria specific to the test, or the supplier's data sheet, in the order of significance as defined in section 2.2. Any device that shows external physical damage attributable to the environmental test is also considered a failed part of the data submission.

3. 3.1

QUALIFICATION AND REQUALIFICATION Qualification of a New Device

The stress test requirement flow for qualification of a new device is shown in Figure 2 with the corresponding test conditions defined in Table 2. For each qualification, the supplier must have data available for all of these tests, whether it is stress test results on the device to be qualified or acceptable generic data. A review shall also be made of other devices in the same generic family to ensure that there are no common failure mechanisms in that family. Justification for the use of generic data, whenever it is used, must be demonstrated by the supplier and approved by the user.

For each device qualification, the supplier must have available the following:

Certificate of Design, Construction and Qualification (see Appendix 2) Stress Test Qualification data (see Table 2 & Appendix 4)

Data indicating the level of fault grading of the software used for qualification (when applicable to the device type) per Q100-007 that will be made available to the customer upon request

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3.2

Requalification of a Changed Device

Requalification of a device is required when the supplier makes a change to the product and/or process Table 3 for guidelines).

3.2.1

3.2.2

Process Change Notification

The supplier will meet the user requirements for product/process changes. Changes Requiring Requalification

As a minimum, any change to the product, as defined in Appendix 1, requires performing the applicable tests listed in Table 2, using Table 3 to determine the requalification test plan. Table 3 should be used as a guide for determining which tests are applicable to the qualification of a particular part change or whether equivalent generic data can be submitted for that test(s).

3.2.3

Criteria for Passing Requalification

All requalification failures shall be analyzed for root cause, established as required. The device

3.2.4

User Approval

A change may not affect a device's operating temperature grade, but may affect its performance in an application. Individual user authorization of a process change will be required for that user’s particular application(s), and this method of authorization is outside the scope of this document.

4. 4.1

QUALIFICATION TESTS General Tests

Test flows are shown in Figure 2 and test details are given in Table 2. Not all tests apply to all devices. For example, certain tests apply only to ceramic packaged devices, others apply only to devices with NVM, and so on. The applicable tests for the particular device type are indicated in the “Note” column of Table 2. The “Additional Requirements” column of Table 2 also serves to highlight test requirements that supersede those described in the referenced test method. Any unique qualification tests or conditions requested by the user and not specified in this document shall be negotiated between the supplier and user requesting the test.

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4.2

Device Specific Tests

The following tests must be performed on the specific device to be qualified for all hermetic and plastic packaged devices. Generic data is not allowed for these tests. Device specific data, if it already exists, is acceptable.

1.

2. Latch-up (LU) - All product.

3. Electrical Distribution - The supplier must demonstrate, over the operating temperature grade,

device specification. This data must be taken from at least three lots, or one matrixed (or skewed) process lot, and must represent enough samples to be statistically valid, see Q100-009. It is strongly recommended that the final test limits be established using AEC-Q001 Guidelines For Part Average Testing.

4. Other Tests - A user may require other tests in lieu of generic data based on his experience with a

particular supplier.

4.3

Wearout Reliability Tests

Testing for the failure mechanisms listed below must be available to the user whenever a new technology or material relevant to the appropriate wearout failure mechanism is to be qualified. The data, test method, calculations, and internal criteria need not be demonstrated or performed on the qualification of every new device, but should be available to the user upon request.

Electromigration

Hot Carrier Injection - for all MOS technologies below 1 micron

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Figure 2: Qualification Test Flow

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TEST GROUP A – ACCELERATED ENVIRONMENT STRESS TESTS

# NOTES SAMPLE SIZE / LOT NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD ADDITIONAL REQUIREMENTS

STRESS

ABV

Component Technical Committee

Preconditioning

0 Fails PC A1

P, B, S, N, G

JEDEC J-STD-020 JESD22-A113

Automotive Electronics Council

Performed on surface mount devices only. PC performed before THB/HAST, AC/UHST, TC, and PTC stresses. It is recommended that J-STD-020 be performed to determine what preconditioning level to perform in the actual PC stress per JA113. The minimum acceptable level for qualification is level 3 per JA113. Where applicable, Temperature must be reported when Delamination from the die surface in JA113/J-STD-020 is acceptable if the device passes the subsequent Qualification tests. Any replacement of devices must be reported. TEST before and after PC at room temperature.

Table 2: Qualification Test Methods

Page 10 of 32

A2

0 Fails P, B, D, G

Temperature-Humidity-Bias or Biased HAST THB or HAST

JEDEC JESD22-A101 or A110

For surface mount devices, PC before THB 85oC/85%RH 1000 hours or HAST (130oC/85%RH for 96 hours, or 110C/85%RH for . TEST before and after THB or HAST at room and hot temperature.

Autoclave or Unbiased HAST

A3

P, B, D, G

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AC or UHST

0 Fails

JEDEC JESD22-A102, A101

For surface mount devices, PC before AC 121oC/15psig 96 hours or unbiased HAST (130°C/85%RH for 96 hours, or 110oC/85%RH for . TEST before and after AC or UHST at room temperature.

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TEST GROUP A – ACCELERATED ENVIRONMENT STRESS TESTS (CONTINUED)

# NOTES SAMPLE SIZE / LOT ADDITIONAL REQUIREMENTS NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD

STRESS

ABV

Component Technical Committee

Temperature Cycling A4

0 Fails H, P, B, D, G

TC

JEDEC JESD22-A104 and Appendix 3

PC before TC for surface mount devices. Grade 0: -65ºC to +175ºC for 500 cycles, -50ºC to +175ºC for 1000 cycles, or -50ºC to +150ºC for 2000 cycles. Grade 1: -65oC to +150oC for 500 cycles or-50oC to +150oC for 1000 cycles. Grade 2: -50ºC to +150ºC for 500 cycles or-50ºC to +125ºC for 1000 cycles. Grade 3: -50ºC to +125ºC for 500 cycles or-50ºC to +105ºC for 1000 cycles. Grade 4: -10ºC to +105ºC for 500 cycles or-10ºC to + 90ºC for 1000 cycles. TEST before and after TC at hot temperature. on corner bonds (2 bonds per corner) and one mid-bond per side on each device. Preferred decap procedure to minimize damage and chance of false data is shown in Appendix 3.

Automotive Electronics Council

Table 2: Qualification Test Methods (continued)

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A5

0 FAILS H, P, B, D, G

Power Temperature Cycle 45 1

PTC

JESD22-A105

PC 22pcs before PTC for surface mount devices. Test required only on devices with maximum rated power = 1 watt or TJ = 40ºC or devices designed to drive inductive loads. Grade 0: Ta of -40ºC to +150ºC for 1000 cycles. Grade 1: Ta of -40ºC to +125ºC for 1000 cycles. Grades 2 to 4: Ta -40ºC to +105ºC for 1000 cycles. Thermal shut-down shall not occur during this test. TEST before and after PTC at room and hot temperature.

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High Temperature Storage Life A6

H, P, B, D, G, K

HTSL 45 1

0 FAILS

A103

Plastic Packaged Parts Grade 0: +175ºC for 1000 hours or +150ºC for 2000 hours. Grade 1: +150ºC for 1000 hours or +175ºC for 500 hours. Grades 2 to 4: +125ºC for 1000 hours or +150ºC for 500 hours. Ceramic Packaged Parts +250ºC for 10 hours or +200ºC for 72 hours. TEST before and after HTSL at room and hot temperature. substituted for Test A6 (HTSL) if package and

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TEST GROUP B – ACCELERATED LIFETIME SIMULATION TESTS

# NOTES SAMPLE SIZE / LOT ADDITIONAL REQUIREMENTS

For devices containing NVM, endurance preconditioning must be performed before HTOL per Q100-005.

Grade 0: +175ºC Ta for 408 hours or +150ºC Ta for 1000 hours.

Grade 1: +150oC Ta for 408 hours or +125oC Ta for 1000 hours.

NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD

Component Technical Committee

STRESS

ABV

High Temperature Operating Life B1

0 FAILS H, P, B, D, G, K

HTOL

JEDEC JESD22-A108

Grade 2: +125ºC Ta for 408 hours or +105ºC Ta for 1000 hours.

Grade 3: +105ºC Ta for 408 hours or +85ºC Ta for 1000 hours.

Grade 4: +90ºC Ta for 408 hours or +70ºC Ta for 1000 hours.

Vcc (max) at which dc and ac parametrics are guaranteed. Thermal shut-down shall not occur during this test. TEST before and after HTOL at room, hot, and cold temperature.

Automotive Electronics Council

Table 2: Qualification Test Methods (continued)

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B2

H, P, B, N, G

Early Life Failure Rate ELFR 800 3

0 FAILS

AEC Q100-008

Devices that pass this stress can be used to populate other stress tests. Generic data is applicable. TEST before and after ELFR at room and hot temperature.

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NVM Endurance, Data Retention, and Operational Life B3

H, P, B, D, G,

EDR 77 3

0 FAILS

AEC Q100-005

TEST before and after EDR at room and hot temperature.

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TEST GROUP C – PACKAGE ASSEMBLY INTEGRITY TESTS

# NOTES ADDITIONAL REQUIREMENTS SAMPLE SIZE / LOT NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD

STRESS ABV

Wire Bond Shear WBS C1

H, P, D, G CPK >1.33 PPk >1.67 AEC Q100-001 At appropriate time interval for each bonder to be used.

30 bonds from a minimum of 5 devices

Wire Bond Pull WBP C2

H, P, D, G

CPK >1.33 PPk >1.67 or 0 Fails after TC (test #A4) MIL-STD883 Method 2011

Condition C or D. inimum pull strength after TC = 3 grams. bond pull shall be performed with the hook

Component Technical Committee

Solderability SD C3

H, P, D, G

15 1

>95% lead coverage

JEDEC JESD22-B102

If burn-in screening is normally performed on the device before shipment, samples for SD must first undergo burn-in. Perform 8 hour steam aging prior to testing (1 hour for Au-plated leads).

Automotive Electronics Council

Table 2: Qualification Test Methods (continued)

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C4

H, P, B, D, G

Physical Dimensions 10 3

CPK >1.33 PPK >1.67

PD

JEDEC JESD22-B100 and B108

See applicable JEDEC standard outline and individual device spec for significant dimensions and tolerances.

Solder Ball Shear

B SBS C5

5 balls from a min. of 10 devices

3

CPK >1.33 PPK >1.67 AEC Q100-010 PC thermally (two 220ºC reflow cycles) before integrity (mechanical) testing.

Lead Integrity LI C6

H, P, D, G

10 leads from each of 5 parts

1

No lead breakage or cracks JEDEC JESD22-B105

Not required for surface mount devices. Only required for through-hole devices.

TEST GROUP D – DIE FABRICATION RELIABILITY TESTS

# NOTES SAMPLE SIZE / LOT NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD ADDITIONAL REQUIREMENTS

STRESS

ABV

Electromigration EM D1 --- --- ---

---

---

The data, test method, calculations and internal criteria should be available to the user upon request for new technologies.

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Time Dependent Dielectric Breakdown D2

TDDB --- --- --- --- ---

The data, test method, calculations and internal criteria should be available to the user upon request for new technologies.

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TEST GROUP D – DIE FABRICATION RELIABILITY TESTS (CONTINUED)

# NOTES SAMPLE SIZE / LOT ADDITIONAL REQUIREMENTS NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD

D3

---

STRESS

ABV

Hot Carrier Injection HCI --- --- --- ---

The data, test method, calculations and internal criteria should be available to the user upon request for new technologies.

---

internal criteria should be available to

SM

internal criteria should be available to

Component Technical Committee

TEST GROUP E – ELECTRICAL VERIFICATION TESTS

# NOTES SAMPLE SIZE / LOT NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD ADDITIONAL REQUIREMENTS

STRESS

ABV

Automotive Electronics Council

Table 2: Qualification Test Methods (continued)

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E1

0 Fails H, P, B, N, G

Pre- and Post-Stress Function/Parameter All All

TEST

Test program to supplier data sheet or user specification

Test is performed as specified in the applicable stress reference and the additional requirements in Table 2 and illustrated in Figure 2. Test software used shall meet the requirements of Q100-007. All electrical testing before and after the qualification stresses are performed to the limits of the individual device specification in temperature and limit value.

Electrostatic Discharge Human Body Model / Machine Model

HBM / MM

E2

H, P, B, D

See Test Method

1

0 Fails 2KV HBM 200V MM

AEC Q100-002 Q100-003

TEST before and after ESD at room and hot temperature. At least one of these models must be performed. Device shall be classified according to the maximum withstand voltage level. Device levels <2000V HBM and/or <200V MM require specific user approval.

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Electrostatic Discharge Charged Device Model

CDM E3

H, P, B, D

See Test Method

1

AEC Q100-011

0 Fails 750V corner pins, 500V all other pins better)

TEST before and after ESD at room and hot temperature. Device shall be classified according to the maximum withstand voltage level. Device levels <750V corner pins and/or <500V all other pins CDM require specific user approval.

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TEST GROUP E – ELECTRICAL VERIFICATION TESTS (CONTINUED)

# NOTES SAMPLE SIZE / LOT ADDITIONAL REQUIREMENTS NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD

STRESS

ABV

Latch-Up

0 Fails LU E4

H, P, B, D

6 1

AEC Q100-004

See attached procedure for details on how to perform the test. TEST before and after LU at room and hot temperature.

Electrical Distributions ED E5

H, P, B, D

30 3

See AEC AEC Q100-009

Supplier and user to mutually agree upon electrical parameters to be measured. TEST at room, hot, and cold temperature.

Fault Grading

--- FG E6 --- ---

4 of AEC AEC Q100-007

--- AEC Q003

For production testing, see section 4 of Q100-007 for test requirements.

Component Technical Committee

Characterization CHAR E7 --- --- ---

To be performed on new technologies and part families.

Electrothermally-Induced Gate Leakage

GL

0 Fails E8

D, P, B, S

6 1

AEC Q100-006

TEST before and after GL at room temperature within 96 hours of GL stress completion.

Automotive Electronics Council

Table 2: Qualification Test Methods (continued)

Page 15 of 32

E9

Electromagnetic Compatibility

EMC --- 1 1

SAE J1752/3 – Radiated Emissions

See Appendix 5 for guidelines on determining the applicability of this test to the device to be qualified. This test and its accept criteria is performed per agreement between user and supplier on a case-by-case basis.

D, G

0 Fails

Q100-012

Applicable to all smart power shall be performed per agreement case basis.

AEC - Q100 - REV-G

May 14, 2007

H, P, D,

JEDEC JESD89-1 Accelerated:

Applicable to devices with memory or accelerated) can be performed, in specifications. This test and its accept case basis. Final test report shall altitude data.

车用电子产品的执行标准。

TEST GROUP F – DEFECT SCREENING TESTS

ABV ADDITIONAL REQUIREMENTS # NOTES SAMPLE SIZE / LOT NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD

STRESS

PAT

AEC Q001 It is highly desirable that the supplier adopt these tests in their standard manufacturing operation.

Process Average Testing F1 --- --- --- ---

F2

AEC Q002

Statistical Bin/Yield Analysis --- --- --- ---

SBA

TEST GROUP G – CAVITY PACKAGE INTEGRITY TESTS

ABV # NOTES SAMPLE SIZE / LOT NUMBER OF LOTS ACCEPT CRITERIA TEST METHOD ADDITIONAL REQUIREMENTS

STRESS

Component Technical Committee

Mechanical Shock

MS

H, D, G 0 Fails G1 39 3

JEDEC JESD22-B104

Y1 plane only, 5 pulses, 0.5 msec duration, 1500 g peak acceleration. TEST .Automotive Electronics Council

Table 2: Qualification Test Methods (continued)

Page 16 of 32

VFV

H, D, G 0 Fails

Variable Frequency Vibration G2 39 3

JEDEC JESD22-B103

20 Hz to 2 KHz to 20 Hz (logarithmic variation) in >4 minutes, 4X in each orientation, 50 g peak acceleration. TEST before and after at room .

Constant Acceleration

H, D, G 0 Fails CA G3 39 3

MIL-STD-883 Method 2001

Y1 plane only, 30 K g-force for <40 pin packages, 20 K g-force for 40 pins and greater. TEST before and after at room temperature.

MIL-STD-883 Method 1014 Any single-specified fine test followed by any single-specified gross test. For ceramic packaged cavity devices only.

Gross/Fine Leak

GFL

H, D, G G4 39 3

0 Fails

Package Drop DROP G5 H, D, G 5 1

0 Fails

---

Drop part on each of 6 axes once from a height of 1.2m onto a concrete surface. This test is for MEMS cavity devices only. TEST before and after DROP at room temperature.

Lid Torque

H, D, G LT G6

G7

G8

H, D, G

5

5

3

1

1

1

0 Fails

MIL-STD-883 Method 2024 For ceramic packaged cavity devices only.

AEC - Q100 - REV-G

May 14, 2007

Die Shear

DS

IWV

0 Fails

MIL-STD-883 Method 2019 To be performed before cap/seal for all cavity devices.

Internal Water Vapor

H, D, G 0 Fails

MIL-STD-883 Method 1018 For ceramic packaged cavity devices only.

车用电子产品的执行标准。

AEC - Q100 - REV-G

May 14, 2007

Automotive Electronics Council

Component Technical Committee

Legend for Table 2

Notes: H

P B N D S G K

Required for hermetic packaged devices only. Required for plastic packaged devices only.

Required Solder Ball Surface Mount Packaged (BGA) devices only.

Nondestructive test, devices can be used to populate other tests or they can be used for production. Destructive test, devices are not to be reused for qualification or production. Required for surface mount plastic packaged devices only.

Generic data allowed. See section 2.3, Table 1, and Appendix 1.

# Reference Number for the particular test.

* All electrical testing before and after the qualification stresses are performed to the limits of the

individual device specification in temperature and limit value.

Page 17 of 32

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