PCI_Express_CEM_r3.0_008152013

PCI Express?

Card Electromechanical

Specification

Revision 3.0

July 21, 2013

1

Revision Revision History Date 1.0 Initial release. 7/22/2002 1.0a Incorporated WG Errata C1-C7 and E1. 4/15/2003

1.1 Incorporated approved Errata and ECNs. 3/28/2005

2.0 Added support for 5.0 GT/s data rate. 4/11/2007

7/21/2013 3.0 ?Added support for 8.0 GT/s data rate and incorporated approved Errata and

ECNs. Incorporated the PCI Express x16 Graphics 150W-ATX Specification

and the PCI Express 225 W/300 W High Power Card Electromechanical

Specification.

?Re-imported all figures

?Updated Figure 6-1 and Figure 6-3

?Fixed text notes in Chapter 6 and 9 Figures (took notes out of Illustrator and

made them part of the Word file)

?Changed 306.67 MAX dimension to 326.03 MIN in Figure 9-3

Contents

1.INTRODUCTION (11)

1.1.TERMS AND DEFINITIONS (12)

1.2.REFERENCE DOCUMENTS (13)

1.3.SPECIFICATION CONTENTS (14)

1.4.OBJECTIVES (14)

1.5.ELECTRICAL OVERVIEW (15)

1.6.MECHANICAL OVERVIEW (16)

1.7.150 W OVERVIEW (18)

1.8.225 W AND 300 W ADD-IN CARD OVERVIEW (19)

1.9.SYSTEM POWER DELIVERY REQUIREMENTS (20)

2.AUXILIARY SIGNALS (21)

2.1.REFERENCE CLOCK (22)

2.1.1.Low Voltage Swing, Differential Clocks (22)

2.1.2.Spread Spectrum Clocking (SSC) (23)

2.1.3.REFCLK AC Specifications (24)

2.1.4.REFCLK Phase Jitter Specification for 2.5 GT/s Signaling Support (28)

2.1.5.REFCLK Phase Jitter Specification for 5.0 GT/s Signaling Support (29)

2.1.6.REFCLK Phase Jitter Specification for 8.0 GT/s Signaling Support (29)

2.2.PERST# SIGNAL (29)

2.2.1.Initial Power-Up (G3 to S0) (30)

2.2.2.Power Management States (S0 to S3/S4 to S0) (30)

2.2.3.Power Down (32)

2.3.WAKE# SIGNAL (33)

2.4.SMBUS (OPTIONAL) (37)

2.4.1.Capacitive Load of High-power SMBus Lines (37)

2.4.2.Minimum Current Sinking Requirements for SMBus Devices (37)

2.4.3.SMBus “Back Powering” Considerations (37)

2.4.4.Power-on Reset (38)

2.5.JTAG PINS (OPTIONAL) (38)

2.6.AUXILIARY SIGNAL PARAMETRIC SPECIFICATIONS (39)

2.6.1.DC Specifications (39)

2.6.2.AC Specifications (40)

3.HOT INSERTION AND REMOVAL (41)

3.1.SCOPE 41

3.2.PRESENCE DETECT (41)

4.ELECTRICAL REQUIREMENTS (43)

4.1.POWER SUPPLY REQUIREMENTS (43)

4.2.POWER CONSUMPTION (45)

4.3.POWER BUDGETING CAPABILITY (46)

4.4.POWER SUPPLY SEQUENCING (46)

4.5.POWER SUPPLY DECOUPLING (47)

4.6.ELECTRICAL TOPOLOGIES AND LINK DEFINITIONS (47)

4.6.1.Topologies (47)

4.6.2.Link Definition (49)

3

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

4 4.7. ELECTRICAL BUDGETS ........................................................................................................ 50 4.7.1. AC Coupling Capacitors ............................................................................................ 51 4.7.2. Insertion Loss Values (Voltage Transfer Function) ................................................... 51 4.7.3. Jitter Values ................................................................................................................ 51 4.7.4. Crosstalk ..................................................................................................................... 53 4.7.5. Lane-to-Lane Skew ..................................................................................................... 54 4.7.6. Transmitter Equalization ............................................................................................ 54 4.7.7. Skew within the Differential Pair ............................................................................... 55 4.7.8. Differential Data Trace Impedance............................................................................ 55 4.7.9. Differential Data Trace Propagation Delay .............................................................. 56 4.8. EYE DIAGRAMS AT THE ADD-IN CARD INTERFACE ..................................................... 56 4.8.1. Add-in Card Transmitter Path Compliance Eye Diagram at 2.5 GT/s ...................... 56 4.8.2. Add-in Card Transmitter Path Compliance Eye Diagrams at 5.0 GT/s .................... 57 4.8.3. Add-in Card Transmitter Path Compliance Eye Diagrams at 8.0 GT/s .................... 59 4.8.4. Add-in Card Minimum Receiver Path Sensitivity Requirements at 2.5 GT/s ............. 60 4.8.5. Add-in Card Minimum Receiver Path Sensitivity Requirements at 5.0 GT/s ............. 61 4.8.6. Add-in Card Minimum Receiver Path Sensitivity Requirements at 8.0 GT/s ............. 62 4.8.7. System Board Transmitter Path Compliance Eye Diagram at 2.5 GT/s .................... 65 4.8.8. System Board Transmitter Path Compliance Eye Diagram at 5.0 GT/s .................... 66 4.8.9. System Board Transmitter Path Compliance Eye Diagram at 8.0 GT/s .................... 69 4.8.10. System Board Minimum Receiver Path Sensitivity Requirements at 2.5 GT/s ........... 72 4.8.11. System Board Minimum Receiver Path Sensitivity Requirements at 5.0 GT/s ........... 73 4.8.12. System Board Minimum Receiver Path Sensitivity Requirements at 8.0 GT/s ........... 75 5. 150 W, 225 W, AND 300 W ADD-IN CARD POWER . (77)

5.1. 150 W ADD-IN CARD POWER-UP SEQUENCING .............................................................. 79 5.2. 225 W AND 300 W ADD-IN CARD POWER-UP SEQUENCING ......................................... 81 6. CARD CONNECTOR SPECIFICATION .. (86)

6.1. CONNECTOR PINOUT ............................................................................................................ 86 6.2. CONNECTOR INTERFACE DEFINITIONS ........................................................................... 89 6.3. SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES ................................ 94 6.3.1. Signal Integrity Requirements .................................................................................... 94 6.3.2. Signal Integrity Requirements and Test Procedures for 2.5 GT/s Support ................ 94 6.3.3. Signal Integrity Requirements and Test Procedures for 5.0 GT/s Support ................ 97 6.3.3.1 Test Fixture Requirements ...................................................................... 99 6.3.4. Signal Integrity Requirements and Test Procedures for 8.0 GT/s Support .............. 100 6.3.4.1 Test Fixture Requirements .................................................................... 101 6.4. CONNECTOR ENVIRONMENTAL AND OTHER REQUIREMENTS .............................. 101 6.4.1. Environmental Requirements ................................................................................... 101 6.4.2. Mechanical Requirements ........................................................................................ 103 6.4.3. Current Rating Requirement .................................................................................... 104 6.4.4. Additional Considerations ........................................................................................ 104 7. PCI EXPRESS 2 X 3 AUXILIARY POWER CONNECTOR DEFINITION (106)

7.1. 6-POSITION POWER CONNECTOR SYSTEM PERFORMANCE REQUIREMENTS ..... 106 7.2. 6-POSITION PCB HEADER ................................................................................................... 106 7.2.1. 6-Position R/A Thru-Hole PCB Header Assembly ................................................... 106 7.2.2. 6-Position R/A Thru-Hole Header Recommended PCB Footprint .......................... 108 7.2.3. 6-Position R/A SMT PCB Header Assembly ............................................................ 109 7.2.4. R/A SMT Header Recommended PCB Footprint .. (110)

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

5 7.3. 6-POSITION CABLE ASSEMBLY ........................................................................................ 111 7.4. CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE) .. 112 7.5. 6-POSITION POWER CONNECTOR SYSTEM PIN ASSIGNMENT ................................. 113 7.6. ADDITIONAL CONSIDERATIONS ...................................................................................... 114 8. PCI EXPRESS 2 X 4 AUXILIARY POWER CONNECTOR DEFINITION (115)

8.1. 2 X 4 AUXILIARY POWER CONNECTOR PERFORMANCE REQUIREMENTS ........... 118 8.2. 2 X 4 RECEPTACLE ............................................................................................................... 118 8.2.1. Connector Drawing .................................................................................................. 118 8.2.2. PCB Footprint .......................................................................................................... 120 8.3. CABLE ASSEMBLY ............................................................................................................... 121 8.4. CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE) .. 123 8.5. 2 X 4 AUXILIARY POWER CONNECTOR SYSTEM PIN ASSIGNMENT ....................... 124 8.6. ADDITIONAL CONSIDERATIONS .. (126)

9. ADD-IN CARD FORM FACTORS AND IMPLEMENTATION ..................................127 9.1. ADD-IN CARD FORM FACTORS......................................................................................... 127 9.2. CONNECTOR AND ADD-IN CARD LOCATIONS ............................................................. 146 9.3. CARD INTEROPERABILITY ................................................................................................ 155 9.4. 150W-ATX THERMAL MANAGEMENT ............................................................................. 156 10. PCI EXPRESS 225 W/300 W ADD-IN CARD THERMAL AND ACOUSTIC MANAGEMENT .. (157)

10.1. INLET TEMPERATURE ........................................................................................................ 157 10.2. CARD THERMAL CHARACTERIZATION PROCEDURE ................................................. 158 10.3. ACOUSTIC MANAGEMENT ................................................................................................ 162 10.3.1. Background and Scope ............................................................................................. 162 10.3.2. Card Acoustic Characterization Procedure ............................................................. 162 10.3.3. Acoustic Recommendations and Guidelines . (163)

A. INSERTION LOSS VALUES (VOLTAGE TRANSFER FUNCTION) (INFORMATIONAL ONLY) (164)

B. 8.0 GT/S TEST CHANNELS ..............................................................................................167 11. ACKNOWLEDGEMENTS (168)

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

6 Figures

FIGURE 2-2: EXAMPLE CURRENT MODE REFERENCE CLOCK SOURCE TERMINATION 23 FIGURE 2-3: SINGLE-ENDED MEASUREMENT POINTS FOR ABSOLUTE CROSS POINT AND SWING ............................................................................................................... 25 FIGURE 2-4: SINGLE-ENDED MEASUREMENT POINTS FOR DELTA CROSS POINT .......... 26 FIGURE 2-5: SINGLE-ENDED MEASUREMENT POINTS FOR RISE AND FALL TIME MATCHING ................................................................................................................ 26 FIGURE 2-6: DIFFERENTIAL MEASUREMENT POINTS FOR DUTY CYCLE AND PERIOD 26 FIGURE 2-7: DIFFERENTIAL MEASUREMENT POINTS FOR RISE AND FALL TIME .......... 27 FIGURE 2-8: DIFFERENTIAL MEASUREMENT POINTS FOR RINGBACK ............................. 27 FIGURE 2-9: REFERENCE CLOCK SYSTEM MEASUREMENT POINT AND LOADING ....... 27 FIGURE 2-10: POWER UP ................................................................................................................ 30 FIGURE 2-11: POWER MANAGEMENT STATES ......................................................................... 31 FIGURE 2-12: OUT-OF-TOLERANCE THRESHOLD WINDOWS ............................................... 32 FIGURE 2-13: POWER DOWN ......................................................................................................... 33 FIGURE 2-14: WAKE# RISE AND FALL TIME MEASUREMENT POINTS ............................... 40 FIGURE 3-1: PRESENCE DETECT IN A HOT-PLUG ENVIRONMENT ...................................... 42 FIGURE 4-1: PCI EXPRESS ON THE SYSTEM BOARD ............................................................... 48 FIGURE 4-2: PCI EXPRESS CONNECTOR ON SYSTEM BOARD WITH AN ADD-IN CARD . 48 FIGURE 4-3: PCI EXPRESS CONNECTOR ON A RISER CARD WITH AN ADD-IN CARD .... 49 FIGURE 4-4: LINK DEFINITION FOR TWO COMPONENTS ...................................................... 50 FIGURE 4-5: JITTER BUDGET ........................................................................................................ 51 FIGURE 4-6: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE DIAGRAM ............ 57 FIGURE 4-7: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE DIAGRAM ............ 59 FIGURE 4-8: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR ADD-IN CARD RECEIVER PATH COMPLIANCE ............................................................................ 61 FIGURE 4-9: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR ADD-IN CARD RECEIVER PATH COMPLIANCE ............................................................................ 62 FIGURE 4-10: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM .................................................................................................................. 65 FIGURE 4-11: TWO PORT MEASUREMENT FUNCTIONAL BLOCK DIAGRAM.................... 66 FIGURE 4-12: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM .................................................................................................................. 68 FIGURE 4-13: TWO PORT MEASUREMENT FUNCTIONAL BLOCK DIAGRAM.................... 69 FIGURE 4-14: SYSTEM BOARD TRANSMITTER PATH COMPOSITE COMPLIANCE EYE DIAGRAM .................................................................................................................. 71 FIGURE 4-15: REPRESENTATIVE COMPOSITE EYE DIAGRAM FOR SYSTEM BOARD RECEIVER PATH COMPLIANCE ............................................................................ 74 FIGURE 5-1: PCI EXPRESS 150W-ATX POWER-UP SEQUENCE .............................................. 79 FIGURE 6-1: CONNECTOR FORM FACTOR ................................................................................. 90 FIGURE 6-2: RECOMMENDED FOOTPRINT ................................................................................ 91 FIGURE 6-3: ADD-IN CARD EDGE-FINGER DIMENSIONS ....................................................... 92 FIGURE 6-4: ILLUSTRATION OF ADJACENT PAIRS ................................................................. 97 FIGURE 6-5: CONTACT RESISTANCE MEASUREMENT POINTS .......................................... 102 FIGURE 7-1: 6-POSITION R/A THRU-HOLE PCB HEADER...................................................... 107 FIGURE 7-2: 6-POSITION R/A THRU-HOLE HEADER RECOMMENDED PCB FOOTPRINT108 FIGURE 7-3: R/A SMT PCB HEADER ........................................................................................... 109 FIGURE 7-4: SMT HEADER RECOMMENDED PCB FOOTPRINT ........................................... 110 FIGURE 7-5: CABLE CONNECTOR HOUSING (111)

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

7 FIGURE 7-6: CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE) ................................................................................................................. 112 FIGURE 7-7: 150W-ATX POWER CONNECTOR ......................................................................... 113 FIGURE 8-1: 2 X 4 PLUG MATING WITH A 2 X 4 RECEPTACLE............................................ 115 FIGURE 8-2: 2 X 3 PLUG MATING WITH A 2 X 4 RECEPTACLE............................................ 116 FIGURE 8-3: 2 X 4 PLUG IS PHYSICALLY PREVENTED FROM MATING WITH A 2 X 3 RECEPTACLE .......................................................................................................... 117 FIGURE 8-4: 2 X 4 R/A THROUGH-HOLE RECEPTACLE DRAWING ..................................... 119 FIGURE 8-5: 2 X 4 R/A THROUGH-HOLE RECPTACLE RECOMMENDED PCB FOOTPRINT120 FIGURE 8-6: CABLE PLUG CONNECTOR HOUSING ............................................................... 121 FIGURE 8-7: MODULAR PLUG CONNECTOR HOUSING (ALL DIMENSIONS IN MM [INCHES]) ................................................................................................................. 122 FIGURE 8-8: CONNECTOR MATING-UNMATING KEEP-OUT AREA (LATCH LOCK RELEASE) ................................................................................................................. 123 FIGURE 8-9: 2 X 4 AUXILIARY POWER CONNECTOR PLUG SIDE PIN-OUT ...................... 124 FIGURE 8-10: 2 X 4 AUXILIARY POWER CONNECTOR RECEPTACLE SIDE PIN-OUT ..... 124 FIGURE 8-11: 2 X 3 AUXILIARY POWER CONNECTOR PIN-OUT ......................................... 125 FIGURE 9-1: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITHOUT THE I/O BRACKET ................................................................................................................. 128 FIGURE 9-2: CHASSIS INTERFACE ZONES ON RIGHT/EAST EDGE OF ADD-IN CARD ... 129 FIGURE 9-3: STANDARD HEIGHT PCI EXPRESS ADD-IN CARD WITH THE I/O BRACKET AND CARD RETAINER .......................................................................................... 130 FIGURE 9-4: ADDITIONAL FEATURE AND KEEPOUTS FOR A HIGH MASS CARD .......... 132 FIGURE 9-5: STANDARD ADD-IN CARD I/O BRACKET ......................................................... 134 FIGURE 9-6: LOW PROFILE PCI EXPRESS ADD-IN CARD WITHOUT THE I/O BRACKET 136 FIGURE 9-7: CHASSIS INTERFACE ZONE ON RIGHT/EAST EDGE OF LOW PROFILE ADD-IN CARD ................................................................................................................... 137 FIGURE 9-8: LOW PROFILE PCI EXPRESS ADD-IN CARD WITH THE I/O BRACKET ....... 138 FIGURE 9-9: LOW PROFILE I/O BRACKET ................................................................................ 139 FIGURE 9-10: FULL HEIGHT I/O BRACKET FOR LOW PROFILE CARDS ............................ 140 FIGURE 9-11: PCI EXPRESS DUAL-SLOT ADD-IN CARD DIMENSIONAL DRAWING ...... 141 FIGURE 9-12: PCI EXPRESS TRIPLE-SLOT ADD-IN CARD DIMENSIONAL DRAWING .... 142 FIGURE 9-13: DETAILED TWO-SLOT I/O BRACKET DESIGN ................................................ 143 FIGURE 9-14: TWO-SLOT I/O BRACKET EXAMPLE (ISOMETRIC VIEW) ........................... 143 FIGURE 9-15: DETAILED THREE-SLOT I/O BRACKET DESIGN ............................................ 144 FIGURE 9-16: THREE-SLOT I/O BRACKET EXAMPLE (ISOMETRIC VIEW) ........................ 145 FIGURE 9-17: EXAMPLE OF A PC SYSTEM IN MICROATX FORM FACTOR ...................... 146 FIGURE 9-18: INTRODUCTION OF A PCI EXPRESS CONNECTOR IN A MICROATX SYSTEM .................................................................................................................... 147 FIGURE 9-19: MORE PCI EXPRESS CONNECTORS ARE INTRODUCED ON A MICROATX SYSTEM BOARD ..................................................................................................... 148 FIGURE 9-20: PCI EXPRESS CONNECTOR LOCATION IN A MICROATX SYSTEM WITH ONE PCI EXPRESS CONNECTOR ......................................................................... 149 FIGURE 9-21: PCI EXPRESS CONNECTOR LOCATION IN A MICROATX SYSTEM WITH TWO PCI EXPRESS CONNECTORS...................................................................... 150 FIGURE 9-22: STANDARD HEIGHT CONNECTOR OPENING IN CHASSIS .......................... 151 FIGURE 9-23: LOW PROFILE CONNECTOR OPENING IN CHASSIS ..................................... 152 FIGURE 9-24: CHASSIS I/O CABLE KEEPOUT .......................................................................... 153 FIGURE 9-25: IMPACT OF STRUCTURAL SHAPES IN THE SYSTEM ................................... 154 FIGURE 9-26: CARD ASSEMBLED IN CONNECTOR . (155)

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

8 FIGURE 10-1: EXAMPLE OF HIGH-POWER CARD SHOWING TEMPERATURE SENSOR PLACEMENTS AT THE THERMAL SOLUTION INLET ..................................... 157 FIGURE 10-2: THERMAL CHARACTERIZATION FIXTURE – DUAL-SLOT VERSION ....... 159 FIGURE 10-3: THERMAL CHARACTERIZATION FIXTURE – TRIPLE-SLOT VERSION ..... 160 FIGURE 10-4: THERMAL CHARACTERIZATION FIXTURE – TANDEM DUAL-SLOT VERSION .................................................................................................................. 161 FIGURE A-1: EXAMPLE INTERCONNECT TERMINATED AT THE CONNECTOR INTERFACE.............................................................................................................. 164 FIGURE A-2: INSERTION LOSS BUDGETS .. (165)

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

9 Tables

TABLE 1-1: POWER SUPPLY RAIL REQUIREMENTS ...................................................................... 20 TABLE 2-1: REFCLK DC SPECIFICATIONS AND AC TIMING REQUIREMENTS ........................ 24 TABLE 2-2: MAXIMUM ALLOWED PHASE JITTER WHEN APPLIED TO FIXED FILTER CHARACTERISTIC ............................................................................................. 29 TABLE 2-3: AUXILIARY SIGNAL DC SPECIFICATIONS - PERST#, WAKE#, AND SMBUS ....... 39 TABLE 2-4: POWER SEQUENCING AND RESET SIGNAL TIMINGS .............................................. 40 TABLE 4-1: POWER SUPPLY RAIL REQUIREMENTS ...................................................................... 44 TABLE 4-2: TOTAL SYSTEM JITTER BUDGET FOR 2.5 GT/S SIGNALING .................................. 52 TABLE 4-3: ALLOCATION OF INTERCONNECT JITTER BUDGET FOR 2.5 GT/S SIGNALING . 52 TABLE 4-4: TOTAL SYSTEM JITTER BUDGET FOR 5.0 GT/S SIGNALING .................................. 53 TABLE 4-5: ALLOWABLE INTERCONNECT LANE-TO-LANE SKEW ........................................... 54 TABLE 4-6: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 2.5 GT/S ......................................................................................................................... 56 TABLE 4-7: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 5.0 GT/S AND 3.5 DB DE-EMPHASIS ....................................................................... 57 TABLE 4-8: ADD-IN CARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING AT 3.5 DB DE-EMPHASIS ................................................................................................ 58 TABLE 4-9: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 5.0 GT/S AT 6.0 DB DE-EMPHASIS ....................................................................................... 58 TABLE 4-10: ADD-IN CARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING AT 6.0 DB DE-EMPHASIS ................................................................................................................... 59 TABLE 4-11: ADD-IN CARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 8.0 GT/S ......................................................................................................................... 59 TABLE 4-12: ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 2.5 GT/S ......................................................................................................................... 60 TABLE 4-13: ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.0 GT/S ......................................................................................................................... 61 TABLE 4-14: LONG CHANNEL ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0 GT/S ......................................................................................... 63 TABLE 4-15: SHORT CHANNEL ADD-IN CARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0 GT/S ......................................................................................... 64 TABLE 4-16: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 2.5 GT/S ......................................................................................................................... 65 TABLE 4-17: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 5.0 GT/S ......................................................................................................................... 68 TABLE 4-18: SYSTEM BOARD JITTER REQUIREMENTS FOR 5.0 GT/S SIGNALING ................. 69 TABLE 4-19: SYSTEM BOARD TRANSMITTER PATH COMPLIANCE EYE REQUIREMENTS AT 8.0 GT/S WITH IDEAL ADAPTIVE TX EQUALIZATION ...................................... 71 TABLE 4-20: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 2.5 GT/S ......................................................................................................................... 72 TABLE 4-21: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.0 GT/S FOR A LINK THAT OPERATES WITH 3.5 DB DE-EMPHASIS ............. 73 TABLE 4-22: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 5.0 GT/S FOR A LINK THAT OPERATES WITH 6.0 DB DE-EMPHASIS ............. 74 TABLE 4-23: SYSTEM BOARD MINIMUM RECEIVER PATH SENSITIVITY REQUIREMENTS AT 8.0 GT/S . (76)

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

10 TABLE 5-1: PCI EXPRESS 300 W CARD (WITH ONE 2 X 4 AND ONE 2 X 3 CONNECTOR) PERMITTED INITIAL POWER DRAW............................................................................ 82 TABLE 5-2: PCI EXPRESS 300W CARD (WITH THREE 2 X 3 CONNECTORS) PERMITTED INITIAL POWER DRAW ................................................................................................... 82 TABLE 5-3: PCI EXPRESS 225 W CARD (WITH ONE 2 X 4 CONNECTOR) PERMITTED INITIAL POWER DRAW .................................................................................................................. 83 TABLE 5-4: PCI EXPRESS 225 W CARD (WITH TWO 2 X 3 CONNECTORS) PERMITTED INITIAL POWER DRAW ................................................................................................... 84 TABLE 5-5: PCI EXPRESS 225 W CARD (WITH ONE 2 X 3 AND ONE 2 X 4 CONNECTOR) PERMITTED INITIAL POWER DRAW............................................................................ 84 TABLE 6-1: PCI EXPRESS CONNECTORS PINOUT ........................................................................... 86 TABLE 6-2: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 2.5 GT/S SUPPORT ............................................................................................................................ 95 TABLE 6-3: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 5.0 GT/S SUPPORT ............................................................................................................................ 98 TABLE 6-4: SIGNAL INTEGRITY REQUIREMENTS AND TEST PROCEDURES FOR 8.0 GT/S SUPPORT .......................................................................................................................... 100 TABLE 6-5: TEST DURATIONS ........................................................................................................... 102 TABLE 6-6: MECHANICAL TEST PROCEDURES AND REQUIREMENTS ................................... 103 TABLE 6-7: END OF LIFE CURRENT RATING TEST SEQUENCE ................................................ 104 TABLE 6-8: ADDITIONAL REQUIREMENTS .................................................................................... 104 TABLE 7-1: 150W-ATX POWER CONNECTOR PIN-OUT ................................................................ 113 TABLE 7-2: PCI EXPRESS 150W-ATX POWER CONNECTOR ADDITIONAL REQUIREMENTS114 TABLE 8-1: 2 X 4 AUXILIARY POWER CONNECTOR PIN-OUT ASSIGNMENT ........................ 125 TABLE 8-2: SENSE PINS DECODING BY A GRAPHICS CARD ..................................................... 125 TABLE 8-3: 2 X 3 PLUG TO 2 X 4 RECEPTACLE PIN MAPPING ................................................... 126 TABLE 8-4: ADDITIONAL REQUIREMENTS .................................................................................... 126 TABLE 9-1: ADD-IN CARD SIZES ...................................................................................................... 127 TABLE 9-2: CARD INTEROPERABILITY .......................................................................................... 155 TABLE A-1: ALLOCATION OF INTERCONNECT PATH INSERTION LOSS BUDGET FOR 2.5 GT/S SIGNALING (165)

1 1.Introduction

This specification is a companion for the PCI Express Base Specification, Revision 3.0. Its primary focus is the implementation of an evolutionary strategy with the current PCI? desktop/server mechanical and electrical specifications. The discussions are confined to ATX or ATX-based form factors. Other form factors, such as PCI Express? Mini Card are covered in other separate specifications. This specification also provides additional capabilities for PCI Express graphics within the existing framework of an evolutionary strategy that is based on existing system board form factors. This specification has features designed to deliver additional electrical power to a PCI Express graphics add-in card and provide increased card volume for the management of thermals. The recent completion of Revision 1.0 of the Balanced Technology Extended (BTX) Interface Specification is acknowledged as an important upcoming form factor. The support of PCI Express 150 W in a BTX system was considered during the development of this specification, and it was agreed to that this version should target the ATX form factor. Expanding this specification in the future to support other form factors may be considered when compelling needs arise. As graphics power and thermal requirements have risen over time, the targeted application for this specification is broadened over the technology (AGP) that it replaces. As such, the PCI Express 150W-ATX portion of this specification is intended to support both workstation and consumer graphics along with other applications requiring additional power.

This specification addresses only the single card scenario for 150 W, 225 W, and 300 W cards. It is expected that, with tight cooperation between graphics card vendors or other high power card vendors and system OEMs, systems can scale and support multiple high power cards in a modular fashion.

This specification supports five distinct maximum power levels for add-in cards: 25 W (low profile card), 75 W (standard size), 150 W, 225 W, and 300 W. In order to achieve maximum interoperability and a non-compromised end user experience, intermediate power levels leveraging optional components of PCI Express Base Specification, Revision 3.0 are outside the scope of the PCI Express electromechanical specification.

This specification does not support the optional hot-plug functionality for 150 W, 225 W, or 300 W cards.

11

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

12 1.1.

Terms and Definitions add-in card

A card that is plugged into a connector and mounted in a chassis slot. AIC

Add-in card. AGP

Accelerated Graphics Port. ATX A system board form factor. Refer to the ATX Specification, Revision. 2.2.

ATX-based form factor Refers to the form factor that does not exactly conform to the ATX specification, but uses the key features of the ATX, such as the slot spacing, I/O panel definition, etc.

Auxiliary signals Signals not required by the PCI Express architecture but necessary for certain desired functions or system implementation, for example, the SMBus signals.

Basic bandwidth Contains one PCI Express Lane.

x1, x2, x4, x8, x12, x16

x1 refers to one PCI Express Lane of basic bandwidth; x4 refers to a collection of four PCI Express Lanes; etc. Card Interoperability Ability to plug a PCI Express card into different Link connectors and the system works, for example, plugging a PCI Express x1 I/O card into a x16 slot. CEM

Card Electromechanical. Down-plugging

Plugging a larger Link card into a smaller Link connector, for example, plugging a x4 card into a x1 connector. DUAL-SLOT Card

A card that plugs into a single edge connector – but whose volume occupies a total of two adjacent expansion slots. ECN Engineering Change Notice.

Evolutionary strategy A strategy to develop the PCI Express connector and card form factors within today’s chassis and system board form factor infrastructure constraints.

High bandwidth

Supports larger number of PCI Express Lanes, such as a x16 card or connector. HE

High-End. Hot-Plug Insertion and/or removal of a card into an active backplane or system board as defined in PCI Standard Hot-Plug Controller and Subsystem Specification, Revision. 1.0. No special card support is required.

Hot swap Insertion and/or removal of a card into a passive backplane. The card must satisfy specific requirements to support Hot swap.

Link A collection of one or more PCI Express Lanes.

Low profile card An add-in card whose height is no more than 68.90 mm (2.731 inches).

microATX An ATX-based system board form factor. Refer to the microATX Motherboard Interface Specification, Revision 1.2.

PCIe PCI Express.

PCI Express Mini Card PCI Express for mobile form factor, similar to Mini PCI.

PCI Express Lane One PCI Express Lane contains two differential lines for Transmitter and two differential lines for Receiver. A by-N Link is composed of N Lanes.

Receiver path

The path from the connector to the receiver for a differential data pair (system) or the edge finger to the receiver (add-in card).

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

13 SINGLE-SLOT Card

A card that uses a single expansion slot. sideband signaling A method for signaling events and conditions using physical signals separate from signals forming the Link between two components.

Standard height card An add-in card whose maximum height is no more than 111.28 mm (4.376 inches). Transmitter path The path from the transmitter to the connector for a differential data pair (system) or the transmitter to the edge finger (add-in card).

TRIPLE-SLOT Card A card that plugs into a single edge connector – but whose volume occupies a total of three adjacent expansion slots.

Up-plugging Plugging a smaller Link card into a larger Link connector, for example, plugging a x1 card into a x4 connector.

wakeup

A mechanism used by a component to request the reapplication of main power when in the L2 Link state. Two such mechanisms are defined in the PCI Express Base Specification, Revision 2.0: Beacon and WAKE#. This specification requires the use of WAKE# on any add-in card or system board that supports wakeup functionality. 1.2. Reference Documents

This specification references the following documents:

PCI Express Base Specification, Revision 3.0

PCI Express Base Specification, Revision 2.0

PCI Local Bus Specification, Revision 3.0

PCI Express Jitter Modeling

PCI Express Jitter and BER

ATX Specification, Revision 2.2

microATX Motherboard Interface Specification, Revision 1.2

SMBus Specification, Revision 2.0

JTAG Specification (IEEE1149.1)

PCI Standard Hot-Plug Controller and Subsystem Specification, Revision 1.0

Compact PCI Hot Swap Specification

EIA-364-1000.01: Environmental Test Methodology for Assessing the Performance of Electrical Connectors and Sockets Used in Business Office Applications

EIA-364: Electrical Connector/Socket Test Procedures Including Environmental Classifications

ISO 3744, Acoustics – Determination of Sound Power Levels of Noise Sources Using Sound Pressure – Engineering Method in an Essentially Free Field Over a Reflecting Plane

ISO 7779, Acoustics – Measurement of Airborne Noise Emitted by Information Technology and Telecommunications Equipment

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

14 1.3. Specification Contents

This specification contains the following information:

? Auxiliary signals

? Add-in card hot insertion and removal

? Power delivery

? Add-in card electrical budget

? Connector specification

5 ? Card form factors and implementation

? System requirements

? Supplemental power connector specification

1.4. Objectives

The objectives of this specification are:

? Support 8.0 GT/s data rate (per direction)

? Support 5.0 GT/s data rate (per direction)

10 ? Support 2.5 GT/s data rate (per direction)

? Enable Hot-Plug and hot swap where they are needed

? Leverage desktop and server commonality

? Facilitate smooth transitions

? Allow co-existence of both PCI and PCI Express add-in cards

15 ? No chassis or other PC infrastructure changes

? Forward looking for future scalability

? Extensible for future bandwidth needs

? Allows future evolution of PC architecture

? Maximize card interoperability for user flexibility

20 ? Low cost

? Support for PCI Express add-in cards that have higher power requirements ? Allow evolution of the PC architecture including graphics

? Upgradeability

? Enhanced end user experience

25

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

15 1.5. Electrical Overview

The electrical part of this specification covers auxiliary signals, hot insertion and removal, power delivery, and add-in card interconnect electrical budgets for the evolutionary strategy. The PCI Express Transmitter and Receiver electrical requirements are specified in the PCI Express Base Specification, Revision 3.0.

Besides the signals that are required to transmit/receive data on the PCI Express interface, there are also signals that may be necessary to implement the PCI Express interface in a system environment, or to provide certain desired functions. These signals are referred to as the auxiliary signals. They include:

? Reference clock (REFCLK), must be supplied by the system (see Section 2.1.1)

? Add-in card presence detect pins (PRSNT1# and PRSNT2#), required

? PERST#, required

? JTAG, optional

? SMBus, optional

5 ? Wake (WAKE#), required only if the device/system supports wakeup and/or the OBFF mechanism

? +3.3Vaux, optional

REFCLK, JTAG, SMBus, PERST#, and WAKE# are described in Chapter 2; +3.3Vaux is described in Chapter 4; and PRSNT1# and PRSNT2# are described in Chapter 3.

Both Hot-Plug and hot swap of PCI Express add-in cards are supported, but their implementation is optional. Hot-Plug is supported with the evolutionary add-in card form factor. Hot swap is supported with other form factors and will be described in other specifications.

To support Hot-Plug, presence detect pins (PRSNT1# and PRSNT2#) are defined in each end of the connectors and add-in cards. Those presence detect pins are staggered on the add-in cards such that they are last-mate and first-break, detecting the presence of the add-in cards. Chapter 3 discusses the detailed implementation of PCI Express Hot-Plug.

Chapter 4 specifies the PCI Express add-in card electrical requirements, which include power delivery and interconnect electrical budgets. Power is delivered to the PCI Express add-in cards via add-in card connectors, using three voltage rails: +3.3V, +3.3Vaux, and +12V. Note that the +3.3Vaux voltage rail is not required for all platforms (refer to Section 4.1 for more information on the required usage of 3.3Vaux). The maximum add-in card power definitions are based on the card size and Link widths, and are described in Section 4.2. Chapter 4 describes the interconnect electrical budgets, focusing on the add-in card loss and jitter requirements.

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

16 1.6. Mechanical Overview

PCI Express can be used in many different applications in desktop, mobile, server, as well as networking and communication equipment. Consequently, multiple variations of form factors and connectors will exist to suit the unique needs of these different applications.

Figure 1-1 shows an example of the vertical edge-card PCI Express connector to be used in ATX or ATX-based systems. There will be a family of such connectors, containing one to 16 PCI Express Lanes. The basic bandwidth (BW) version supports one PCI Express Lane and could be used as the replacement for the PCI connector. The high bandwidth version will support 16 PCI Express Lanes and will be used for applications that require higher bandwidth, such as graphics.

OM14739

Figure 1-1: Vertical Edge-Card Connector

Vertical edge card connectors also have applications in the server market segment. Figure 1-2 shows an example of a server configuration using a PCI Express riser card.

OM14740

Figure 1-2: Example Server I/O Board with PCI Express Slots on a Riser

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

17 Mobile applications require a right angle edge card connector. The definition of such a connector will be covered in a separate document.

For certain server and network applications, there may also be a need for a Compact PCI-like PCI Express connector, or other backplane-type PCI Express connectors.

PCI Express cable connectors may also be needed for within-system applications, both internally (inside the chassis) and externally (outside the chassis).

While the reality of multiple variations of PCI Express connectors and form factors is recognized, no attempt will be made to define every possible PCI Express connector and form factor variation in this specification. They will be defined later as the need arises in other specifications. This specification, instead, focuses on the vertical edge card PCI Express connectors and form factor requirements by covering the following:

? Connector mating interfaces and footprints

? Electrical, mechanical, and reliability requirements of the connectors, including the connector testing procedures

? Add-in card form factors – including their keep-out areas within the card as well as the keep-out areas required to exit the chassis including the I/O connectors and mating cables for a typical 5 desktop system chassis (ATX/microATX form factor).

? Connector and add-in card locations, as well as keep-outs on a typical desktop system board (ATX/microATX form factor)

Connector definitions and requirements are addressed in Chapter 5 and add-in card form factors and implementation are discussed in Chapter 6.

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

18 1.7. 150 W Overview

A PCI Express 150W-ATX add-in card is defined as a card that consumes greater than 75 W with support for up to 150 W inclusive. A card that uses a single expansion slot is described as a SINGLE-SLOT add-in card. A card that extends into the adjacent expansion slot is described as a DUAL-SLOT add-in card. A card that extends into the two adjacent expansion slots is described as a TRIPLE-SLOT add-in card. A 150 W add-in card, as with any CEM add-in card, may be SINGLE-SLOT, DUAL-SLOT, or TRIPLE-SLOT. A system that supports a PCI Express 150W-ATX add-in card is required to ensure that sufficient power and thermal support exists. For example, in an ATX form factor system, the adjacent expansion slot can be left vacant allowing for 1.37 inches of clearance for the add-in card as illustrated in Figure 1-3 to support a 150 W or lower power DUAL-SLOT add-in card.

A-0392A

[0.800]

[0.800]AND END ALL DIMENSIONS: mm [inches]

Figure 1-3: Example Orientation for DUAL-SLOT Add-in Cards

A DUAL-SLOT add-in card plugs into the standard PCI Express connector but is not permitted to plug into any other adjacent add-in card connectors for any purpose.

A PCI Express 150W-ATX add-in card can draw a maximum of 75 W from the standard CEM connector. Additional power, up to 75 W, is provided through an additional connector that is detailed in this specification. Therefore, the maximum power that must be provided to a PCI Express 150W-ATX add-in card is 150 W.

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

19 1.8. 225 W and 300 W Add-in Card Overview

A PCI Express 225 W add-in card is defined as a card that exceeds PCI Express 150 W 1.0 power delivery or thermal capability and, as such, consumes greater than 150 W with support for up to 225 W inclusive. This card, as with any CEM add-in card, may be a SINGLE-SLOT, DUAL-SLOT, or TRIPLE-SLOT add-in card. A system that supports a PCI Express 225 W add-in card is required to ensure that sufficient power and thermal support exists. For example, in an ATX system, the adjacent expansion slot may be left vacant allowing for 34.8 mm (1.37 inches) maximum clearance for the add-in card, as illustrated in Figure 1-3. The area on the add-in card that can utilize this height, as well as the restricted height of the secondary side, is determined by the general PCI Express add-in card requirements for these dimensions.

A PCI Express 300 W add-in card is defined as a card that consumes greater than 225 W with support for up to 300 W inclusive. This card, as with any CEM add-in card, may be a SINGLE-SLOT, DUAL-SLOT, or TRIPLE-SLOT add-in card. A system that supports a PCI Express 300 W add-in card is required to ensure that sufficient power and thermal support exists. As another example, in an ATX form factor system, the adjacent expansion slot may be left vacant allowing for 55.12 mm (2.17 inches) maximum clearance for the add-in card, as illustrated in Figure 1-4. The area on the add-in card that can utilize this height, as well as the restricted height of the secondary side, is determined by the general PCI Express add-in card requirements for these dimensions.

A-0898

[0.800][0.800][0.800]

ADD-IN CARD AND END ALL DIMENSIONS: mm [inches]

Figure 1-4: Example Orientation for TRIPLE-SLOT Cards

A PCI Express 225 W/300 W add-in card can draw a maximum of 75 W through the standard connector. Additional power, up to 150 W for the 225 W add-in card and up to 225 W for the 300 W add-in card, is provided through additional auxiliary connector(s) that is detailed in this specification.

PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0

20 1.9. System Power Delivery Requirements

A system that supports a PCI Express 225 W/300 W add-in card must deliver the +12 V to the standard connector and the additional +12 V via additional auxiliary power supply connector(s), from the same or different rails in the power supply. This is up to the discretion of the system designer. For each 2 x 3 or 2 x 4 auxiliary power connector, the power supplied through the different pins must come from the same rail in the power supply. For add-in card requirements, refer to Chapter 5.

Table 1-1 provides the required specifications for the power supply rails available at the PCI Express slot and auxiliary power connectors. The system designer is responsible for ensuring that the power delivered to the auxiliary connectors meets the specifications called out in Table 1-1. Table 1-1: Power Supply Rail Requirements

Power Rail

75 W Slot 2 x 3 Connector 2 x 4 Connector Remarks +12V

Voltage Tolerance

Supply Current

±8% 5.5 A +5/-8% 6.25 A +5/-8% 12.5 A Maximum voltage variation between +12 V inputs is 1.92 V.

Implementation Note

PCI Express Slot Requirements The 75 W slot requirements are defined in this specification. PCI Express 225 W/300 W add-in cards must be capable of accommodating the maximum voltage variation between the 75 W slot, 2 x 3 and 2 x 4 connector +12 V inputs.

2

2. Auxiliary Signals

The auxiliary signals are provided on the connector to assist with certain system level functionality or implementation. These signals are not required by the PCI Express architecture. The high-speed signal voltage levels are compatible with advanced silicon processes. The optional low speed signals are defined to use the +3.3V or +3.3Vaux supplies, as they are the lowest common voltage available.

Most ASIC processes have high voltage (thick gate oxide) I/O transistors compatible with 3.3 V.

Use of the 3.3 V supply allows PCI Express signaling to be used with existing control bus structures, avoiding a buffered set of signals and bridges between the buses.

The PCI Express connector and add-in card interfaces support the following auxiliary signals:

?REFCLK-/REFCLK+ (required): low voltage differential signals.

Note: Requirements for REFCLK for a system board that supports 8.0 GT/s or 5.0 GT/s signaling are defined in PCI Express Base Specification, Revision 3.0. A system board that supports 5.0 GT/s maximum rate signaling or 8.0 GT/s maximum rate signaling must provide a reference clock that meets all requirements1 for the common clock architecture defined for the reference clock in the PCI Express Base Specification, Revision 3.0 and all the

requirements defined in this specification. A system board that only supports 2.5 GT/s signaling must meet all

reference clock requirements in this specification.

?PERST# (required): indicates when the applied main power is within the specified tolerance and stable. PERST# goes inactive after a delay of TPVPERL time from the power rails achieving

specified tolerance on power up.

?WAKE#: an open-drain, active low signal that is driven low by a PCI Express function to re-

5

activate the PCI Express Link hierarchy’s main power rails and reference clocks. It is required on any add-in card or system board that supports wakeup functionality compliant with this

specification. WAKE# is also used by the system to signal to the PCI Express function in

conjunction with the Optimized Buffer Flush/Fill (OBFF) mechanism.

?SMBCLK (optional): the SMBus interface clock signal. It is an open-drain signal.

10

?SMBDAT (optional): the SMBus interface address/data signal. It is an open-drain signal.

?JTAG (TRST#, TCLK, TDI, TDO, and TMS) (optional): the pins to support IEEE Standard

1149.1, Test Access Port and Boundary Scan Architecture (JTAG). They are included as an

optional interface for PCI Express devices. IEEE Standard 1149.1 specifies the rules and

permissions for designing an 1149.1-compliant IC.

15

?PRSNT1# (required): add-in card presence detect pin. See Chapter 3 for a detailed description.

1 The RMS jitter requirements are excluded. They are covered under the two port motherboard test methodology

and requirements defined in this specification.

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