STM32L151产品技术说明书

June 2011 Doc ID 17659 Rev 51/110

STM32L151xx STM32L152xx

Ultralow power ARM-based 32-bit MCU with up to 128 KB Flash,RTC, LCD, USB, USART, I2C, SPI, timers, ADC, DAC, comparators

Features

■

Operating conditions

–Operating power supply range: 1.65V to 3.6V (without BOR) or 1.8V to 3.6V (with BOR option)

–Temperature range: –40 to 85 °C ■

Low power features

– 4 modes: Sleep, Low-power run (9μA at 32kHz), Low-power sleep (4.4μA),

Stop with RTC (1.45μA), Stop (570 nA), Standby (300nA)

–Dynamic core voltage scaling down to 233μA/MHz

–Ultralow leakage per I/O: 50nA –Fast wakeup from Stop: 8μs –Three wakeup pins

■

Core: ARM 32-bit Cortex ?-M3 CPU –32 MHz maximum frequency,

33.3 DMIPS peak (Dhrystone 2.1)–Memory protection unit

■

Reset and supply management

–Low power, ultrasafe BOR (brownout reset) with 5 selectable thresholds –Ultralow power POR/PDR

–Programmable voltage detector (PVD)■

Clock management

– 1 to 24 MHz crystal oscillator

–32 kHz oscillator for RTC with calibration –Internal 16 MHz factory-trimmed RC –Internal 37 kHz low consumption RC

–Internal multispeed low power RC, 64 kHz to 4MHz with a consumption down to 1.5 μA

–PLL for CPU clock and USB (48MHz)■Low power calendar RTC

–Alarm, periodic wakeup from Stop/Standby ■

Memories

–Up to 128 Kbyte of Flash memory with ECC – 4 Kbyte of data EEPROM with ECC

■Up to 83 fast I/Os (73 of which are 5V-tolerant) all mappable on 16 external interrupt vectors ■Development support

–Serial wire debug, JTAG and trace ■DMA: 7-channel DMA controller, supporting timers, ADC, SPIs, I 2Cs and USARTs ■LCD 8 × 40 or 4 × 44 with step-up converter ■

12-bit ADC up to 1Msps/24 channels

–Temperature sensor and internal voltage reference

–Operates down to 1.8 V ■ 2 × 12-bit DACs with output buffers ■ 2 ultralow power comparators

–Window mode and wakeup capability ■

10 timers:

– 6 × 16-bit general-purpose timers, each with up to 4 IC/OC/PWM channels – 2 × 16-bit basic timers

– 2 × watchdog timers (independent and window)■

Up to 8 communication interfaces

–Up to 2 × I 2C interfaces (SMBus/PMBus)–Up to 3 × USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)–Up to 2 × SPIs (16 Mbit/s)–USB 2.0 full speed interface ■

CRC calculation unit, 96-bit unique ID

Table 1.

Device summary

Reference

Part number

STM32L151xx

STM32L151CB, STM32L151C8, STM32L151C6, STM32L151RB, STM32L151R8, STM32L151R6,STM32L151VB, STM32L151V8

STM32L152xx

STM32L152CB, STM32L152C8, STM32L152C6,STM32L152RB, STM32L152R8, STM32L152R6, STM32L152VB, STM32L152V8

733abb8ccc22bcd126ff0cd6

Contents STM32L151xx, STM32L152xx

Contents

1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2Ultralow power device continuum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.1Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.2Shared peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.3Common system strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2.4Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.1Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.2ARM? Cortex?-M3 core with MPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.3Reset and supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3.1Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3.2Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3.3Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.3.4Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.4Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.5Low power real-time clock and backup registers . . . . . . . . . . . . . . . . . . . 17

3.6GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.7Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.8DMA (direct memory access) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.9LCD (liquid crystal display) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.10ADC (analog-to-digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.11DAC (digital-to-analog converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.12Ultralow power comparators and reference voltage . . . . . . . . . . . . . . . . . 21

3.13Routing interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.14Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1

4.1General-purpose timers (TIM2, TIM3, TIM4, TIM9, TIM10 and TIM11) 21

3.1

4.2Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.1

4.3SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.1

4.4Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2/110 Doc ID 17659 Rev 5

STM32L151xx, STM32L152xx Contents

3.1

4.5Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.15Communication interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.1I2C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.2Universal synchronous/asynchronous receiver transmitter (USART) . . 23

3.15.3Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.15.4Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.16CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 23

3.17Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

6Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1.1Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1.2Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1.3Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1.4Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1.5Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

6.1.6Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6.1.7Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6.2Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

6.3Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6.3.1General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6.3.2Embedded reset and power control block characteristics . . . . . . . . . . . 46

6.3.3Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 48

6.3.4Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

6.3.5External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

6.3.6Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

6.3.7PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

6.3.8Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

6.3.9EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

6.3.10Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 72

6.3.11I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

6.3.12I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

6.3.13NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

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Contents STM32L151xx, STM32L152xx

6.3.14TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

6.3.15Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

6.3.1612-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

6.3.17DAC electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.3.18Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

6.3.19Comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

6.3.20LCD controller (STM32L152xx only) . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

7Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

7.1Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

7.2Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

7.2.1Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 8Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 9Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

4/110 Doc ID 17659 Rev 5

STM32L151xx, STM32L152xx List of tables List of tables

Table 1.Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2.Ultralow power STM32L15xxx device features and peripheral counts. . . . . . . . . . . . . . . . 10 Table 3.Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 4.STM32L15xxx pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 5.Alternate function input/output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Table 6.Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 7.Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 8.Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 9.General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 10.Functionalities depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . 45 Table 11.Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 12.Embedded internal reference voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Table 13.Current consumption in Run mode, code with data processing running from Flash. . . . . . 49 Table 14.Current consumption in Run mode, code with data processing running from RAM. . . . . . 50 Table 15.Current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 16.Current consumption in Low power run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Table 17.Current consumption in Low power sleep mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 18.Typical and maximum current consumptions in Stop mode. . . . . . . . . . . . . . . . . . . . . . . . 54 Table 19.Typical and maximum current consumptions in Standby mode . . . . . . . . . . . . . . . . . . . . . 56 Table 20.Typical and maximum timings in Low power modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Table 21.Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 22.High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Table 23.Low-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 24.HSE 1-24 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Table 25.LSE oscillator characteristics (f LSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Table 26.HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 27.LSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Table 28.MSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Table 29.PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Table 30.RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 31.Flash memory characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 32.Flash memory endurance and data retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Table 33.EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Table 34.EMI characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 35.ESD absolute maximum ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 36.Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 37.I/O current injection susceptibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 38.I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Table 39.Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Table 40.I/O AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Table 41.NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Table 42.TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Table 43.I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Table 44.SCL frequency (f PCLK1= 32 MHz, V DD = 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Table 45.SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 733abb8ccc22bcd126ff0cd6B startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Table 733abb8ccc22bcd126ff0cd6B DC electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Table 733abb8ccc22bcd126ff0cd6B: full speed electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

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List of tables STM32L151xx, STM32L152xx Table 49.ADC clock frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Table 50.ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Table 51.ADC accuracy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Table 52.R AIN max for f ADC = 16 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Table 53.DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 Table 54.TS characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Table 733abb8ccc22bcd126ff0cd6parator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Table 733abb8ccc22bcd126ff0cd6parator 2 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 Table 57.LCD controller characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Table 58.UFQFPN48 – ultra thin fine pitch quad flat pack no-lead 7 × 7 mm, 0.5 mm

pitch package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Table 59.TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package mechanical data. . 100 Table 60.UFBGA100 - ultra fine pitch ball grid array, 7 x 7 mm, 0.50 mm pitch, package

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Table 61.LQPF100, 14 x 14 mm, 100-pin low-profile quad flat package mechanical data . . . . . . . 103 Table 62.LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package mechanical data . . . . . . . . . 104 Table 63.LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package mechanical data . . . . . . . . . . . 105 Table 64.Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106 Table 65.Ordering information scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 6/110 Doc ID 17659 Rev 5

STM32L151xx, STM32L152xx List of figures List of figures

Figure 1.Ultralow power STM32L15xxx block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 2.Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 3.STM32L15xxx UFBGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 4.STM32L15xxx TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 5.STM32L15xxx LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 6.STM32L15xxx LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 7.STM32L15xxx LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 8.STM32L15xxx UFQFPN48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 9.Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Figure 10.Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 11.Pin input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 12.Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 13.Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 14.Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 15.High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 16.HSE oscillator circuit diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 17.Typical application with a 32.768 kHz crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Figure 18.I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Figure 19.Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Figure 20.I2C bus AC waveforms and measurement circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Figure 21.SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Figure 22.SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Figure 23.SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 Figure 733abb8ccc22bcd126ff0cd6B timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 Figure 25.ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Figure 26.Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 Figure 27.Maximum dynamic current consumption on V REF+ supply pin during ADC

conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91 Figure 28.Power supply and reference decoupling (V REF+ not connected to V DDA). . . . . . . . . . . . . . 92 Figure 29.Power supply and reference decoupling (V REF+ connected to V DDA). . . . . . . . . . . . . . . . . 92 Figure 30.12-bit buffered /non-buffered DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Figure 31.UFQFPN48 7 x 7 mm, 0.5 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Figure 32.Recommended footprint (dimensions in mm)(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Figure 33.TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package outline . . . . . . . . . 100 Figure 34.Recommended PCB design rules for pads (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . . . 101 Figure 35.UFBGA100 - ultra fine pitch ball grid array, 7 x 7 mm, 0.50 mm pitch,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Figure 36.LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package outline. . . . . . . . . . . . . . . 103 Figure 37.Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103 Figure 38.LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package outline. . . . . . . . . . . . . . . . . 104 Figure 39.Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Figure 40.LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package outline. . . . . . . . . . . . . . . . . . . 105 Figure 41.Recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Doc ID 17659 Rev 57/110

Introduction STM32L151xx, STM32L152xx 8/110 Doc ID 17659 Rev 51 I

ntroduction

This datasheet provides the ordering information and mechanical device characteristics of

the STM32L151xx and STM32L152xx ultralow power ARM Cortex?-based microcontrollers

product line.

The ultralow power STM32L15xxx family includes devices in 3 different package types: from

48 pins to 100 pins. Depending on the device chosen, different sets of peripherals are

included, the description below gives an overview of the complete range of peripherals

proposed in this family.

These features make the ultralow power STM32L15xxx microcontroller family suitable for a

wide range of applications:

●

Medical and handheld equipment ●

Application control and user interface ●

PC peripherals, gaming, GPS and sport equipment ●

Alarm systems, Wired and wireless sensors, Video intercom ●Utility metering

For information on the Cortex?-M3 core please refer to the Cortex?-M3 Technical

Reference Manual, available from the 733abb8ccc22bcd126ff0cd6 website at the following address:

733abb8ccc22bcd126ff0cd6/help/index.jsp?topic=/com.arm.doc.ddi0337g.

Figure 1 shows the general block diagram of the device family.

STM32L151xx, STM32L152xx Description 2 Description

The ultralow power STM32L15xxx incorporates the connectivity power of the universal

serial bus (USB) with the high-performance ARM Cortex?-M3 32-bit RISC core operating at

a 32MHz frequency, a memory protection unit (MPU), high-speed embedded memories

(Flash memory up to 128Kbytes and RAM up to 16 Kbytes), and an extensive range of

enhanced I/Os and peripherals connected to two APB buses. All devices offer a 12-bit ADC,

2 DACs and 2 ultralow power comparators, six general-purpose 16-bit timers and two basic

timers, which can be used as time bases. Moreover, the STM32L15xxx devices contain

standard and advanced communication interfaces: up to two I2Cs and SPIs, three USARTs

and a USB. They also include a real-time clock and a set of backup registers that remain

powered in Standby mode. Finally, the integrated LCD controller has a built-in LCD voltage

generator that allows you to drive up to 8 multiplexed LCDs with contrast independent of the

supply voltage.

The ultralow power STM32L15xxx operates from a 1.8 to 3.6V power supply (down to

1.65V at power down) with BOR and from a 1.65 to 3.6V power supply without BOR option.

It is available in the -40 to +85°C temperature range. A comprehensive set of power-saving

modes allows the design of low-power applications.

Doc ID 17659 Rev 59/110

Description STM32L151xx, STM32L152xx

10/110 Doc ID 17659 Rev 5

2.1 Device overview

.

Table 2.

Ultralow power STM32L15xxx device features and peripheral counts Peripheral

STM32L15xCx STM32L15xRx

STM32L15xVx Flash - Kbytes 3264128326412864128RAM - Kbytes

10

1016

10

1016

10

16

Timers

General-purpose 666Basic 222Communication interfaces

SPI

222I 2C 222USART 333USB

111GPIOs

37518312-bit synchronized ADC Number of channels 1

16 channels

1

20 channels

1

24 channels

12-bit DAC

Number of channels 22

2222

LCD (STM32L152xx Only)COM x SEG

4x164x328x284x448x40Comparator 2

22

CPU frequency 32 MHz

Operating voltage 1.8 V to 3.6 V (down to 1.65 V at power-down)

with BOR option

1.65 V to 3.6 V without BOR option

Operating temperatures Ambient temperatures: –40 to +85 °C Junction temperature: –40 to + 105 °C Packages

LQFP48, UFQFPN48

LQFP64, BGA64

LQFP100, BGA100

STM32L151xx, STM32L152xx Description

Doc ID 17659 Rev 511/1102.2 Ultralow power device continuum

The ultralow power STM32L151xx and STM32L152xx are fully pin-to-pin, software and

feature compatible. Besides the full compatibility within the family, the devices are part of

STMicroelectronics microcontrollers ultralow power strategy which also includes

STM8L101xx and STM8L15xx devices. The STM8L and STM32L families allow a

continuum of performance, peripherals, system architecture and features.

They are all based on STMicroelectronics 0.13μm ultralow leakage process.

Note:The ultralow power STM32L and general-purpose STM32Fxxxx families are pin-to-pin

compatible. The STM8L15xxx devices are pin-to-pin compatible with the STM8L101xx

devices. Please refer to the STM32F and STM8L documentation for more information on

these devices.

2.2.1 Performance

All families incorporate highly energy-efficient cores with both Harvard architecture and

pipelined execution: advanced STM8 core for STM8L families and ARM Cortex?-M3 core

for STM32L family. In addition specific care for the design architecture has been taken to

optimize the mA/DMIPS and mA/MHz ratios.

This allows the ultralow power performance to range from 5 up to 33.3DMIPs.

2.2.2 Shared peripherals

STM8L15xxx and STM32L15xxx share identical peripherals which ensure a very easy

migration from one family to another:

●

Analog peripherals: ADC, DAC, and comparators ●Digital peripherals: RTC and some communication interfaces

2.2.3 Common system strategy

To offer flexibility and optimize performance, the STM8L15xx and STM32L15xx families use

a common architecture:

●

Same power supply range from 1.65 V to 3.6V , (1.65V at power down only for STM8L15xx devices)●

Architecture optimized to reach ultralow consumption both in low power modes and Run mode ●

Fast startup strategy from low power modes ●

Flexible system clock ●Ultrasafe reset: same reset strategy including power-on reset, power-down reset, brownout reset and programmable voltage detector.

2.2.4 Features

ST ultralow power continuum also lies in feature compatibility:

●

More than 10 packages with pin count from 20 to 100 pins and size down to 3 x 3mm ●Memory density ranging from 4 to 128Kbytes

Functional overview STM32L151xx, STM32L152xx

12/110 Doc ID 17659 Rev 5

3 Functional overview

Figure 1 shows the block diagrams.

1.AF = alternate function on I/O port pin.

STM32L151xx, STM32L152xx Functional overview

Doc ID 17659 Rev 513/1103.1 Low power modes

The ultralow power STM32L15xxx supports dynamic voltage scaling to optimize its power

consumption in run mode. The voltage from the internal low-drop regulator that supplies the

logic can be adjusted according to the system’s maximum operating frequency and the

external voltage supply:

●

In range 1 (V DD range limited to 2.0-3.6 V), the CPU runs at up to 32 MHz (refer to Table 13 for consumption).●

In range 2 (full V DD range), the CPU runs at up to 16MHz (refer to Table 13 for consumption)●In range 3 (full V DD range), the CPU runs at up to 4MHz (generated only with the

multispeed internal RC oscillator clock source). Refer to T able 13 for consumption.

Seven low power modes are provided to achieve the best compromise between low power

consumption, short startup time and available wakeup sources:

●Sleep mode

In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can

wake up the CPU when an interrupt/event occurs.

Sleep mode power consumption: refer to Table 15.

●Low power run mode

This mode is achieved with the multispeed internal (MSI) RC oscillator set to the

minimum clock (65 kHz), execution from SRAM or Flash memory, and internal regulator

in low power mode to minimize the regulator's operating current. In the Low power run

mode, the clock frequency and the number of enabled peripherals are both limited.

Low power run mode consumption: refer to T able 16.

●Low power sleep mode

This mode is achieved by entering the Sleep mode with the internal voltage regulator in

Low power mode to minimize the regulator’s operating current. In the Low power sleep

mode, both the clock frequency and the number of enabled peripherals are limited; a

typical example would be to have a timer running at 32kHz.

When wakeup is triggered by an event or an interrupt, the system reverts to the run

mode with the regulator on.

Low power sleep mode consumption: refer to T able 17.

●Stop mode (with or without RTC)

The Stop mode achieves the lowest power consumption while retaining the RAM and

register contents. All clocks in the V CORE domain are stopped, the PLL, MSI RC, HSI

RC and HSE crystal oscillators are disabled. The voltage regulator is in the low power

mode.

The device can be woken up from the Stop mode by any of the EXTI line, in 8 μs. The

EXTI line source can be one of the 16 external lines, the PVD output, the RTC alarm(s),

the USB wakeup, the RTC tamper event, the RTC timestamp event, the RTC Wakeup,

the Comparator 1 event or Comparator 2 event.

Stop mode consumption: refer to Table 18.

●Standby mode (with or without RTC)

The Standby mode is used to achieve the lowest power consumption. The internal

voltage regulator is switched off so that the entire V CORE domain is powered off. The

PLL, MSI RC, HSI RC and HSE crystal oscillators are also switched off. After entering

Functional overview STM32L151xx, STM32L152xx Standby mode, the RAM and register contents are lost except for registers in the

Standby circuitry (wakeup logic, IWDG, RTC, LSI, LSE Crystal 32K osc, RCC CSR).

The device exits the Standby mode in 60 μs when an external reset (NRST pin), an

IWDG reset, a rising edge on one of the three WKUP pins, RTC alarm (Alarm A or

Alarm B), RTC tamper event, RTC timestamp event or RTC Wakeup event.

Standby mode consumption: refer to Table19.

Note:The RTC, the IWDG, and the corresponding clock sources are not stopped by entering the Stop or Standby mode.

3.2 ARM? Cortex?-M3 core with MPU

The ARM Cortex?-M3 processor is the latest generation of ARM processors for embedded

systems. It has been developed to provide a low-cost platform that meets the needs of MCU

implementation, with a reduced pin count and low-power consumption, while delivering

outstanding computational performance and an advanced system response to interrupts.

The ARM Cortex?-M3 32-bit RISC processor features exceptional code-efficiency,

delivering the high-performance expected from an ARM core in the memory size usually

associated with 8- and 16-bit devices.

The memory protection unit (MPU) improves system reliability by defining the memory

attributes (such as read/write access permissions) for different memory regions. It provides

up to eight different regions and an optional predefined background region.

Owing to its embedded ARM core, the STM32L15xxx is compatible with all ARM tools and

software.

Nested vectored interrupt controller (NVIC)

The ultralow power STM32L15xxx embeds a nested vectored interrupt controller able to

handle up to 45 maskable interrupt channels (not including the 16 interrupt lines of

Cortex?-M3) and 16 priority levels.

●Closely coupled NVIC gives low-latency interrupt processing

●Interrupt entry vector table address passed directly to the core

●Closely coupled NVIC core interface

●Allows early processing of interrupts

●Processing of late arriving, higher-priority interrupts

●Support for tail-chaining

●Processor state automatically saved

●Interrupt entry restored on interrupt exit with no instruction overhead

This hardware block provides flexible interrupt management features with minimal interrupt

latency.

14/110 Doc ID 17659 Rev 5

STM32L151xx, STM32L152xx Functional overview

Doc ID 17659 Rev 515/1103.3

Reset and supply management 3.3.1 Power supply schemes

●

V DD = 1.65 to 3.6 V: external power supply for I/Os and the internal regulator. Provided externally through V DD pins.●V SSA , V DDA = 1.65 to 3.6 V: external analog power supplies for ADC, reset blocks, RCs

and PLL (minimum voltage to be applied to V DDA is 1.8 V when the ADC is used).

V DDA and V SSA must be connected to V DD and V SS , respectively.

3.3.2 Power supply supervisor

The device has an integrated ZEROPOWER power-on reset (POR)/power-down reset

(PDR) that can be coupled with a brownout reset (BOR) circuitry.

For devices operating between 1.8 and 3.6V, the BOR is always active at power-on and

ensures proper operation starting from 1.8V. After the 1.8V BOR threshold is reached, the

option byte loading process starts, either to confirm or modify default thresholds, or to

disable BOR permanently (in which case, the V DD min value at power down is 1.65V). Five

BOR thresholds are available through option bytes, starting from 1.8V to 3V . To reduce the

power consumption in Stop mode, it is possible to automatically switch off the internal

reference voltage (V REFINT ) in Stop mode. The device remains in reset mode when V DD is

below a specified threshold, V POR/PDR or V BOR , without the need for any external reset

circuit.

Note:For devices operating between 1.65 V and 3.6 V, the BOR is permanently disabled.

Consequently, the start-up time at power-on can be decreased down to 1ms typically.

The device features an embedded programmable voltage detector (PVD) that monitors the

V DD /V DDA power supply and compares it to the V PVD threshold. This PVD offers 7 different

levels between 1.85V and 3.05V , chosen by software, with a step around 200mV. An

interrupt can be generated when V DD /V DDA drops below the V PVD threshold and/or when

V DD /V DDA is higher than the V PVD threshold. The interrupt service routine can then generate

a warning message and/or put the MCU into a safe state. The PVD is enabled by software.

3.3.3 Voltage regulator

The regulator has three operation modes: main (MR), low power (LPR) and power down.

●

MR is used in Run mode (nominal regulation)●

LPR is used in the Low-power run, Low-power sleep and Stop modes ●Power down is used in Standby mode. The regulator output is high impedance, the kernel circuitry is powered down, inducing zero consumption but the contents of the

registers and RAM are lost are lost except for the standby circuitry (wakeup logic,

IWDG, RTC, LSI, LSE crystal 32K osc, RCC_CSR).

3.3.4 Boot modes

At startup, boot pins are used to select one of three boot options:

●

Boot from Flash memory ●

Boot from System Memory ●Boot from embedded RAM

Functional overview STM32L151xx, STM32L152xx 16/110 Doc ID 17659 Rev 5The boot loader is located in System Memory. It is used to reprogram the Flash memory by

using USART1 or USART2. For further details please refer to AN2606.

3.4 Clock management

The clock controller distributes the clocks coming from different oscillators to the core and

the peripherals. It also manages clock gating for low power modes and ensures clock

robustness. It features:

●Clock prescaler : to get the best tradeoff between speed and current consumption, the clock frequency to the CPU and peripherals can be adjusted by a programmable

prescaler

●Safe clock switching : clock sources can be changed safely on the fly in run mode through a configuration register.

●Clock management : to reduce power consumption, the clock controller can stop the clock to the core, inpidual peripherals or memory.

●

Master clock source : three different clock sources can be used to drive the master clock:

–

1-24 MHz high-speed external crystal (HSE), that can supply a PLL –

16 MHz high-speed internal RC oscillator (HSI), trimmable by software, that can supply a PLL –Multispeed internal RC oscillator (MSI), trimmable by software, able to generate 7

frequencies (65.5kHz, 131kHz, 262kHz, 524kHz, 1.05MHz, 2.1MHz, 4.2MHz)

with a consumption proportional to speed, down to 750 nA typical. When a

32.768kHz clock source is available in the system (LSE), the MSI frequency can

be trimmed by software down to a ±0.5% accuracy.●Auxiliary clock source : two ultralow power clock sources that can be used to drive the LCD controller and the real-time clock:

–

32.768 kHz low-speed external crystal (LSE)–37 kHz low-speed internal RC (LSI), also used to drive the independent watchdog.

The LSI clock can be measured using the high-speed internal RC oscillator for

greater precision.

●

RTC and LCD clock sources: the LSI, LSE or HSE sources can be chosen to clock the RTC and the LCD, whatever the system clock.●

USB clock source: the embedded PLL has a dedicated 48MHz clock output to supply the USB interface.●Startup clock : after reset, the microcontroller restarts by default with an internal 2.1MHz clock (MSI). The prescaler ratio and clock source can be changed by the

application program as soon as the code execution starts.

●Clock security system (CSS): this feature can be enabled by software. If a HSE clock failure occurs, the master clock is automatically switched to HSI and a software

interrupt is generated if enabled.

●

Clock-out capability (MCO: microcontroller clock output): it outputs one of the

internal clocks for external use by the application.Several prescalers allow the configuration of the AHB frequency, the high-speed APB

(APB2) and the low-speed APB (APB1) domains. The maximum frequency of the AHB and

the APB domains is 32 MHz. See Figure 2 for details on the clock tree.

STM32L151xx, STM32L152xx

Functional overview

Doc ID 17659 Rev 517/110

2.For the USB function to be available, both HSE and PLL must be enabled, with the CPU running at either

24 MHz or 32MHz.

3.5 Low power real-time clock and backup registers

The real-time clock (RTC) is an independent BCD timer/counter. Dedicated registers contain the second, minute, hour (12/24 hour), week day, date, month, year, in BCD (binary-coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the month are made

Functional overview STM32L151xx, STM32L152xx 18/110 Doc ID 17659 Rev 5automatically. The RTC provides a programmable alarm and programmable periodic

interrupts with wakeup from Stop and Standby modes.

●

The programmable wakeup time ranges from 120 μs to 36 hours ●

Stop mode consumption with LSI and Auto-wakeup: 1.2μA (at 1.8V) and 1.4μA (at 3.0V)●Stop mode consumption with LSE, calendar and Auto-wakeup: 1.3μA (at 1.8V), 1.6μA (at 3.0V)

The RTC can be calibrated with an external 512Hz output, and a digital compensation

circuit helps reduce drift due to crystal deviation.

There are twenty 32-bit backup registers provided to store 80 bytes of user application data.

They are cleared in case of tamper detection.

3.6 GPIOs (general-purpose inputs/outputs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the

GPIO pins are shared with digital or analog alternate functions, and can be inpidually

remapped using dedicated AFIO registers. All GPIOs are high-current-capable. The

alternate function configuration of I/Os can be locked if needed following a specific

sequence in order to avoid spurious writing to the I/O registers. The I/O controller is

connected to the AHB with a toggling speed of up to 16 MHz.

External interrupt/event controller (EXTI)

The external interrupt/event controller consists of 23 edge detector lines used to generate

interrupt/event requests. Each line can be inpidually configured to select the trigger event

(rising edge, falling edge, both) and can be masked independently. A pending register

maintains the status of the interrupt requests. The EXTI can detect an external line with a

pulse width shorter than the Internal APB2 clock period. Up to 83 GPIOs can be connected

to the 16 external interrupt lines.

STM32L151xx, STM32L152xx Functional overview

Doc ID 17659 Rev 519/1103.7 Memories

The STM32L15xxx devices have the following features:

●Up to 16 Kbyte of embedded RAM accessed (read/write) at CPU clock speed with 0 wait states. With the enhanced bus matrix, operating the RAM does not lead to any

performance penalty during accesses to the system bus (AHB and APB buses).

●

The non-volatile memory is pided into three arrays:

–

32, 64 or 128 Kbyte of embedded Flash program memory –

4 Kbyte of data EEPROM –Options bytes The options bytes are used to write-protect the memory (with 4 KB granularity) and/or

readout-protect the whole memory with the following options:

–

Level 0: no readout protection –

Level 1: memory readout protection, the Flash memory cannot be read from or written to if either debug features are connected or boot in RAM is selected –Level 2: chip readout protection, debug features (Cortex-M3 JTAG and serial wire)

and boot in RAM selection disabled (JTAG fuse)

The whole non-volatile memory embeds the error correction code (ECC) feature.

3.8 DMA (direct memory access)

The flexible 7-channel, general-purpose DMA is able to manage memory-to-memory,

peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports

circular buffer management, avoiding the generation of interrupts when the controller

reaches the end of the buffer.

Each channel is connected to dedicated hardware DMA requests, with software trigger

support for each channel. Configuration is done by software and transfer sizes between

source and destination are independent.

The DMA can be used with the main peripherals: SPI, I 2C, USART , general-purpose timers

and ADC.

3.9 LCD (liquid crystal display)

The LCD drives up to 8 common terminals and 44 segment terminals to drive up to 320

pixels.

●Internal step-up converter to guarantee functionality and contrast control irrespective of V DD . This converter can be deactivated, in which case the V LCD pin is used to provide

the voltage to the LCD

●Supports static, 1/2, 1/3, 1/4 and 1/8 duty

●Supports static, 1/2, 1/3 and 1/4 bias

●Phase inversion to reduce power consumption and EMI

●Up to 8 pixels can be programmed to blink

●Unneeded segments and common pins can be used as general I/O pins

●LCD RAM can be updated at any time owing to a double-buffer

●

The LCD controller can operate in Stop mode

Functional overview STM32L151xx, STM32L152xx

3.10 ADC (analog-to-digital converter)

A 12-bit analog-to-digital converters is embedded into STM32L15xxx devices with up to 24

external channels, performing conversions in single-shot or scan mode. In scan mode,

automatic conversion is performed on a selected group of analog inputs.

The ADC can be served by the DMA controller.

An analog watchdog feature allows very precise monitoring of the converted voltage of one,

some or all selected channels. An interrupt is generated when the converted voltage is

outside the programmed thresholds.

The events generated by the general-purpose timers (TIMx) can be internally connected to

the ADC start trigger and injection trigger, to allow the application to synchronize A/D

conversions and timers.

The ADC includes a specific low power mode. The converter is able to operate at maximum

speed even if the CPU is operating at a very low frequency and has an auto-shutdown

function. The ADC’s runtime and analog front-end current consumption are thus minimized

whatever the MCU operating mode.

Temperature sensor

The temperature sensor has to generate a voltage that varies linearly with temperature. The

conversion range is between 1.8 V < V DDA < 3.6 V. The temperature sensor is internally

connected to the ADC_IN16 input channel.

3.11 DAC (digital-to-analog converter)

The two 12-bit buffered DAC channels can be used to convert two digital signals into two

analog voltage signal outputs. The chosen design structure is composed of integrated

resistor strings and an amplifier in non-inverting configuration.

This dual digital Interface supports the following features:

●two DAC converters: one for each output channel

●left or right data alignment in 12-bit mode

●synchronized update capability

●noise-wave generation

●triangular-wave generation

●dual DAC channels’ independent or simultaneous conversions

●DMA capability for each channel (including the underrun interrupt)

●external triggers for conversion

●input reference voltage V REF+

Eight DAC trigger inputs are used in the STM32L15xxx. The DAC channels are triggered

through the timer update outputs that are also connected to different DMA channels.

20/110 Doc ID 17659 Rev 5

STM32L151xx, STM32L152xx Functional overview

Doc ID 17659 Rev 521/1103.12 Ultralow power comparators and reference voltage The STM32L15xxx embeds two comparators sharing the same current bias and reference

voltage. The reference voltage can be internal or external (coming from an I/O).

●

one comparator with fixed threshold ●one comparator with rail-to-rail inputs, fast or slow mode. The threshold can be one of the following:

–

DAC output –

External I/O –Internal reference voltage (V REFINT ) or V REFINT submultiple (1/4, 1/2, 3/4)

Both comparators can wake up from Stop mode, and be combined into a window

comparator.

The internal reference voltage is available externally via a low power / low current output

buffer (driving current capability of 1μA typical).

3.13 Routing interface

This interface controls the internal routing of I/Os to TIM2, TIM3, TIM4 and to the

comparator and reference voltage output.

3.14 Timers and watchdogs

The ultralow power STM32L15xxx devices include six general-purpose timers, two basic

timers and two watchdog timers.

Table 3 compares the features of the general-purpose and basic timers.

3.1

4.1 General-purpose timers (T I

M2, TIM3, TIM4, TIM9, TIM10 and TIM11)

There are six synchronizable general-purpose timers embedded in the STM32L15xxx

devices (see Table 3 for differences).Table 3.

Timer feature comparison Timer

Counter resolution Counter type Prescaler factor DMA request generation Capture/compare channels Complementary outputs TIM2,

TIM3,

TIM4

16-bit Up, down, up/down Any integer between 1 and 65536Y es 4No TIM916-bit Up Any integer between 1

and 65536

No 2No TIM10, TIM1116-bit Up Any integer

between 1

and 65536

No 1No TIM6, TIM716-bit Up Any integer

between 1

and 65536Y es 0No

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