TI TUSB8041 四端口 USB 3.0 集线器 - 图文

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ProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityTUSB8041

SLLSEE4C–JUNE2014–REVISEDJULY2015

TUSB8041Four-PortUSB3.0Hub

1Features

???

FourPortUSB3.0HubUSB2.0HubFeatures

–MultiTransactionTranslator(MTT)Hub:FourTransactionTranslators

–FourAsynchronousEndpointBuffersPerTransactionTranslatorSupportsBatteryCharging

–CDPMode(UpstreamPortConnected)–DCPMode(UpstreamPortUnconnected)–DCPModeComplieswithChinese

TelecommunicationsIndustryStandardYD/T1591-2009

–D+/D-DividerMode

SupportsOperationasaUSB3.0orUSB2.0CompoundDevice

PerPortorGangedPowerSwitchingandOver-CurrentNotificationInputs

OTPROM,SerialEEPROMorI2C/SMBusSlaveInterfaceforCustomConfigurations:–VIDandPID

–PortCustomizations

–ManufacturerandProductStrings(notbyOTPROM)

–SerialNumber(notbyOTPROM)

ApplicationFeatureSelectionUsingPinSelectionorEEPROM/orI2C/SMBusSlaveInterfaceProvides128-BitUniversallyUniqueIdentifier(UUID)

SupportsOn-BoardandIn-SystemOTP/EEPROMProgrammingViatheUSB2.0UpstreamPort

SingleClockInput,24-MHzCrystalorOscillatorNoSpecialDriverRequirements;Works

SeamlesslyonanyOperatingSystemwithUSBStackSupport

64-PinQFNPackage(RGC)

2Applications

????

ComputerSystemsDockingStationsMonitors

Set-TopBoxes

3Description

TheTUSB8041isafour-portUSB3.0hub.ItprovidessimultaneousSuperSpeedUSBandhigh-speed/full-speedconnectionsontheupstreamportandprovidesSuperSpeedUSB,high-speed,full-speed,orlow-speedconnectionsonthedownstreamports.Whentheupstreamportisconnectedtoanelectricalenvironmentthatonlysupportshigh-speedorfull-speed/low-speedconnections,SuperSpeedUSBconnectivityisdisabledonthedownstreamports.Whentheupstreamportisconnectedtoanelectricalenvironmentthatonlysupportsfull-speed/low-speedconnections,SuperSpeedUSBandhigh-speedconnectivityaredisabledonthedownstreamports.

DeviceInformation(1)

PARTNUMBERTUSB8041TUSB8041I

PACKAGEVQFN(64)

BODYSIZE(NOM)9.00mm×9.00mm

(1)Forallavailablepackages,seetheorderableaddendumat

theendofthedatasheet.

4Diagram

USB3.0HDDUSB2.0HubUSB2.0WebcamUSB2.0HDDUSB1.1MousePersonalComputerTUSB8041USB2.0USB3.0HubUSB2.0PrinterUSB3.0HDDUSB3.0HDDUSB1.1KeyboardUSB1.x ConnectionUSB2.0ConnectionUSB3.0ConnectionUSB3.0HubUSB3.0DeviceUSB2.0DeviceUSB1.x DeviceAnIMPORTANTNOTICEattheendofthisdatasheetaddressesavailability,warranty,changes,useinsafety-criticalapplications,intellectualpropertymattersandotherimportantdisclaimers.PRODUCTIONDATA.TUSB8041

SLLSEE4C–JUNE2014–REVISEDJULY2015

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TableofContents

12345678

Features..................................................................Applications...........................................................Description.............................................................Diagram...................................................................RevisionHistory.....................................................Description(Continued)........................................PinConfigurationandFunctions.........................Specifications.........................................................

8.18.28.38.48.58.68.7

11112349

9.4DeviceFunctionalModes........................................159.5RegisterMaps.........................................................16

10ApplicationsandImplementation......................28

10.1ApplicationInformation..........................................2810.2TypicalApplication................................................28

11PowerSupplyRecommendations.....................36

11.1TUSB8041PowerSupply.....................................3611.2DownstreamPortPower.......................................3611.3Ground..................................................................36

AbsoluteMaximumRatings.....................................9ESDRatings..............................................................9RecommendedOperatingConditions.......................9ThermalInformation................................................10ElectricalCharacteristics,3.3-VI/O........................10TimingRequirements,Power-Up............................11HubInputSupplyCurrent.......................................11

12Layout...................................................................37

12.1LayoutGuidelines.................................................3712.2LayoutExamples...................................................38

13DeviceandDocumentationSupport.................40

13.113.213.313.4

CommunityResources..........................................Trademarks...........................................................ElectrostaticDischargeCaution............................Glossary................................................................

40404040

9DetailedDescription............................................12

9.1Overview.................................................................129.2FunctionalBlockDiagram.......................................129.3FeatureDescription.................................................12

14Mechanical,Packaging,andOrderable

Information...........................................................40

5RevisionHistory

ChangesfromRevisionB(January2015)toRevisionC?

Page

ChangedFigure12,addedVDDpin8................................................................................................................................33

Page

ChangesfromRevisionA(July2014)toRevisionB??????

AddedNote\switchingmustbesupportedforbatterychargingapplications\topinFULLPWRMGMTz/

SMBA1/SS_UPinthePinFunctionstable.............................................................................................................................7AddedNote\powercontrolmustbeenabledforbatterychargingapplications\topinGANGED/SMBA2/

HS_UPinthePinFunctionstable..........................................................................................................................................8ChangedtheHandlingRatingstabletotheESDRatingstable.............................................................................................9ChangedtheTimingRequirements,Power-Uptable:Deletedtextfromthetd1description:\isnotiming

relationshipbetweenVDD33andVDD\AddedNote2totheMINvalue...........................................................................11AddedNote:\activeresetisrequired..\TotheTimingRequirements,Power-Uptable.................................................11ChangedtextintheClock,Reset,andMiscsectionFrom:\PWRCTL_POLispulleddownwhichresultsin

activehighpowerenable\To:\PWRCTL_POLispulleddownwhichresultsinactivelowpowerenable\.................33

Page

ChangesfromOriginal(June2014)toRevisionA???????

ChangedthedevicestatusFrom:PreviewTo:Production...................................................................................................1ChangedFeatureFrom:SupportsUSBBatteryChargingSpecificationRevision1.2To:SupportsBatteryCharging.........1ChangedFeatureFrom:SupportsD+/D-DividerModeTo:D+/D-DividerMode..................................................................1ChangedDescriptionparagraph:\TUSB8041downstreamportsprovide...\3ChangedtheBatteryChargingFeaturessection.................................................................................................................13ChangedNote3ofTable1.................................................................................................................................................13ChangedNote1ofTable1.................................................................................................................................................13

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6Description(Continued)

TheTUSB8041supportsperportorgangedpowerswitchingandover-currentprotection,andsupportsbatterychargingapplications.

AnindividuallyportpowercontrolledhubswitchespoweronorofftoeachdownstreamportasrequestedbytheUSBhost.Alsowhenanindividuallyportpowercontrolledhubsensesanover-currentevent,onlypowertotheaffecteddownstreamportwillbeswitchedoff.

Agangedhubswitchesonpowertoallitsdownstreamportswhenpowerisrequiredtobeonforanyport.Thepowertothedownstreamportsisnotswitchedoffunlessallportsareinastatethatallowspowertoberemoved.Alsowhenagangedhubsensesanover-currentevent,powertoalldownstreamportswillbeswitchedoff.TheTUSB8041downstreamportsprovidesupportforbatterychargingapplicationsbyprovidingBatteryChargingDownstreamPort(CDP)handshakingsupport.ItalsosupportsaDedicatedChargingPort(DCP)modewhentheupstreamportisnotconnected.TheDCPmodesupportsUSBdeviceswhichsupportwiththeUSBBatteryChargingandChineseTelecommunicationsIndustryStandardYD/T1591-2009.Inaddition,anautomaticmodeprovidestransparentsupportforBCdevicesanddevicessupportingDividerModechargingsolutionswhentheupstreamportunconnected.

TheTUSB8041providespinstrapconfigurationforsomefeaturesincludingbatterychargingsupport,andalsoprovidescustomizationthoughOTPROM,I2CEEPROMorviaanI2C/SMBusslaveinterfaceforPID,VID,andcustomportandphyconfigurations.CustomstringsupportisalsoavailablewhenusinganI2CEEPROMortheI2C/SMBusslaveinterface.

Thedeviceisavailableina64-pinRGCpackageandisofferedinacommercialversion(TUSB8041)foroperationoverthetemperaturerangeof0°Cto70°C,andinanindustrialversion(TUSB8041I)foroperationoverthetemperaturerangeof-40°Cto85°C.

TUSB8041

SLLSEE4C–JUNE2014–REVISEDJULY2015

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7PinConfigurationandFunctions

RGCPackage

64Pin(TopView)

FULLPWRMGMTz/SMBA1/SS_UPAUTOENz/HS_SUSPENDSMBUSz/SS_SUSPENDGANGED/SMBA2/HS_UPPWRCTL1/BATEN1PWRCTL2/BATEN2484746454443424140393837363534TEST49GRSTz50VDD51VDD3352USB_DP_UP53USB_DM_UP54USB_SSTXP_UP55USB_SSTXM_UP56PWRCTL3/BATEN33332PWRCTL4/BATEN431VDD30USB_SSRXM_DN429USB_SSRXP_DN428VDD27USB_SSTXM_DN426USB_SSTXP_DN425USB_DM_DN424USB_DP_DN423USB_SSRXM_DN322USB_SSRXP_DN321VDD20USB_SSTXM_DN319USB_SSTXP_DN318USB_DM_DN317USB_DP_DN316PWRCTL_POLSDA/SMBDATSCL/SMBCLKOVERCUR2zOVERCUR1zOVERCUR3zOVERCUR4zUSB_VBUSVSSVDD57USB_SSRXP_UP58USB_SSRXM_UP59NC60XO61XI62VDD3363USB_R164123456789101112131415USB_SSRXM_DN1USB_DM_DN1USB_DP_DN1USB_SSTXM_DN1USB_SSTXP_DN1USB_SSRXP_DN1VDDVDDVDDUSB_SSRXM_DN2USB_SSTXM_DN2USB_SSRXP_DN2USB_SSTXP_DN2USB_DM_DN2USB_DP_DN2VDD334SubmitDocumentationFeedbackCopyright?2014–2015,TexasInstrumentsIncorporated

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PinFunctions

PINNAME

ClockandResetSignalsGRSTzXI

5062

IPUI

Globalpowerreset.ThisresetbringsalloftheTUSB8041internalregisterstotheirdefaultstates.WhenGRSTzisasserted,thedeviceiscompletelynonfunctional.

Crystalinput.Thispinisthecrystalinputfortheinternaloscillator.Theinputmayalternatelybedrivenbytheoutputofanexternaloscillator.Whenusingacrystala1-M?feedbackresistorisrequiredbetweenXIandXO.

Crystaloutput.Thispinisthecrystaloutputfortheinternaloscillator.IfXIisdrivenbyanexternaloscillatorthispinmaybeleftunconnected.Whenusingacrystala1-M?feedbackresistorisrequiredbetweenXIandXO.

USBSuperSpeedtransmitterdifferentialpair(positive)USBSuperSpeedtransmitterdifferentialpair(negative)USBSuperSpeedreceiverdifferentialpair(positive)USBSuperSpeedreceiverdifferentialpair(negative)USBHigh-speeddifferentialtransceiver(positive)USBHigh-speeddifferentialtransceiver(negative)

Precisionresistorreference.A9.53-k?±1%resistorshouldbeconnectedbetweenUSB_R1andGND.

USBupstreamportpowermonitor.TheVBUSdetectionrequiresavoltagedivider.ThesignalUSB_VBUSmustbeconnectedtoVBUSthrougha90.9-K?±1%resistor,andtogroundthrougha10-k?±1%resistorfromthesignaltoground.USBSuperSpeedtransmitterdifferentialpair(positive)USBSuperSpeedtransmitterdifferentialpair(negative)USBSuperSpeedreceiverdifferentialpair(positive)USBSuperSpeedreceiverdifferentialpair(negative)USBHigh-speeddifferentialtransceiver(positive)USBHigh-speeddifferentialtransceiver(negative)

USBPort1PowerOnControlforDownstreamPower/BatteryChargingEnable.ThepinisusedforcontrolofthedownstreampowerswitchforPort1.

PWRCTL1/BATEN1

Inaddition,thevalueofthepinissampledatthede-assertionofresettodeterminethevalue

I/O,PDofthebatterychargingsupportforPort1asindicatedintheBatteryChargingSupport

0=Batterychargingnotsupported1=Batterychargingsupported

USBPort1Over-CurrentDetection.ThispinisusedtoconnecttheovercurrentoutputofthedownstreamportpowerswitchforPort1.0=Anovercurrenteventhasoccurred

OVERCUR1z

I,PU

1=Anovercurrenteventhasnotoccurred

Thispincanbeleftunconnectedifpowermanagementisnotimplemented.Ifpower

managementisenabled,theexternalcircuitryneededshouldbedeterminedbythepowerswitch.

USB_SSTXP_DN2USB_SSTXM_DN2USB_SSRXP_DN2USB_SSRXM_DN2USB_DP_DN2USB_DM_DN2

11121415910

OOIII/OI/O

NO.

I/O

DESCRIPTION

USBUpstreamSignalsUSB_SSTXP_UPUSB_SSTXM_UPUSB_SSRXP_UPUSB_SSRXM_UPUSB_DP_UPUSB_DM_UPUSB_R1USB_VBUS

USBDownstreamSignalsUSB_SSTXP_DN1USB_SSTXM_DN1USB_SSRXP_DN1USB_SSRXM_DN1USB_DP_DN1USB_DM_DN1

61O

5556585953546448

OOIII/OI/OII

346712

OOIII/OI/O

TUSB8041

SLLSEE4C–JUNE2014–REVISEDJULY2015

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PinFunctions(continued)

PINNAME

NO.

I/O

DESCRIPTION

USBPort2PowerOnControlforDownstreamPower/BatteryChargingEnable.ThepinisusedforcontrolofthedownstreampowerswitchforPort2.

PWRCTL2/BATEN2

Inaddition,thevalueofthepinissampledatthede-assertionofresettodeterminethevalue

I/O,PDofthebatterychargingsupportforPort2asindicatedintheBatteryChargingSupport

0=Batterychargingnotsupported1=Batterychargingsupported

USBPort2Over-CurrentDetection.ThispinisusedtoconnecttheovercurrentoutputofthedownstreamportpowerswitchforPort2.

OVERCUR2z

I,PU

0=Anovercurrenteventhasoccurred1=Anovercurrenteventhasnotoccurred

Thispinbeleftunconnectedifpowermanagementisnotimplemented.Ifpowermanagementisenabled,theexternalcircuitryneededshouldbedeterminedbythepowerswitch.

USB_SSTXP_DN3USB_SSTXM_DN3USB_SSRXP_DN3USB_SSRXM_DN3USB_DP_DN3USB_DM_DN3

192022231718

OOIII/OI/O

USBPort3PowerOnControlforDownstreamPower/BatteryChargingEnable.ThepinisusedforcontrolofthedownstreampowerswitchforPort3.

PWRCTL3/BATEN3

Inaddition,thevalueofthepinissampledatthede-assertionofresettodeterminethevalue

I/O,PDofthebatterychargingsupportforPort3asindicatedintheBatteryChargingSupport

0=Batterychargingnotsupported1=Batterychargingsupported

USBPort3Over-CurrentDetection.ThispinisusedtoconnecttheovercurrentoutputofthedownstreamportpowerswitchforPort3.0=Anovercurrenteventhasoccurred

OVERCUR3z

I,PU

1=Anovercurrenteventhasnotoccurred

Thispincanbeleftunconnectedifpowermanagementisnotimplemented.Ifpower

managementisenabled,theexternalcircuitryneededshouldbedeterminedbythepowerswitch.

USB_SSTXP_DN4USB_SSTXM_DN4USB_SSRXP_DN4USB_SSRXM_DN4USB_DP_DN4USB_DM_DN4

262729302425

OOIII/OI/O

USBPort4PowerOnControlforDownstreamPower/BatteryChargingEnable.ThepinisusedforcontrolofthedownstreampowerswitchforPort4.

PWRCTL4/BATEN4

Inaddition,thevalueofthepinissampledatthede-assertionofresettodeterminethevalue

I/O,PDofthebatterychargingsupportforPort4asindicatedintheBatteryChargingSupport

0=Batterychargingnotsupported1=Batterychargingsupported

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PinFunctions(continued)

PINNAME

NO.

I/O

DESCRIPTION

USBPort4Over-CurrentDetection.ThispinisusedtoconnecttheovercurrentoutputofthedownstreamportpowerswitchforPort4.0=Anovercurrenteventhasoccurred

OVERCUR4z

I,PU

1=Anovercurrenteventhasnotoccurred

Thispincanbeleftunconnectedifpowermanagementisnotimplemented.Ifpower

managementisenabled,theexternalcircuitryneededshouldbedeterminedbythepowerswitch.

I2C/SMBUSSignals

I2Cclock/SMBusclock.FunctionofpindependsonthesettingoftheSMBUSzinput.

SCL/SMBCLK

I/O,PD

WhenSMBUSz=1,thispinactsastheserialclockinterfaceforanI2CEEPROM.WhenSMBUSz=0,thispinactsastheserialclockinterfaceforanSMBushost.Canbeleftunconnectedifexternalinterfacenotimplemented.

I2Cdata/SMBusdata.FunctionofpindependsonthesettingoftheSMBUSzinput.

SDA/SMBDAT

I/O,PD

WhenSMBUSz=1,thispinactsastheserialdatainterfaceforanI2CEEPROM.WhenSMBUSz=0,thispinactsastheserialdatainterfaceforanSMBushost.Canbeleftunconnectedifexternalinterfacenotimplemented.

I2C/SMBusmodeselect/SuperSpeedUSBSuspendStatus.Thevalueofthepinissampledatthede-assertionofresetsetI2CorSMBusmodeasfollows:1=I2CModeSelected

SMBUSz/SS_SUSPEND

I/O,PU

0=SMBusModeSelected

Canbeleftunconnectedifexternalinterfacenotimplemented.

Afterreset,thissignalindicatestheSuperSpeedUSBSuspendstatusoftheupstreamportifenabledthroughtheAdditionalFeatureConfigurationregister.Whenenabledavalueof1indicatestheconnectionissuspended.

TestandMiscellaneousSignals

Fullpowermanagementenable/SMBusaddressbit1/SuperSpeedUSBConnectionStatusUpstreamport.

Thevalueofthepinissampledatthede-assertionofresettosetthepowerswitchcontrolfollows:

0=Powerswitchingandovercurrentinputssupported1=Powerswitchingandovercurrentinputsnotsupported

FULLPWRMGMTz/SMBA1/SS_UP

Fullpowermanagementistheabilitytocontrolpowertothedownstreamportsofthe

I/O,PDTUSB8041usingPWRCTL[4:1]/BATEN[4:1].

WhenSMBusmodeisenabledusingSMBUSz,thispinsetsthevalueoftheSMBusslaveaddressbit1.

CanbeleftunconnectediffullpowermanagementandSMBusarenotimplemented.Afterreset,thissignalindicatestheSuperSpeedUSBconnectionstatusoftheupstreamportifenabledthroughtheAdditionalFeatureConfigurationregister.Whenenabledavalueof1indicatestheupstreamportisconnectedtoaSuperSpeedUSBcapableport.Note:Powerswitchingmustbesupportedforbatterychargingapplications.PowerControlPolarity.

PWRCTL_POL

Thevalueofthepinissampledatthede-assertionofresettosetthepolarityof

I/O,PUPWRCTL[4:1].

0=PWRCTLpolarityisactivelow

1=PWRCTLpolarityisactivehigh

TUSB8041

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PinFunctions(continued)

PINNAME

NO.

I/O

DESCRIPTION

Gangedoperationenable/SMBusAddressbit2/HSConnectionStatusUpstreamPort.Thevalueofthepinissampledatthede-assertionofresettosetthepowerswitchandovercurrentdetectionmodeasfollows:

0=Individualpowercontrolsupportedwhenpowerswitchingisenabled

GANGED/SMBA2/HS_UP

1=Powercontrolgangssupportedwhenpowerswitchingisenabled

I/O,PD

WhenSMBusmodeisenabledusingSMBUSz,thispinsetsthevalueoftheSMBusslaveaddressbit2.

Afterreset,thissignalindicatestheHigh-speedUSBconnectionstatusoftheupstreamportifenabledthroughtheAdditionalFeatureConfigurationregister.Whenenabledavalueof1indicatestheupstreamportisconnectedtoaHigh-speedUSBcapableport.Note:Individualpowercontrolmustbeenabledforbatterychargingapplications.AutomaticChargeModeEnable/HSSuspendStatus.

Thevalueofthepinissampledatthede-assertionofresettodetermineifautomaticmodeisenabledasfollows:

0=AutomaticModeisenabledonportsthatareenabledforbatterychargingwhenthehubisunconnected.PleasenotethatCDPisnotsupportedonPort1whenoperatinginAutomaticmode.

1=AutomaticModeisdisabled

ThisvalueisalsousedtosettheautoEnzbitintheBatteryChargingSupportRegister.Afterreset,thissignalindicatestheHigh-speedUSBSuspendstatusoftheupstreamportifenabledthroughtheAdditionalFeatureConfigurationregister.Whenenabledavalueof1indicatestheconnectionissuspended.

TEST

PowerandGroundSignalsVDD

5,8,13,21,28,31,51,5716,34,52,63THERMALPAD60

PWR

1.1-Vpowerrail

I,PD

Thispinisreservedforfactorytest.

AUTOENz/HS_SUSPEND

45I/O,PU

VDD33VSSNC

PWRPWR—

3.3-Vpowerrail

Ground.Thermalpadmustbeconnectedtoground.Noconnect,leavefloating

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8Specifications

8.1AbsoluteMaximumRatings(1)

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

MIN

SupplyVoltageRange

VDDSteady-statesupplyvoltageVDD33Steady-statesupplyvoltage

USB_SSRXP_UP,USB_SSRXN_UP,USB_SSRXP_DN[4:1],USB_SSRXN_DP[4:1]andUSB_VBUSterminals

VoltageRange

XIterminalsAllotherterminals

Storagetemperature,Tstg(1)

–0.3–0.3-0.3-0.3-0.3–65

MAX1.43.81.42.453.8150

UNITVVVVV°C

StressesbeyondthoselistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice.Thesearestressratingsonly,whichdonotimplyfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderRecommendedOperatingConditions.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.

8.2ESDRatings

VALUE

Humanbodymodel(HBM),perANSI/ESDA/JEDECJS-001(1)

V(ESD)(1)(2)

Electrostaticdischarge

Chargeddevicemodel(CDM),perJEDECspecificationJESD22-C101(2)

±2000±500

VUNIT

JEDECdocumentJEP155statesthat500-VHBMallowssafemanufacturingwithastandardESDcontrolprocess.JEDECdocumentJEP157statesthat250-VCDMallowssafemanufacturingwithastandardESDcontrolprocess.

8.3RecommendedOperatingConditions

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

MIN

VDD

(1)

NOM1.13.3

MAX1.263.61.1557085105

UNITVVV°C°C°C

1.1Vsupplyvoltage3.3VsupplyvoltageVoltageatUSB_VBUSPADOperatingfree-airtemperatureOperatingjunctiontemperature

TUSB8041TUSB8041I

0.99300–40–40

VDD33USB_VBUSTATJ(1)

A1.05-V,1.1-V,or1.2-Vsupplymaybeusedaslongasminimumandmaximumsupplyconditionsaremet.

TUSB8041

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8.4ThermalInformation

TUSB8041

THERMALMETRIC

RθJARθJCtopRθJBψJTψJBRθJCbot(1)(2)(3)(4)(5)(6)(7)

Junction-to-ambientthermalresistance(2)Junction-to-case(top)thermalresistance(3)Junction-to-boardthermalresistance(4)Junction-to-topcharacterizationparameter(5)Junction-to-boardcharacterizationparameter(6)Junction-to-case(bottom)thermalresistance(7)

(1)

RGC64PINS2611.55.30.25.21.0

UNIT

°C/W

Formoreinformationabouttraditionalandnewthermalmetrics,seetheSemiconductorandICPackageThermalMetricsapplicationreport,SPRA953.

Thejunction-to-ambientthermalresistanceundernaturalconvectionisobtainedinasimulationonaJEDEC-standard,high-Kboard,asspecifiedinJESD51-7,inanenvironmentdescribedinJESD51-2a.

Thejunction-to-case(top)thermalresistanceisobtainedbysimulatingacoldplatetestonthepackagetop.NospecificJEDEC-standardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.

Thejunction-to-boardthermalresistanceisobtainedbysimulatinginanenvironmentwitharingcoldplatefixturetocontrolthePCBtemperature,asdescribedinJESD51-8.

Thejunction-to-topcharacterizationparameter,ψJT,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdataforobtainingRθJA,usingaproceduredescribedinJESD51-2a(sections6and7).

Thejunction-to-boardcharacterizationparameter,ψJB,estimatesthejunctiontemperatureofadeviceinarealsystemandisextractedfromthesimulationdataforobtainingRθJA,usingaproceduredescribedinJESD51-2a(sections6and7).

Thejunction-to-case(bottom)thermalresistanceisobtainedbysimulatingacoldplatetestontheexposed(power)pad.NospecificJEDECstandardtestexists,butaclosedescriptioncanbefoundintheANSISEMIstandardG30-88.Spacer8.5ElectricalCharacteristics,3.3-VI/O

overoperatingfree-airtemperaturerange(unlessotherwisenoted)

PARAMETER

VIHVILVIVOttVhysVOHVOLIOZIOZPII(1)(2)(3)(4)(5)

High-levelinputvoltage

(1)

OPERATIONVDD33VDD33

TESTCONDITIONSMIN20

MAXVDD330.80.55VDD33VDD33250.13xVDD33

UNITVVVVnsVVVμAμAμA

Low-levelinputvoltage(1)InputvoltageOutputvoltage(2)

Inputtransitiontime(triseandtfall)Inputhysteresis(3)

High-leveloutputvoltageLow-leveloutputvoltage

High-impedance,outputcurrent(2)High-impedance,outputcurrentwithinternalpulluporpulldownresistor(4)Inputcurrent(5)

JTAGpinsonly0000

VDD33VDD33VDD33VDD33VDD33

IOH=-4mAIOL=4mAVI=0toVDD33VI=0toVDD33VI=0toVDD33

2.4

0.4±20±250±15

Appliestoexternalinputsandbidirectionalbuffers.Appliestoexternaloutputsandbidirectionalbuffers.AppliestoGRSTz.

Appliestopinswithinternalpullups/pulldowns.Appliestoexternalinputbuffers.

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8.6TimingRequirements,Power-Up

PARAMETERtd1td2tsu_iothd_io

tVDD33_RAMPtVDD_RAMP(1)(2)(3)

DESCRIPTION

VDD33stablebeforeVDDstable

(1)

MINSee

(2)

TYPMAXUNITmsmsμsμs

VDDandVDD33stablebeforede-assertionofGRSTz

SetupforMISCinputs(3)sampledatthede-assertionofGRSTzHoldforMISCinputs(3)sampledatthede-assertionofGRSTzVDD33supplyramprequirementsVDDsupplyramprequirements

30.10.10.20.2

100100

msms

AnactiveresetisrequirediftheVDD33supplyisstablebeforetheVDD11supply.ThisactiveResetshallmeetthe3mspower-updelaycountingfrombothpowersuppliesbeingstabletothede-assertionofGRSTz.

Thereisnopower-onrelationshipbetweenVDD33andVDDunlessGRSTzisonlyconnectedtoacapacitortoGND.ThenVDDmustbestableminimumof10μsbeforetheVDD33.

MISCpinssampledatde-assertionofGRSTz:FULLPWRMGMTz,GANGED,PWRCTL_POL,SMBUSz,BATEN[4:1],andAUTOENz.

td2GRSTzVDD33td1VDDtsu_ioMISC_IOthd_ioFigure2.Power-UpTimingRequirements

8.7HubInputSupplyCurrent

TypicalvaluesmeasuredatTA=25°C

PARAMETER

LOWPOWERMODESPowerOn(afterReset)UpstreamDisconnectSuspend

ACTIVEMODES(USstate/DSState)3.0host/1SSDeviceandHubinU1/U23.0host/1SSDeviceandHubinU03.0host/2SSDevicesandHubinU1/U23.0host/2SSDevicesandHubinU03.0host/3SSDevicesandHubinU1/U23.0host/3SSDevicesandHubinU03.0host/4SSDevicesandHubinU1/U23.0host/4SSDevicesandHubinU03.0host/1SSDeviceinU0and1HSDevice3.0host/2SSDevicesinU0and2HSDevices2.0host/HSDevice2.0host/4HSDevices

494949494949494985994576

2253663055083806614557783955546386

mAmAmAmAmAmAmAmAmAmAmAmA

2.32.32.5

282833

mAmAmA

VDD333.3V

VDD1.1V

UNIT

TUSB8041

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9DetailedDescription

9.1Overview

TheTUSB8041isafour-portUSB3.0complianthub.ItprovidessimultaneousSuperSpeedUSBandhigh-speed/full-speedconnectionsontheupstreamportandprovidesSuperSpeedUSB,high-speed,full-speed,orlow-speedconnectionsonthedownstreamports.Whentheupstreamportisconnectedtoanelectricalenvironmentthatonlysupportshigh-speedorfull-speed/low-speedconnections,SuperSpeedUSBconnectivityisdisabledonthedownstreamports.Whentheupstreamportisconnectedtoanelectricalenvironmentthatonlysupportsfull-speed/low-speedconnections,SuperSpeedUSBandhigh-speedconnectivityaredisabledonthedownstreamports.

9.2FunctionalBlockDiagram

USB_SSRXM_UPUSB_SSRXP_UPUSB_SSTXM_UPUSB_SSTXP_UPUSB_DM_UPUSB_DP_UPUSB_VBUSUSB_R1VDD33VDDVSSPowerDistributionUSB2.0HubVBUSDetectSuperSpeed HubXIXOOscilatorUSB_SSRXM_DN1USB_SSRXP_DN1USB_SSRXM_DN2USB_SSRXP_DN2USB_SSRXM_DN3USB_SSRXP_DN3USB_SSRXM_DN4USB_SSRXP_DN4USB_SSTXM_DN1USB_SSTXP_DN1USB_SSTXM_DN2USB_SSTXP_DN2USB_SSTXM_DN3USB_SSTXP_DN3USB_SSTXM_DN4USB_SSTXP_DN4USB_DM_DN1USB_DM_DN2USBDMDN4__USB_DP_DN4USB_DM_DN3USB_DP_DN3USB_DP_DN1USB_DP_DN2GRSTzClockandResetDistributionTESTGANGED/SMBA2/HS_UPFULLPWRMGMTz/SMBA1/SS_UPPWRCTL_POLSMBUSz/SS_SUSPENDAUTOENz/HS_SUSPENDSCL/SMBCLKSDA/SMBDATOVERCUR1zPWRCTL1/BATEN1OVERCUR2zPWRCTL2/BATEN2OVERCUR3zPWRCTL3/BATEN3OVERCUR4zPWRCTL4/BATEN4GPIOI2CSMBUSControlRegistersOTPROM9.3FeatureDescription

9.3.1BatteryChargingFeatures

TheTUSB8041providessupportforUSBBatteryCharging.BatterychargingsupportmaybeenabledonaperportbasisthroughtheREG_6h(batEn[3:0]).

BatterychargingsupportincludesbothChargingDownstreamPort(CDP)andDedicatedChargingPort(DCP)modes.TheDCPmodeiscompliantwiththeChineseTelecommunicationsIndustryStandardYD/T1591-2009.

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FeatureDescription(continued)

Inaddition,tostandardDCPmode,theTUSB8041providesamode(AUTOMODE)whichautomaticallyprovidessupportforDCPdevicesanddevicesthatsupportcustomchargingindication.WheninAUTOMODE,theportwillautomaticallyswitchbetweenadividermodeandtheDCPmodedependingontheportabledeviceconnected.ThedividedmodeplacesafixedDCvoltageontheportsDPandDMsignalswhichallowssomedevicestoidentifythecapabilitiesofthecharger.Thedefaultdividermodeindicatessupportforupto5W.Thedividermodecanbeconfiguredtoreportahigh-currentsetting(upto10W)throughREG_Ah(HiCurAcpModeEn).

ThebatterychargingmodeforeachportisdependentonthestateofReg_6h(batEn[n]),thestatusoftheVBUSinput,andthestateofREG_Ah(autoModeEnz)upstreamportasidentifiedinTable1.

Table1.TUSB8041BatteryChargingModes

batEn[n]

VBUSDon’tCare<4V>4V

(1)(2)(3)(4)

autoModeEnzDon’tCare

01Don’tCare

BCModePortx(x=n+1)Don’tCareAutomode(1)

DCP(3)

(4)

(2)

CDP(3)

Auto-modeautomaticallyselectsdivider-modeorDCPmode.

Dividermodecanbeconfiguredforhigh-currentmodethroughregisterorOTPsettings.USBDeviceisUSBBatteryChargingSpecificationRevision1.2Compliant

USBDeviceisChineseTelecommunicationsIndustryStandardYD/T1591-2009

9.3.2USBPowerManagement

TheTUSB8041canbeconfiguredforpowerswitchedapplicationsusingeitherper-portorgangedpower-enablecontrolsandover-currentstatusinputs.

PowerswitchsupportisenabledbyREG_5h(fullPwrMgmtz)andtheper-portorgangedmodeisconfiguredbyREG_5h(ganged).

TheTUSB8041supportsbothactivehighandactivelowpower-enablecontrols.ThePWRCTL[4:1]polarityisconfiguredbyREG_Ah(pwrctlPol).

9.3.3OneTimeProgrammable(OTP)Configuration

TheTUSB8041allowsdeviceconfigurationthroughonetimeprogrammablenon-volatilememory(OTP).TheprogrammingoftheOTPissupportedusingvendor-definedUSBdevicerequests.FordetailsusingtheOTPfeaturespleasecontactyourTIrepresentative.

ThetablebelowprovidesalistfeatureswhichmaybeconfiguredusingtheOTP.

Table2.OTPConfigurableFeatures

CONFIGURATIONREGISTER

OFFSETREG_01hREG_02hREG_03hREG_04hREG_07h

BITFIELD[7:0][7:0][7:0][7:0][0]

VendorIDLSBVendorIDMSBProductIDLSBProductIDMSB

Portremovableconfigurationfordownstreamports1.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.

Portremovableconfigurationfordownstreamports2.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.

Portremovableconfigurationfordownstreamports3.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.

DESCRIPTION

REG_07h[1]

REG_07h[2]

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Table2.OTPConfigurableFeatures(continued)

CONFIGURATIONREGISTER

OFFSETREG_07hREG_0AhREG_0AhREG_0BhREG_0BhREG_0BhREG_0BhREG_F0h

BITFIELD

[3][3][4][0][1][2][3][3:1]

DESCRIPTION

Portremovableconfigurationfordownstreamports4.OTPconfigurationisinverseofrmbl[3:0],i.e.1=notremovable,0=removable.

EnableDeviceAttachDetection..High-currentdividermodeenable.

USB2.0portpolarityconfigurationfordownstreamports1.USB2.0portpolarityconfigurationfordownstreamports2.USB2.0portpolarityconfigurationfordownstreamports3.USB2.0portpolarityconfigurationfordownstreamports4.USBpowerswitchpower-ondelay.

9.3.4ClockGeneration

TheTUSB8041acceptsacrystalinputtodriveaninternaloscillatororanexternalclocksource.IfaclockisprovidedtoXIinsteadofacrystal,XOisleftopen.Otherwise,ifacrystalisused,theconnectionneedstofollowtheguidelinesbelow.SinceXIandXOarecoupledtootherleadsandsuppliesonthePCB,itisimportanttokeepthemasshortaspossibleandawayfromanyswitchingleads.ItisalsorecommendedtominimizethecapacitancebetweenXIandXO.ThiscanbeaccomplishedbyshieldingC1andC2withthecleangroundlines.

R11MY1XI24 MHzTUSB8041CLOCKXOCL1CL2Figure3.TUSB8041Clock

9.3.5CrystalRequirements

Thecrystalmustbefundamentalmodewithloadcapacitanceof12pF-24pFandfrequencystabilityratingof±100PPMorbetter.Toensureproperstartuposcillationcondition,amaximumcrystalequivalentseriesresistance(ESR)of50Ωisrecommended.Aparallelloadcapacitorshouldbeusedifacrystalsourceisused.Theexactloadcapacitancevalueuseddependsonthecrystalvendor.RefertoapplicationnoteSelectionandSpecificationforCrystalsforTexasInstrumentsUSB2.0devices(SLLA122)fordetailsonhowtodeterminetheloadcapacitancevalue.

9.3.6InputClockRequirements

Whenusinganexternalclocksourcesuchasanoscillator,thereferenceclockshouldhavea±100PPMorbetterfrequencystabilityandhavelessthan50-psabsolutepeaktopeakjitterorlessthan25-pspeaktopeakjitterafterapplyingtheUSB3.0jittertransferfunction.XIshouldbetiedtothe1.8-VclocksourceandXOshouldbeleftfloating.

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9.3.7Power-UpandReset

TheTUSB8041doesnothavespecificpowersequencingrequirementswithrespecttothecorepower(VDD)orI/Oandanalogpower(VDD33).Thecorepower(VDD)orI/Opower(VDD33)maybepoweredupforanindefiniteperiodoftimewhiletheotherisnotpoweredupifalloftheseconstraintsaremet:?Allmaximumratingsandrecommendedoperatingconditionsareobserved.

?Allwarningsaboutexposuretomaximumratedandrecommendedconditionsareobserved,particularlyjunctiontemperature.Theseapplytopowertransitionsaswellasnormaloperation.

?BuscontentionwhileVDD33ispoweredupmustbelimitedto100hoursovertheprojectedlife-timeofthedevice.

?BuscontentionwhileVDD33ispowereddownmayviolatetheabsolutemaximumratings.

Asupplybusispoweredupwhenthevoltageiswithintherecommendedoperatingrange.Itispowereddownwhenitisbelowthatrange,eitherstableorintransition.

Aminimumresetdurationof3msisrequired.Thisisdefinedasthetimewhenthepowersuppliesareintherecommendedoperatingrangetothede-assertionofGRSTz.Thiscanbegeneratedusingprogrammable-delaysupervisorydeviceorusinganRCcircuit.

9.4DeviceFunctionalModes

9.4.1ExternalConfigurationInterface

TheTUSB8041supportsaserialinterfaceforconfigurationregisteraccess.ThedevicemaybeconfiguredbyanattachedI2CEEPROMoraccessedasaslavebyanSMBuscapablehostcontroller.TheexternalinterfaceisenabledwhenboththeSCL/SMBCLKandSDA/SMBDATpinsarepulledupto3.3Vatthede-assertionofreset.Themode,I2CmasterorSMBusslave,isdeterminedbythestateofSMBUSz/SS_SUSPENDpinatreset.9.4.2I2CEEPROMOperation

TheTUSB8041supportsasingle-master,standardmode(100kbit/s)connectiontoadedicatedI2CEEPROMwhentheI2Cinterfacemodeisenabled.InI2Cmode,theTUSB8041readsthecontentsoftheEEPROMatbusaddress1010000busing7-bitaddressingstartingataddress0.

IfthevalueoftheEEPROMcontentsatbyte00hequals55h,theTUSB8041loadstheconfigurationregistersaccordingtotheEEPROMmap.Ifthefirstbyteisnot55h,theTUSB8041exitstheI2Cmodeandcontinuesexecutionwiththedefaultvaluesintheconfigurationregisters.Thehubwillnotconnectontheupstreamportuntiltheconfigurationiscompleted.Ifthehubdetectedanun-programmedEEPROM(valueotherthan55h),thehubwillenterProgrammingModeandaProgrammingEndpointwithinthehubwillbeenabled.

Note,thebyteslocatedaboveoffsetAhareoptional.TherequirementfordatainthoseaddressesisdependentontheoptionsconfiguredintheDeviceConfiguration,andDeviceConfiguration2registers.FordetailsonI2CoperationrefertotheUM10204I2C-busSpecificationandUserManual.9.4.3SMBusSlaveOperation

WhentheSMBusinterfacemodeisenabled,theTUSB8041supportsreadblockandwriteblockprotocolsasaslave-onlySMBusdevice.

TheTUSB8041slaveaddressis10001xyz,where:

?xisthestateofGANGED/SMBA2/HS_UPpinatreset,

?yisthestateofFULLPWRMGMTz/SMBA1/SS_UPpinatreset,and?zistheread/writebit;1=readaccess,0=writeaccess.

IftheTUSB8041isaddressedbyahostusinganunsupportedprotocolitwillnotrespond.TheTUSB8041willwaitindefinitelyforconfigurationbytheSMBushostandwillnotconnectontheupstreamportuntiltheSMBushostindicatesconfigurationiscompletebyclearingtheCFG_ACTIVEbit.

FordetailsonSMBusrequirementsrefertotheSystemManagementBusSpecification.

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9.5RegisterMaps

9.5.1ConfigurationRegisters

Theinternalconfigurationregistersareaccessedonbyteboundaries.Theconfigurationregistervaluesareloadedwithdefaultsbutcanbeover-writtenwhentheTUSB8041isinI2CorSMBusmode.

Table3.TUSB8041RegisterMap

BYTEADDRESS

00h01h02h03h04h05h06h07h08h09h0Ah0Bh0Ch-0Fh10h-1Fh20h-21h22h23h24h25h-2Fh30h-4Fh50h-8Fh90h-CFhD0-DFhF0hF1-F7hF8hF9-FFh

CONTENTSROMSignatureRegister

VendorIDLSBVendorIDMSBProductIDLSBProductIDMSB

DeviceConfigurationRegisterBatteryChargingSupportRegisterDeviceRemovableConfigurationRegister

PortUsedConfigurationRegister

Reserved

DeviceConfigurationRegister2USB2.0PortPolarityControlRegister

ReservedUUIDByte[15:0]LangIDByte[1:0]SerialNumberStringLengthManufacturerStringLengthProductStringLength

Reserved

SerialNumberStringByte[31:0]ManufacturerStringByte[63:0]ProductStringByte[63:0]

Reserved

AdditionalFeatureConfigurationRegister

Reserved

DeviceStatusandCommandRegister

Reserved

EEPROMCONFIGURABLE

NoYesYesYesYesYesYesYesYes

Yes,programto00h

YesYesNoNo

Yes,ifcustomStringsissetYes,ifcustomSerNumissetYes,ifcustomStringsissetYes,ifcustomStringsisset

Yes,ifcustomSerNumissetYes,ifcustomStringsissetYes,ifcustomStringsisset

NoYesNoNoNo

9.5.2ROMSignatureRegister

Table4.RegisterOffset0h

BitNo.ResetState

Table5.BitDescriptions–ROMSignatureRegister

Bit

FieldName

Access

Description

ROMSignatureRegister.ThisregisterisusedbytheTUSB8041inI2CmodetovalidatetheattachedEEPROMhasbeenprogrammed.ThefirstbyteoftheEEPROMiscomparedtothemask55handifnotamatch,theTUSB8041abortstheEEPROMloadandexecuteswiththeregisterdefaults.

7:0romSignatureRW

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9.5.3VendorIDLSBRegister

Table6.RegisterOffset1h

BitNo.ResetState

Table7.BitDescriptions–VendorIDLSBRegister

Bit

FieldName

Access

Description

VendorIDLSB.LeastsignificantbyteoftheuniquevendorIDassignedbytheUSB-IF;thedefaultvalueofthisregisteris51hrepresentingtheLSBoftheTIVendorID0451h.Thevaluemaybeover-writtentoindicateacustomerVendorID.

Thisfieldisread/writeunlesstheOTPROMVIDandOTPROMPIDvaluesarenon-zero.Ifbothvaluesarenon-zerothevaluewhenreadingthisregistershallreflecttheOTPROMvalue.

7:0vendorIdLsbRO/RW

9.5.4VendorIDMSBRegister

Table8.RegisterOffset2h

BitNo.ResetState

Table9.BitDescriptions–VendorIDMSBRegister

Bit

FieldName

Access

Description

VendorIDMSB.MostsignificantbyteoftheuniquevendorIDassignedbytheUSB-IF;thedefaultvalueofthisregisteris04hrepresentingtheMSBoftheTIVendorID0451h.Thevaluemaybeover-writtentoindicateacustomerVendorID.

Thisfieldisread/writeunlesstheOTPROMVIDandOTPROMPIDvaluesarenon-zero.Ifbothvaluesarenon-zerothevaluewhenreadingthisregistershallreflecttheOTPROMvalue.

7:0vendorIdMsbRO/RW

9.5.5ProductIDLSBRegister

Table10.RegisterOffset3h

BitNo.ResetState

Table11.BitDescriptions–ProductIDLSBRegister

Bit

FieldName

Access

Description

ProductIDLSB.LeastsignificantbyteoftheproductIDassignedbyTexasInstrumentsandreportedintheSuperSpeedDevicedescriptor.thedefaultvalueofthisregisteris40hrepresentingtheLSBoftheSuperSpeedproductIDassignedbyTexasInstrumentsThevalue

reportedintheUSB2.0DevicedescriptoristhevalueofthisregisterbitwiseXORedwith00000010b.Thevaluemaybeover-writtentoindicateacustomerproductID.

Thisfieldisread/writeunlesstheOTPROMVIDandOTPROMPIDvaluesarenon-zero.Ifbothvaluesarenon-zerothevaluewhenreadingthisregisterwillreflecttheOTPROMvalue.

7:0productIdLsbRO/RW

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9.5.6ProductIDMSBRegister

Table12.RegisterOffset4h

BitNo.ResetState

Table13.BitDescriptions–ProductIDMSBRegister

Bit

FieldName

Access

Description

ProductIDMSB.MostsignificantbyteoftheproductIDassignedbyTexasInstruments;thedefaultvalueofthisregisteris81hrepresentingtheMSBoftheproductIDassignedbyTexasInstruments.Thevaluemaybeover-writtentoindicateacustomerproductID.

Thisfieldisread/writeunlesstheOTPROMVIDandOTPROMPIDvaluesarenon-zero.Ifbothvaluesarenon-zero,thevaluewhenreadingthisregisterwillreflecttheOTPROMvalue.

7:0productIdMsbRO/RW

9.5.7DeviceConfigurationRegister

Table14.RegisterOffset5h

BitNo.ResetState

Table15.BitDescriptions–DeviceConfigurationRegister

Bit

FieldName

Access

Description

Customstringsenable.Thisbitcontrolstheabilitytowritetothe

ManufacturerStringLength,ManufacturerString,ProductStringLength,ProductString,andLanguageIDregisters

0=TheManufacturerStringLength,ManufacturerString,ProductStringLength,ProductString,andLanguageIDregistersarereadonly

1=TheManufacturerStringLength,ManufacturerString,ProductStringLength,ProductString,andLanguageIDregistersmaybeloadedbyEEPROMorwrittenbySMBusThedefaultvalueofthisbitis0.

Customserialnumberenable.Thisbitcontrolstheabilitytowritetotheserialnumberregisters.

customSernum

0=TheSerialNumberStringLengthandSerialNumberStringregistersarereadonly

1=SerialNumberStringLengthandSerialNumberStringregistersmaybeloadedbyEEPROMorwrittenbySMBusThedefaultvalueofthisbitis0.

U1U2Disable.ThisbitcontrolstheU1/U2support.

0=U1/U2supportisenabled

1=U1/U2supportisdisabled,theTUSB8041willnotinitiateor

acceptanyU1orU2requestsonanyport,upstreamordownstream,unlessitreceivesorsendsaForce_LinkPM_AcceptLMP.AfterreceivingorsendinganFLPMALMP,itwillcontinuetoenableU1andU2accordingtoUSB3.0protocoluntilitgetsapower-onresetorisdisconnectedonitsupstreamport.

WhentheTUSB8041isinI2Cmode,theTUSB8041loadsthisbitfromthecontentsoftheEEPROM.

WhentheTUSB8041isinSMBUSmode,thevaluemaybeover-writtenbyanSMBushost.

RSVD

Reserved.Thisbitisreservedandreturns1whenread.

7customStringsRW

5u1u2DisableRW

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Table15.BitDescriptions–DeviceConfigurationRegister(continued)

Ganged.Thisbitisloadedatthede-assertionofresetwiththevalueoftheGANGED/SMBA2/HS_UPpin.

0=WhenfullPwrMgmtz=0,eachportisindividuallypowerswitchedandenabledbythePWRCTL[4:1]/BATEN[4:1]pins

ganged

1=WhenfullPwrMgmtz=0,thepowerswitchcontrolforallportsisgangedandenabledbythePWRCTL[4:1]/BATEN1pin

WhentheTUSB8041isinI2Cmode,theTUSB8041loadsthisbitfromthecontentsoftheEEPROM.

WhentheTUSB8041isinSMBUSmode,thevaluemaybeover-writtenbyanSMBushost.

FullPowerManagement.Thisbitisloadedatthede-assertionofresetwiththevalueoftheFULLPWRMGMTz/SMBA1/SS_UPpin.

0=Portpowerswitchingstatusreportingisenabled

fullPwrMgmtz

1=Portpowerswitchingstatusreportingisdisabled

WhentheTUSB8041isinI2Cmode,theTUSB8041loadsthisbitfromthecontentsoftheEEPROM.

WhentheTUSB8041isinSMBUSmode,thevaluemaybeover-writtenbyanSMBushost.

RSVDRSVD

RWRO

Reserved.Thisfieldisreservedandshouldnotbealteredfromthedefault.

Reserved.Thisfieldisreservedandreturns0whenread.

9.5.8BatteryChargingSupportRegister

Table16.RegisterOffset6h

BitNo.ResetState

Table17.BitDescriptions–BatteryChargingSupportRegister

Bit7:4

FieldNameRSVD

AccessRO

Description

Reserved.Readonly,returns0whenread.

BatteryChargerSupport.Thebitsinthisfieldindicatewhetherthedownstreamportimplementsthechargingportfeatures.

0=Theportisnotenabledforbatterychargingsupportfeatures1=Theportisenabledforbatterychargingsupportfeatures

3:0

batEn[3:0]

Eachbitcorrespondsdirectlytoadownstreamport,i.e.batEn0correspondstodownstreamport1,andbatEN1correspondstodownstreamport2.

Thedefaultvalueforthesebitsareloadedatthede-assertionofresetwiththevalueofPWRCTL/BATEN[3:0].

WheninI2C/SMBusmodethebitsinthisfieldmaybeover-writtenbyEEPROMcontentsorbyanSMBushost.

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9.5.9DeviceRemovableConfigurationRegister

Table18.RegisterOffset7h

BitNo.ResetState

Table19.BitDescriptions–DeviceRemovableConfigurationRegister

Bit

FieldName

Access

Description

CustomRemovable.Thisbitcontrolstheabilitytowritetotheportremovablebits.

customRmbl

0=rmbl[3:0]arereadonlyandthevaluesareloadedfromtheOTPROM

1=rmbl[3:0]areread/writeandcanbeloadedbyEEPROMorwrittenbySMBus

Thisbitmaybewrittensimultaneouslywithrmbl[3:0].

6:4

RSVD

Reserved.Readonly,returns0whenread.

Removable.Thebitsinthisfieldindicatewhetheradeviceattachedtodownstreamports4through1areremovableorpermanentlyattached.

0=Thedeviceattachedtotheportisnotremovable1=Thedeviceattachedtotheportisremovable

3:0

rmbl[3:0]

Eachbitcorrespondsdirectlytoadownstreamportn+1,i.e.rmbl0correspondstodownstreamport1,rmbl1correspondstodownstreamport2,etc.

ThisfieldisreadonlyunlessthecustomRmblbitissetto1.OtherwisethevalueofthisfiledreflectstheinvertedvaluesoftheOTPROMnon_rmb[3:0]field.

9.5.10PortUsedConfigurationRegister

Table20.RegisterOffset8h

BitNo.ResetState

Table21.BitDescriptions–PortUsedConfigurationRegister

Bit7:4

FieldNameRSVD

AccessRO

Reserved.Readonly.

Used.Thebitsinthisfieldindicatewhetheraportisenabled.

0=Theportisdisabled

3:0

used[3:0]

1=Theportisenabled

Eachbitcorrespondsdirectlytoadownstreamport,i.e.used0

correspondstodownstreamport1,used1correspondstodownstreamport2,etc.Allcombinationsaresupportedwiththeexceptionofbothports1and3markedasdisabled.

Description

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9.5.11DeviceConfigurationRegister2

Table22.RegisterOffsetAh

BitNo.ResetState

Table23.BitDescriptions–DeviceConfigurationRegister2

Bit7

FieldNameReserved

AccessRO

Description

Reserved.Read-only,returns0whenread.

CustomBatteryChargingFeatureEnable.Thisbitcontrolstheabilitytowritetothebatterychargingfeatureconfigurationcontrols.

0=TheHiCurAcpModeEnandcpdENbitsarereadonlyandthevaluesareloadedfromtheOTPROM.

1=TheHiCurAcpModeEnandcpdEN,bitsareread/writeandcanbeloadedbyEEPROMorwrittenbySMBus.fromthisregister.ThisbitmaybewrittensimultaneouslywithHiCurAcpModeEnandcpdEN.

Powerenablepolarity.Thisbitisloadedatthede-assertionofresetwiththevalueofthePWRCTL_POLpin.

0=PWRCTLpolarityisactivelow

pwrctlPol

1=PWRCTLpolarityisactivehigh

WhentheTUSB8041isinI2Cmode,theTUSB8041loadsthisbitfromthecontentsoftheEEPROM.

WhentheTUSB8041isinSMBUSmode,thevaluemaybeover-writtenbyanSMBushost.

High-currentACPmodeenable.Thisbitenablesthehigh-currenttabletchargingmodewhentheautomaticbatterychargingmodeisenabledfordownstreamports.

HiCurAcpModeEn

RO/RW

0=Highcurrentdividermodedisabled1=Highcurrentdividermodeenabled

ThisbitisreadonlyunlessthecustomBCfeaturesbitissetto1.If

customBCfeaturesis0,thevalueofthisbitreflectsthevalueoftheOTPROMHiCurAcpModeEnbit.

EnableDeviceAttachDetection.Thisbitenablesdeviceattachdetection(aka,cellphonedetect)whenautoModeisenabled.

0=DeviceAttachdetectisdisabledinautomode.

cpdEN

RORW

1=DeviceAttachdetectisenabledinautomode..

ThisbitisreadonlyunlessthecustomBCfeaturesbitissetto1.If

customBCfeaturesis0thevalueofthisbitreflectsthevalueoftheOTPROMcpdENbit.

DSPORTECREnable.ThisbitenablesfullimplementationoftheDSPORTECR(April2013).

0=TheDSPORTECR(April2013)isenabledwithexceptionofthefollowing:ChangesrelatedtowhenCCSbitissetuponenteringU0,andChangesrelatedtoavoidingorreportingcompliancemodeentry1=ThefullDSPORTECR(April2013)isenabled.

Thedefaultvalueofthisbitis0.ThevaluereturnedfromthisregisterwillbetheORofthisbitandtheOTPROMdsport_ecr_enbit.

6customBCfeaturesRW

2dsportEcr_enRW

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Table23.BitDescriptions–DeviceConfigurationRegister2(continued)

AutomaticModeEnable.Thisbitisloadedatthede-assertionofresetwiththevalueoftheAUTOENz/HS_SUSPENDpin.

Theautomaticmodeonlyappliestodownstreamportswithbattery

chargingenabledwhentheupstreamportisnotconnected.Undertheseconditions:

autoModeEnz

0=Automaticmodebatterychargingfeaturesareenabled.1=Automaticmodeisdisabled;onlyBatteryChargingDCPandCDPmodeissupported.

NOTE:Whentheupstreamportisconnected,BatteryChargingCDPmodewillbesupportedonallportsthatenabledforbatterychargingsupportregardlessofthevalueofthisbitwiththeexceptionofPort1.CDPonPort1isnotsupportedwhenAutomaticModeisenabled.

RSVD

Reserved.Readonly,returns0whenread.

9.5.12USB2.0PortPolarityControlRegister

Table24.RegisterOffsetBh

BitNo.ResetState

Table25.BitDescriptions–USB2.0PortPolarityControlRegister

Bit

FieldName

Access

Description

CustomUSB2.0Polarity.Thisbitcontrolstheabilitytowritethep[4:0]_usb2polbits.

customPolarity

0=Thep[4:0]_usb2polbitsarereadonlyandthevaluesareloadedfromtheOTPROM.

1=Thep[4:0]_usb2polbitsareread/writeandcanbeloadedbyEEPROMorwrittenbySMBus.fromthisregister

Thisbitmaybewrittensimultaneouslywiththep[4:0]_usb2polbits

6:5

RSVD

Reserved.Readonly,returns0whenread.

DownstreamPort4DM/DPPolarity.Thiscontrolsthepolarityoftheport.

0=USB2.0portpolarityisasdocumentedbythepinout

p4_usb2pol

RO/RW

1=USB2.0portpolarityisswappedfromthatdocumentedinthepinout,i.e.DMbecomesDP,andDPbecomesDM.

ThisbitisreadonlyunlessthecustomPolaritybitissetto1.If

customPolarityis0thevalueofthisbitreflectsthevalueoftheOTPROMp4_usb2polbit.

DownstreamPort3DM/DPPolarity.Thiscontrolsthepolarityoftheport.

0=USB2.0portpolarityisasdocumentedbythepinout

p3_usb2pol

RO/RW

1=USB2.0portpolarityisswappedfromthatdocumentedinthepinout,i.e.DMbecomesDP,andDPbecomesDM.

ThisbitisreadonlyunlessthecustomPolaritybitissetto1.If

customPolarityis0thevalueofthisbitreflectsthevalueoftheOTPROMp3_usb2polbit.

DownstreamPort2DM/DPPolarity.Thiscontrolsthepolarityoftheport.

0=USB2.0portpolarityisasdocumentedbythepinout

p2_usb2pol

RO/RW

1=USB2.0portpolarityisswappedfromthatdocumentedinthepinout,i.e.DMbecomesDP,andDPbecomesDM.

ThisbitisreadonlyunlessthecustomPolaritybitissetto1.If

customPolarityis0thevalueofthisbitreflectsthevalueoftheOTPROMp2_usb2polbit.

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Table25.BitDescriptions–USB2.0PortPolarityControlRegister(continued)

DownstreamPort1DM/DPPolarity.Thiscontrolsthepolarityoftheport.

0=USB2.0portpolarityisasdocumentedbythepinout

p1_usb2pol

RORW

1=USB2.0portpolarityisswappedfromthatdocumentedinthepinout,i.e.DMbecomesDP,andDPbecomesDM.

ThisbitisreadonlyunlessthecustomPolaritybitissetto1.If

customPolarityis0thevalueofthisbitreflectsthevalueoftheOTPROMp1_usb2polbit.

UpstreamPortDM/DPPolarity.Thiscontrolsthepolarityoftheport.

0=USB2.0portpolarityisasdocumentedbythepinout

p0_usb2pol

RO/RW

1=USB2.0portpolarityisswappedfromthatdocumentedinthepinout,i.e.DMbecomesDP,andDPbecomesDM.

ThisbitisreadonlyunlessthecustomPolaritybitissetto1.If

customPolarityis0thevalueofthisbitreflectsthevalueoftheOTPROMp0_usb2polbit.

9.5.13UUIDRegisters

Table26.RegisterOffset10h-1Fh

BitNo.ResetState

Table27.BitDescriptions–UUIDByteNRegister

Bit7:0

FieldNameuuidByte[n]

AccessRO

Description

UUIDbyteN.TheUUIDreturnedintheContainerIDdescriptor.ThevalueofthisregisterisprovidedbythedeviceandismeetstheUUIDrequirementsofInternetEngineeringTaskForce(IETF)RFC4122AUUIDURNNamespace.

9.5.14LanguageIDLSBRegister

Table28.RegisterOffset20h

BitNo.ResetState

Table29.BitDescriptions–LanguageIDLSBRegister

Bit

FieldName

Access

Description

LanguageIDleastsignificantbyte.ThisregistercontainsthevaluereturnedintheLSBoftheLANGIDcodeinstringindex0.The

TUSB8041onlysupportsonelanguageID.Thedefaultvalueofthisregisteris09hrepresentingtheLSBoftheLangID0409hindicatingEnglishUnitedStates.

WhencustomStringsis1,thisfieldmaybeover-writtenbythecontentsofanattachedEEPROMorbyanSMBushost.

7:0langIdLsbRO/RW

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9.5.15LanguageIDMSBRegister

Table30.RegisterOffset21h

BitNo.ResetState

Table31.BitDescriptions–LanguageIDMSBRegister

Bit

FieldName

Access

Description

LanguageIDmostsignificantbyte.ThisregistercontainsthevaluereturnedintheMSBoftheLANGIDcodeinstringindex0.The

TUSB8041onlysupportsonelanguageID.Thedefaultvalueofthisregisteris04hrepresentingtheMSBoftheLangID0409hindicatingEnglishUnitedStates.

WhencustomStringsis1,thisfieldmaybeover-writtenbythecontentsofanattachedEEPROMorbyanSMBushost.

7:0langIdMsbRO/RW

9.5.16SerialNumberStringLengthRegister

Table32.RegisterOffset22h

BitNo.ResetState

Table33.BitDescriptions–SerialNumberStringLengthRegister

Bit7:6

FieldNameRSVD

AccessRO

Description

Reserved.Readonly,returns0whenread.

Serialnumberstringlength.Thestringlengthinbytesfortheserialnumberstring.Thedefaultvalueis18hindicatingthata24byteserialnumberstringissupported.Themaximumstringlengthis32bytes.

WhencustomSernumis1,thisfieldmaybeover-writtenbythecontentsofanattachedEEPROMorbyanSMBushost.

Whenthefieldisnon-zero,aserialnumberstringofserNumbStringLenbytesisreturnedatstringindex1fromthedatacontainedintheSerialNumberStringregisters.

5:0serNumStringLenRO/RW

9.5.17ManufacturerStringLengthRegister

Table34.RegisterOffset23h

BitNo.ResetState

Table35.BitDescriptions–ManufacturerStringLengthRegister

Bit7

FieldNameRSVD

AccessRO

Description

Reserved.Readonly,returns0whenread.

Manufacturerstringlength.Thestringlengthinbytesforthe

manufacturerstring.Thedefaultvalueis0,indicatingthatamanufacturerstringisnotprovided.Themaximumstringlengthis64bytes.

WhencustomStringsis1,thisfieldmaybeover-writtenbythecontentsofanattachedEEPROMorbyanSMBushost.

Whenthefieldisnon-zero,amanufacturerstringofmfgStringLenbytesisreturnedatstringindex3fromthedatacontainedintheManufacturerStringregisters.

6:0mfgStringLenRO/RW

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9.5.18ProductStringLengthRegister

Table36.RegisterOffset24h

BitNo.ResetState

Table37.BitDescriptions–ProductStringLengthRegister

Bit7

FieldNameRSVD

AccessRO

Description

Reserved.Readonly,returns0whenread.

Productstringlength.Thestringlengthinbytesfortheproductstring.Thedefaultvalueis0,indicatingthataproductstringisnotprovided.Themaximumstringlengthis64bytes.

WhencustomStringsis1,thisfieldmaybeover-writtenbythecontentsofanattachedEEPROMorbyanSMBushost.

Whenthefieldisnon-zero,aproductstringofprodStringLenbytesisreturnedatstringindex3fromthedatacontainedintheProductStringregisters.

6:0prodStringLenRO/RW

9.5.19SerialNumberStringRegisters

Table38.RegisterOffset30h-4Fh

BitNo.ResetState

Table39.BitDescriptions–SerialNumberRegisters

Bit7:0

FieldNameserialNumber[n]

AccessRO/RW

Description

SerialNumberbyteN.TheserialnumberreturnedintheSerialNumberstringdescriptoratstringindex1.ThedefaultvalueoftheseregistersisassignedbyTI.WhencustomSernumis1,theseregistersmaybeover-writtenbyEEPROMcontentsorbyanSMBushost.

9.5.20ManufacturerStringRegisters

Table40.RegisterOffset50h-8Fh

BitNo.ResetState

Table41.BitDescriptions–ManufacturerStringRegisters

Bit

FieldName

Access

Description

ManufacturerstringbyteN.Theseregistersprovidethestringvaluesreturnedforstringindex3whenmfgStringLenisgreaterthan0.ThenumberofbytesreturnedinthestringisequaltomfgStringLen.

TheprogrammeddatashouldbeinUNICODEUTF-16LEencodingsasdefinedbyTheUnicodeStandard,WorldwideCharacterEncoding,Version5.0.

7:0mfgStringByte[n]RW

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9.5.21ProductStringRegisters

Table42.RegisterOffset90h-CFh

BitNo.ResetState

Table43.BitDescriptions–ProductStringByteNRegister

Bit

FieldName

Access

Description

ProductstringbyteN.Theseregistersprovidethestringvaluesreturnedforstringindex2whenprodStringLenisgreaterthan0.ThenumberofbytesreturnedinthestringisequaltoprodStringLen.

TheprogrammeddatashouldbeinUNICODEUTF-16LEencodingsasdefinedbyTheUnicodeStandard,WorldwideCharacterEncoding,Version5.0.

7:0prodStringByte[n]RO/RW

9.5.22AdditionalFeatureConfigurationRegister

Table44.RegisterOffsetF0h

BitNo.ResetState

Table45.BitDescriptions–AdditionalFeatureConfigurationRegister

Bit7:54

FieldNameRSVDstsOutputEn

AccessRORO/RW

Description

Reserved.Readonly,returns0whenread.

Statusoutputenable.ThisbitenablestheHS,HS_SUSPEND,SS,andSS_SUSPENDoutputs..

0=HS,HS_SUSPEND,SS,andSS_SUSPENDoutputsaredisabledandtri-stated.

1=HS,HS_SUSPEND,SS,andSS_SUSPENDoutputsareenabled.

Thisfieldmaybeover-writtenbyEEPROMcontentsorbyanSMBusHost.

3:1

pwronTime

PowerOnDelayTime.WhenOTPROMpwronTimefieldisallzero,thisfieldsetsthedelaytimefromtheremovaldisableofPWRCTLtotheenableofPWRCTLwhentransitioningbatterychargingmodes.Forexample,whendisablingthepoweronatransitionfromacustom

chargingmodetoDedicatedChargingPortMode.Thenominaltimingisdefinedasfollows:

TPWRON_EN=(pwronTime+1)x200ms

Thisfieldmaybeover-writtenbyEEPROMcontentsorbyanSMBushost.

(1)

USB3SpreadSpectrumDisable.ThisbitallowsfirmwaretodisablethespreadspectrumfunctionoftheUSB3phyPLL.

usb3spreadDis

0=Spreadspectrumfunctionisenabled1=Spreadspectrumfunctionisdisabled

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9.5.23DeviceStatusandCommandRegister

Table46.RegisterOffsetF8h

BitNo.ResetState

Table47.BitDescriptions–DeviceStatusandCommandRegister

Bit7:21

FieldNameRSVDsmbusRst

AccessRORSU

Description

Reserved.Readonly,returns0whenread.

SMBusinterfacereset.ThisbitloadstheregistersbacktotheirGRSTzvalues.

Thisbitissetbywritinga1andisclearedbyhardwareoncompletionofthereset.Awriteof0hasnoeffect.

Configurationactive.ThisbitindicatesthatconfigurationoftheTUSB8041iscurrentlyactive.Thebitissetbyhardwarewhenthe

deviceenterstheI2CorSMBusmode.TheTUSB8041shallnotconnectontheupstreamportwhilethisbitis1.

WhenintheSMBusmode,thisbitmustbeclearedbytheSMBushostinordertoexittheconfigurationmodeandallowtheupstreamporttoconnect.

Thebitisclearedbyawriting1.Awriteof0hasnoeffect.

0cfgActiveRCU

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10ApplicationsandImplementation

10.1ApplicationInformation

TheTUSB8041isafour-portUSB3.0complianthub.ItprovidessimultaneousSuperSpeedUSBandhigh-speed/full-speedconnectionsontheupstreamportandprovidesSuperSpeedUSB,high-speed,full-speed,orlowspeedconnectionsonthedownstreamport.TheTUSB8041canbeusedinanyapplicationthatneedsadditionalUSBcompliantports.Forexample,aspecificnotebookmayonlyhavetwodownstreamUSBports.ByusingtheTUSB8041,thenotebookcanincreasethedownstreamportcounttofive.

10.2TypicalApplication

10.2.1DiscreteUSBHubProduct

AcommonapplicationfortheTUSB8041isasaselfpoweredstandaloneUSBhubproduct.Theproductispoweredbyanexternal5VDCPoweradapter.Inthisapplication,usingaUSBcableTUSB8041’supstreamportispluggedintoaUSBHostcontroller.ThedownstreamportsoftheTUSB8041areexposedtousersforconnectingUSBharddrives,cameras,flashdrives,andsoforth.

DCPWRUSBTypeBConnectorUSPortTUSB8041USBPWRSWITCHUSBPWRSWITCHDSPort1USBTypeAConnectorDSPort2USB Type AConnectorDSPort3USBTypeAConnectorDSPort4USBTypeAConnectorFigure4.DiscreteUSBHubProduct

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TypicalApplication(continued)

10.2.1.1DesignRequirements

Table48.DesignParameters

DESIGNPARAMETER

VDDSupplyVDD33Supply

UpstreamPortUSBSupport(SS,HS,FS)DownstreamPort1USBSupport(SS,HS,FS,LS)DownstreamPort2USBSupport(SS,HS,FS,LS)DownstreamPort3USBSupport(SS,HS,FS,LS)DownstreamPort4USBSupport(SS,HS,FS,LS)

NumberofRemovableDownstreamPortsNumberofNon-RemovableDownstreamPortsFullPowerManagementofDownstreamPortsIndividualControlofDownstreamPortPowerSwitch

PowerSwitchEnablePolarity

BatteryChargeSupportforDownstreamPort1BatteryChargeSupportforDownstreamPort2BatteryChargeSupportforDownstreamPort3BatteryChargeSupportforDownstreamPort4

I2CEEPROMSupport24MHzClockSource

EXAMPLEVALUE

1.1V3.3VSS,HS,FSSS,HS,FS,LSSS,HS,FS,LSSS,HS,FS,LSSS,HS,FS,LS

Yes.(FULLPWRMGMTZ=0)

Yes.(GANGED=0)ActiveHigh.(PWRCTL_POL=0)

YesYesYesYesNo.Crystal

10.2.1.2DetailedDesignProcedure

10.2.1.2.1UpstreamPortImplementation

TheupstreamoftheTUSB8041isconnectedtoaUSB3TypeBconnector.ThisparticularexamplehasGANGEDpinandFULLPWRMGMTZpinpulledlowwhichresultsinindividualpowersupporteachdownstreamport.TheVBUSsignalfromtheUSB3TypeBconnectorisfeedthroughavoltagedivider.ThepurposeofthevoltagedivideristomakesurethelevelmeetsUSB_VBUSinputrequirements

R1C110uFJ1VBUSDMDPGNDSSTXNSSTXPGNDSSRXNSSRXPSHIELD0SHIELD11234567891011VBUSUSB_DM_UPUSB_DP_UPCAP_UP_TXMCAP_UP_TXPC2C30.1uF02010.1uF0201USB_SSTXM_UPUSB_SSTXP_UPUSB_SSRXM_UPUSB_SSRXP_UP54535655595804021?.9KR210K1021HU1AUSB_VBUSUSB_DM_UPUSB_DP_UPUSB_SSTXM_UPUSB_SSTXP_UPUSB_SSRXM_UPUSB_SSRXP_UPTUSB8041C40.1uFC50.001uFR51M04025%GANGED/SMBA2/HS_UPFULLPWRMGMTZ/SMBA1/SS_UP4240R34.7K04025%R44.7K04025%USB3_TYPEB_CONNECTORFigure5.UpstreamPortImplementation

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10.2.1.2.2DownstreamPort1Implementation

Thedownstreamport1oftheTUSB8041isconnectedtoaUSB3TypeAconnector.WithBATEN1pinpulledup,BatteryChargesupportisenabledforPort1.IfBatteryChargesupportisnotneeded,thenpull-upresistoronBATEN1shouldbeuninstalled.

BOARD_3P3VPOPULATEFOR BC SUPPORTR64.7K04025?1DN1_VBUSDN1_VBUS220 @ 100MHZC60.1uF1234567891011VBUS_DS1J2VBUSDMDPGNDSSRXNSSRXPGNDSSTXNSSTXPSHIELD0SHIELD1U1BUSB_DM_DN1USB_DP_DN1USB_SSRXM_DN1USB_SSRXP_DN1USB_SSTXM_DN1USB_SSTXP_DN1PWRCTL1/BATEN1OVERCUR1TUSB80412176433646USB_DM_DN1USB_DP_DN1USB_SSRXM_DN1USB_SSRXP_DN10.1uF0201USB_SSTXM_DN1USB_SSTXP_DN10.1uF0201PWRCTRL1_BATEN1OVERCUR1ZR71M04025é0.001uFC100.1uFC8C7CAP_DN_TXM1CAP_DN_TXP1USB3_TYPEA_CONNECTORFigure6.DownstreamPort1Implementation

10.2.1.2.3DownstreamPort2Implementation

Thedownstreamport2oftheTUSB8041isconnectedtoaUSB3TypeAconnector.WithBATEN2pinpulledup,BatteryChargesupportisenabledforPort2.IfBatteryChargesupportisnotneeded,thenpull-upresistoronBATEN2shouldbeuninstalled.

BOARD_3P3VFB2POPULATEFOR BC SUPPORTR84.7K04025%DN2_VBUSDN2_VBUS220 @ 100MHZC110.1uFJ3U1CUSB_DM_DN2USB_DP_DN2USB_SSRXM_DN2USB_SSRXP_DN2USB_SSTXM_DN2USB_SSTXP_DN2PWRCTL2/BATEN2OVERCUR2TUSB8041109151412113547USB_DM_DN2USB_DP_DN2USB_SSRXM_DN2USB_SSRXP_DN2USB_SSTXM_DN2USB_SSTXP_DN2C13C120.1uF02010.1uF0201CAP_DN2_TXMCAP_DN2_TXP1234567891011VBUSDMDPGNDSSRXNSSRXPGNDSSTXNSSTXPSHIELD0SHIELD1VBUS_DS2PWRCTRL2_BATEN2OVERCUR2ZR91M04025á50.001uFC140.1uFUSB3_TYPEA_CONNECTORFigure7.DownstreamPort2Implementation

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10.2.1.2.4DownstreamPort3Implementation

Thedownstreamport3oftheTUSB8041isconnectedtoaUSB3TypeAconnector.WithBATEN3pinpulledup,BatteryChargesupportisenabledforPort3.IfBatteryChargesupportisnotneeded,thenpull-upresistoronBATEN3shouldbeuninstalled.

BOARD_3P3VFB3POPULATEFOR BC SUPPORTR104.7K04025%DN3_VBUS220 @ 100MHZC160.1uFJ4U1DUSB_DM_DN3USB_DP_DN3USB_SSRXM_DN3USB_SSRXP_DN3USB_SSTXM_DN3USB_SSTXP_DN3PWRCTL3/BATEN3OVERCUR3TUSB80411817232220193344USB_DM_DN3USB_DP_DN3USB_SSRXM_DN3USB_SSRXP_DN3USB_SSTXM_DN3USB_SSTXP_DN3C18C170.1uF02010.1uF0201CAP_DN3_TXMCAP_DN3_TXP1234567891011VBUSDMDPGNDSSRXNSSRXPGNDSSTXNSSTXPSHIELD0SHIELD1VBUS_DS3PWRCTRL3_BATEN3OVERCUR3ZR111M04025á90.001uFC200.1uFUSB3_TYPEA_CONNECTORFigure8.DownstreamPort3Implementation

10.2.1.2.5DownstreamPort4Implementation

Thedownstreamport4oftheTUSB8041isconnectedtoaUSB3TypeAconnector.WithBATEN4pinpulledup,BatteryChargesupportisenabledforPort4.IfBatteryChargesupportisnotneeded,thenpull-upresistoronBATEN4shouldbeuninstalled.

BOARD_3P3VFB4POPULATEFOR BC SUPPORTR124.7K04025%DN4_VBUS220 @ 100MHZC210.1uFJ5U1EUSB_DM_DN4USB_DP_DN4USB_SSRXM_DN4USB_SSRXP_DN4USB_SSTXM_DN4USB_SSTXP_DN4PWRCTL4/BATEN4OVERCUR4TUSB80412524302927263243USB_DM_DN4USB_DP_DN4USB_SSRXM_DN4USB_SSRXP_DN4USB_SSTXM_DN4USB_SSTXP_DN4C23C220.1uF02010.1uF0201CAP_DN4_TXMCAP_DN4_TXP1234567891011VBUSDMDPGNDSSRXNSSRXPGNDSSTXNSSTXPSHIELD0SHIELD1VBUS_DS4PWRCTRL4_BATEN4OVERCUR4ZR131M04025?50.001uFC240.1uFUSB3_TYPEA_CONNECTORFigure9.DownstreamPort4Implementation

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10.2.1.2.6VBUSPowerSwitchImplementation

ThisparticularexampleusestheTexasInstrumentsTPS2561DualChannelPrecisionAdjustableCurrent-Limitedpowerswitch.FordetailsonthispowerswitchorotherpowerswitchesavailablefromTexasInstruments,refertotheTexasInstrumentswebsite.

BOARD_3P3VBOARD_3P3VBOARD_5VR1910K04025%U223PWRCTRL1_BATEN1PWRCTRL2_BATEN2PWRCTRL1_BATEN1PWRCTRL2_BATEN245111ININEN1OUT2EN2FAULT2ZGNDPADTPS2561ILIMOUT1FAULT1Z910867ILIM1R2125.5K04025?30.1uF+C44150uFC450.1uF+C46150uFDN2_VBUSDN1_VBUSDN1_VBUSOVERCUR1ZDN2_VBUSOVERCUR2ZR2010K04025?20.1uFLimitingDSPort VBUS current to 2.2A perport.BOARD_3P3VBOARD_3P3VBOARD_5VR2210K04025%U323PWRCTRL3_BATEN3PWRCTRL4_BATEN445111ININEN1OUT2EN2FAULT2ZGNDPADTPS2561ILIMOUT1FAULT1Z910867ILIM2R2425.5K04025?80.1uF+C49150uFC500.1uF+C51150uFDN4_VBUSDN3_VBUSDN3_VBUSOVERCUR3ZDN4_VBUSOVERCUR4ZR2310K04025?70.1uFLimitingDSPort VBUS current to 2.2A perport.Figure10.VBUSPowerSwitchImplementation

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10.2.1.2.7Clock,Reset,andMisc

ThePWRCTL_POLispulleddownwhichresultsinactivelowpowerenable(PWRCTL1,PWRCTL2,PWRCTL3,andPWRCTL4)foraUSBVBUSpowerswitch.The1μFcapacitorontheGRSTNpincanonlybeusediftheVDD11supplyisstablebeforetheVDD33supply.Thedependingonthesupplyrampofthetwosuppliesthecapacitormayhavetobeadjusted.

C391uF50U1FGRSTNSCL/SMBCLKSDA/SMBDATSMBUSZ/SS_SUSPEND62R14Y1TUSB80411MXIAUTOENZ/HS_SUSPENDPWRCTL_POL61XOTESTUSB_R138373945414964R159.53K04021%R164.7KR174.7K04025%R184.7K04025$MHzC4018pFC4118pFFigure11.Clock,Reset,andMisc

10.2.1.2.8TUSB8041PowerImplementation

BOARD_1P1VVDD11FB5C26U1G513212831515780.1uFC270.1uFC280.1uFC290.1uFC300.1uFC310.1uFC320.1uFC3310uF220@100MHZVDDVDDVDDVDDVDDVDDVDDVDD60TPADNCVDD33VDD33VDD33VDD3316345263VDD33FB6C340.1uFC350.1uFC360.1uFC370.1uFBOARD_3P3V65C3810uF220@100MHZTUSB8041Figure12.TUSB8041PowerImplementation

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10.2.1.3ApplicationCurves

Figure13.UpstreamPortFigure14.DownstreamPort1

Figure15.DownstreamPort2Figure16.DownstreamPort3

Figure17.DownstreamPort4Figure18.High-SpeedUpstreamPort

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Figure19.High-SpeedDownstreamPort1Figure20.High-SpeedDownstreamPort2

Figure21.High-SpeedDownstreamPort3Figure22.High-SpeedDownstreamPort4

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11PowerSupplyRecommendations

11.1TUSB8041PowerSupply

VDDshouldbeimplementedasasinglepowerplane,asshouldVDD33.

?TheVDDpinsoftheTUSB8041supply1.1V(nominal)powertothecoreoftheTUSB8041.Thispowerrailcanbeisolatedfromallotherpowerrailsbyaferritebeadtoreducenoise.

?TheDCresistanceoftheferritebeadonthecorepowerrailcanaffectthevoltageprovidedtothedeviceduetothehighcurrentdrawonthepowerrail.TheoutputofthecorevoltageregulatormayneedtobeadjustedtoaccountforthisoraferritebeadwithlowDCresistance(lessthan0.05Ω)canbeselected.

?TheVDD33pinsoftheTUSB8041supply3.3VpowerrailtotheI/OoftheTUSB8041.Thispowerrailcanbeisolatedfromallotherpowerrailsbyaferritebeadtoreducenoise.

?Allpowerrailsrequirea10μFcapacitoror1μFcapacitorsforstabilityandnoiseimmunity.Thesebulkcapacitorscanbeplacedanywhereonthepowerrail.ThesmallerdecouplingcapacitorsshouldbeplacedasclosetotheTUSB8041powerpinsaspossiblewithanoptimalgroupingoftwoofdifferingvaluesperpin.

11.2DownstreamPortPower

???

Thedownstreamportpower,VBUS,mustbesuppliedbyasourcecapableofsupplying5Vandupto900mAperport.DownstreamportpowerswitchescanbecontrolledbytheTUSB8041signals.Itisalsopossibletoleavethedownstreamportpoweralwaysenabled.

Alargebulklow-ESRcapacitorof22μForlargerisrequiredoneachdownstreamport’sVBUStolimitin-rushcurrent.

TheferritebeadsontheVBUSpinsofthedownstreamUSBportconnectionsarerecommendedforbothESDandEMIreasons.A0.1μFcapacitorontheUSBconnectorsideoftheferriteprovidesalowimpedancepathtogroundforfastrisetimeESDcurrentthatmighthavecoupledontotheVBUStracefromthecable.

11.3Ground

Itisrecommendedthatonlyoneboardgroundplanebeusedinthedesign.Thisprovidesthebestimageplaneforsignaltracesrunningabovetheplane.ThethermalpadoftheTUSB8041andanyofthevoltageregulatorsshouldbeconnectedtothisplanewithvias.AnearthorchassisgroundisimplementedonlyneartheUSBportconnectorsonadifferentplaneforEMIandESDpurposes.

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12Layout

12.1LayoutGuidelines

12.1.1Placement

1.9.53K+/-1%resistorconnectedtopinUSB_R1shouldbeplacedascloseaspossibletotheTUSB8041.2.A0.1μFshouldbeplacedascloseaspossibleoneachVDDandVDD33powerpin.

3.The100nFcapacitorsontheSSTXPandSSTXMnetsshouldbeplacedclosetotheUSBconnector(TypeA,TypeB,andsoforth).

4.TheESDandEMIprotectiondevices(ifused)shouldalsobeplacedaspossibletotheUSBconnector.5.Ifacrystalisused,itmustbeplacedascloseaspossibletotheTUSB8041’sXIandXOpins.

6.PlacevoltageregulatorsasfarawayaspossiblefromtheTUSB8041,thecrystal,andthedifferentialpairs.7.Ingeneral,thelargebulkcapacitorsassociatedwitheachpowerrailshouldbeplacedascloseaspossibletothevoltageregulators.12.1.2PackageSpecific

1.TheTUSB8041packagehasa0.5-mmpinpitch.

2.TheTUSB8041packagehasa6.0-mmx6.0-mmthermalpad.Thisthermalpadmustbeconnectedtogroundthroughasystemofvias.

3.Allviasunderdevice,exceptforthoseconnectedtothermalpad,shouldbesoldermaskedtoavoidanypotentialissueswiththermalpadlayouts.12.1.3DifferentialPairs

ThissectiondescribesthelayoutrecommendationsforalltheTUSB8041differentialpairs:USB_DP_XX,USB_DM_XX,USB_SSTXP_XX,USB_SSTXM_XX,USB_SSRXP_XX,andUSB_SSRXM_XX.1.Mustbedesignedwithadifferentialimpedanceof90Ω+/-10%.

2.Inordertominimizecrosstalk,itisrecommendedtokeephighspeedsignalsawayfromeachother.Eachpairshouldbeseparatedbyatleast5timesthesignaltracewidth.Separatingwithgroundasdepictedinthelayoutexamplewillalsohelpminimizecrosstalk.

3.Routealldifferentialpairsonthesamelayeradjacenttoasolidgroundplane.4.Donotroutedifferentialpairsoveranyplanesplit.

5.Addingtestpointswillcauseimpedancediscontinuityandwillthereforenegativeimpactsignalperformance.Iftestpointsareused,theyshouldbeplacedinseriesandsymmetrically.Theymustnotbeplacedinamannerthatcausesstubonthedifferentialpair.

6.Avoid90degreeturnsintrace.Theuseofbendsindifferentialtracesshouldbekepttoaminimum.Whenbendsareused,thenumberofleftandrightbendsshouldbeasequalaspossibleandtheangleofthebendshouldbe≥135degrees.ThiswillminimizeanylengthmismatchcausesbythebendsandthereforeminimizetheimpactbendshaveonEMI.

7.Minimizethetracelengthsofthedifferentialpairtraces.ThemaximumrecommendedtracelengthforSSdifferentialpairsignalsandUSB2.0differentialpairsignalsiseightinches.Longertracelengthsrequireverycarefulroutingtoassurepropersignalintegrity.

8.Matchtheetchlengthsofthedifferentialpairtraces(i.e.DPandDMorSSRXPandSSRXMorSSTXPandSSTXM).Thereshouldbelessthan5milsdifferencebetweenaSSdifferentialpairsignalanditscomplement.TheUSB2.0differentialpairsshouldnotexceed50milsrelativetracelengthdifference.

9.Theetchlengthsofthedifferentialpairgroupsdonotneedtomatch(i.e.thelengthoftheSSRXpairtothatoftheSSTXpair),butalltracelengthsshouldbeminimized.

10.Minimizetheuseofviasinthedifferentialpairpathsasmuchaspossible.Ifthisisnotpractical,makesurethatthesameviatypeandplacementareusedforbothsignalsinapair.AnyviasusedshouldbeplacedascloseaspossibletotheTUSB8041device.

11.Toeaserouting,thepolarityoftheSSdifferentialpairscanbeswapped.ThismeansthatSSTXPcanberoutedtoSSTXMorSSRXMcanberoutedtoSSRXP.

12.ToeaseroutingoftheUSB2DPandDMpair,thepolarityofthesepinscanbeswapped.Ifthisisdone,the

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TUSB8041

SLLSEE4C–JUNE2014–REVISEDJULY2015

www.ti.com

LayoutGuidelines(continued)

appropriatePx_usb2polregister,wherex=0,1,2,3,or4,mustbeset.13.Donotplacepowerfusesacrossthedifferentialpairtraces.

12.2LayoutExamples

12.2.1UpstreamPort

Figure23.ExampleRoutingofUpstreamPort

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TUSB8041

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LayoutExamples(continued)

12.2.2DownstreamPort

Figure24.ExampleRoutingofDownstreamPort

Theremainingthreedownstreamportsroutingcanbesimilartotheexampleprovided.

TUSB8041

SLLSEE4C–JUNE2014–REVISEDJULY2015

www.ti.com

13DeviceandDocumentationSupport

13.1CommunityResources

ThefollowinglinksconnecttoTIcommunityresources.Linkedcontentsareprovided\IS\bytherespectivecontributors.TheydonotconstituteTIspecificationsanddonotnecessarilyreflectTI'sviews;seeTI'sTermsofUse.

TIE2E?OnlineCommunityTI'sEngineer-to-Engineer(E2E)Community.Createdtofostercollaboration

amongengineers.Ate2e.ti.com,youcanaskquestions,shareknowledge,exploreideasandhelpsolveproblemswithfellowengineers.DesignSupportTI'sDesignSupportQuicklyfindhelpfulE2Eforumsalongwithdesignsupporttoolsand

contactinformationfortechnicalsupport.

13.2Trademarks

E2EisatrademarkofTexasInstruments.

Allothertrademarksarethepropertyoftheirrespectiveowners.

13.3ElectrostaticDischargeCaution

Thesedeviceshavelimitedbuilt-inESDprotection.TheleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoamduringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.

13.4Glossary

SLYZ022—TIGlossary.

Thisglossarylistsandexplainsterms,acronyms,anddefinitions.

14Mechanical,Packaging,andOrderableInformation

Thefollowingpagesincludemechanicalpackagingandorderableinformation.Thisinformationisthemostcurrentdataavailableforthedesignateddevices.Thisdataissubjecttochangewithoutnoticeandrevisionofthisdocument.Forbrowser-basedversionsofthisdatasheet,refertotheleft-handnavigation.

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