MT6735_MT6328_MT6169_MT6625L_EMMC_LPDDR2_CMCC_3M_PHASE-2_REF_SCH_V0.4
更新时间:2023-08-10 04:51:01 阅读量: 工程科技 文档下载
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Project: MT6735 REF_SCH TOP LEVELBPI, APC MSDC 8-bit
MSDC0/ eMMC eMMC5.0+ LPDDR2RXD EMI 32-bit RF IQ BSI ctrl
RXD ANT
RxD FEMD
DRAM IFD
MT6169RX LTE ANT TX
micro SD+ hot-plugConnectivity ANT
MSDC 4-bit
MSDC1
ABBFEM VTCXO 26MCONN IQ 26M_BB
GPI26M_AUD
CLK Ctrl26M_NFC
MT6625LTCXOCONN ctrl
CONN IF
LCD module
LCD IF
LCD (MIPI DSI) Camera (MIPI CSI) I2C_0
C
Camera Modules
Camera IF I2C
CTP controller
I2C
I2C_1I2C
MT6735 (SBS)32K_BB
C
MT6328LDOs RTC Vibrator Bucks
MEMs& ALS/PS
I2C_2 LDOs I2C_3
ENBB/XOSC_EN
32K VIBHeadset (HPL, HPR, AU_VIN1) Receiver
SIM1
SIM1
SIM1 Audio I/FAUD I/F
Audio Speech
AU_VIN0 SpeakerB
B
SIM2
SIM2
SIM2 PWRAP I/F
SPI
Fast Pulse Charger BC 1.1 KeypadJTAG
Keypad
Debug port
UART
JTAG UART micro USB Battery
USBA A
USB 2.0
USB 2.0Title Size C Date:5 4 3 2
01_Block_Diagram
MTK ConfidentialWednesday, January 14, 20151
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I2C
Function Rear Camera - 13M
I2C Spec. 400 Kbps 400 Kbps
Budget Timing Yes. Yes.
I2C Slave Address (7-bit mode)Rear camera (IMX135) I2C address: 0X10 (Write:0x20, Read:0x21) AF driver (DW9714A) I2C address: 0x0C (Write:0x18, Read:0x19) Front camera (GC2355) I2C address: 0x3C (Write:0x78, Read:0x79)
D
D
I2C-0 Front Camera CTP I2C-1
400 Kbps
Yes.
GT1151/ CTP I2C address: 0X5D (Write:0xBA, Read:0xBB) or 0x14 (Write:0x28, Read:0x29)
M Sensor Gyro Sensor I2C-2C
2.5 Mbps 400 Kbps 400 Kbps 400 Kbps 1.2 Mbps 400 Kbps Yes. Yes.
AK09911/ M-Sensor I2C Address: 0x0D (Write:0x1A, Read:0x1B) ITG1010/ Gyro I2C Address: 0x68 (Write:0xD0, Read:0xD1) MC3410/ Accelerometer I2C address: 0x4C (Write:0x98, Read:0x99) CM36652/ RGB+PS I2C address: 0X60 (Write:0xC0, Read:0xC1) MT6605/ NFC I2C address: 0X28 (Write:0x50, Read:0x51) LM3642/ Flashlight Driver I2C address: 0X63 (Write:0xC6, Read:0xC7)C
Accelerometer RGB/ PS Sensor NFC Flashlight Driver
I2C-3 Note: I2C Spec.: Standard mode (100 kbps) and Fast mode (400 kbps), Fast mode Plus (1 Mbps) and High-speed mode (3.4 Mbps)
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Title Size C Date:5 4 3 2
02_I2C_ID_Overview
MTK ConfidentialWednesday, January 14, 20151
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V0.1 First Release (2014/09/05) V0.2 Change Notice (2014/10/04) 1. Modify Circuit and Cap of VPROC/ VLTE/ VCORE/ DVDD12_EMI to sync with MMD Circuit[P10] 2. Modify VIO18 CAP -Change C10093 from 1uF to 220nF[P10] -Change C10094 from 1uF to 220nF[P10] -Change C10100 from 1uF to 100nF[P10] -Change C4101 from 2.2uF to 1uF[P41] -Change C5121 from 1uF to 100nF[P51] 3. Add Notice for DVDD18_MC0/DVDD28_MC1 Cap[P10] 4. Delete UCTS0/URTS0 net[P12, 90] 5. Delete C2024 and connect AUXADC_VIN to D_GND directly[P20] 6. Rename R2004 to R2005 (sync with MMD circuit), and change from 200K to 1R[P20] 7. Delete SH2102 and connect CS_P to D_GND[P21] 8. Delete SH2101[P21] 9. Change C4103& C4104 from 10uF/C0603 to 2.2uF/C0402[P41] 10. Delete Notice for Camera[P62] 11. Change U5003 fro
m GPS SAW to GNSS SAW/B8313[P50] 12. Change R1101 from 240R to 35R[P11] 13. Add Notice for Bypass CAP close to AVDD18_MEMPLL(E1 ball)& DVDD18_MC1(F3 ball)[P10] 14. Delete C2058~C2061[P20] 15. Rename C2037 to C2040 (sync with MMD circuit)and add notice for C2040[P20] 16. Rename SH2006~SH2010 to sync with MMD circuit[P20] -Rename SH2006 to SH2009 -Rename SH2007 to SH2010 -Rename SH2008 to SH2011 -Rename SH2009 to SH2012 -Rename SH2010 to SH2013 and modify description to NC/MMD/PMIC 17. Add SH2014[P20] 18. Modify L2001/L2003/L2006/L2008/L2009 value description[P20] 19. Change net name VBAT_RF to VBAT[P32] 20. Remove SH3126/SH3127/SH3128[P31] 21. Remove SH3125[P32] 22. SH3129 change to R3215[P32] 23. SH3123 change to R3216[P32] 24. SH3124 change to R3217[P32] 25. Remove C3239[P32] 26. Change SH4101 size from 0603 to 0201 (Sync with MMD)[P41] 27. Modify notice for CON2101 pin1 (Bat connector-VBAT net) from 60mil to 125mil[P21] 28. Add notice for CON2101 pin3 (Bat connector-GND net), need 125mil[P21] 29. Rename bypass cap to sync with MMD circuit[P10] -Rename bypass cap for AVDD28_DAC from C10080 to C10090 -Rename bypass cap for DVDD18_IOLT from C10086 to C10096 -Rename bypass cap for DVDD18_IOLB from C10087 to C10097 30. Rename bypass cap for AVDD18_AUD from C2040 to C2058[P20] 31. Mofidy notice for AVDD45_VSYS22 balls, change form 20mil to 30mil[P20] 32. Mofidy notice for AVDD45_VPA ball, change form 20mil to 30mil[P20] 33. Add trace width notice for Buck[P20] V0.3 Change Notice (2014/10/24) 1. Delete CORESONIC_SWD/CORESONIC_SWCK net[P12, 90] 2. Modify R1105& R1106 from 8K to 8.06K[P11] 3. Update U2402 complete part number: FAN53611AUC115X[P24] 4. Modify C10082 from 100nF to NC[P10] 5. Add Note12-1& 12-2 for MT6735M[P12] 6. Connect GND_VLTE from SH2003 to SH2002[P20] 7. Connect GND_VCORE1 from SH2002 to SH2003[P20] 8. Modify R1101 from 35R to 36R[P11] 9. Modify R6510 Circuit[P65] 10. RF Phase2 first release[P31-34]
D
C
V0.4 Change Notice (2015/01/09) 1. Add R2104 for BAT_ON[P21] 2. Correct headset type note from CTIA to OMTP[P60] 3. Change C4113 from 2.2uF to 4.7uF[P41] 4. Change C10091 from 1uF/0201 to 4.7uF/0402[P10] 5. Delete R6211[P62] 6. Add ESD6006[P60] 7. Change R6002& R6005 to NC[P60] 8. Add R6008[P60] 9. Change SH6007 to R6030[P60] 10. Add Note 62-1 for PIP function[P62] 11. Modify Note 12-1&2 for MT6735M& MT6735P[P12] 12. Change R2103 from 24K to 16.9k[P21] 13. Add Note 10-2 for PDN CAP[P10] 14. Update MT6328 Orcad Library: remove A11 ball[P20] 15. Rename net name from ENBB_6169 to ENBB for MT6328.R3[P20] 16. Add R2035[P20] 17. Correct mis-connection for VSRAM_PMU and C1004.1[P10] 18. Remove U2402 Circuit[P24] 19. Delete R1011& R1007[P10] 20. Delete C10007[P10] 21. Delete PWRAP_INT net[11] 22. Modify description from BOARD TEMPERATURE to RF PA TEMPERATURE for AUX_IN1_NTC[P11] 23. Update Power Spec Table for VM/ VCMAD/ VIO18[P20] 24. Connect AU_VIN1_N to GND[P60] 25. Add R11
11& R1112[P11] 26. Change R1109 from 47K to NC[P11] 27. Add R1110[P11] 28. Modify description for VLTE_SRAM_ID[P11] 29. Add C2049[P20] 30. Modify net name from RF_B3439_PA_FEM to RF_B34B39_PA_FEM[P34] 31. Change C3243/C3244 to 100pF[P32] 32. Modify description of RF PA TEMPERATURE detector[P32] 33. Add BEAD6006[P60] 34. Add Note 41-1 for co-layout different eMMC+LPDDR2 Type[41] 35. Modify description of Note 40-1[P40] 36. Modify description of Clock scheme[P31] 37. Add C2050[P20] 38. Change C10038 from NC to 47uF[P10] 39. Add R6013& R6014[P60] 40. Delete SH6006[P60] 41. Add SH6007[P60]
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Title Size C Date:5 4 3 2
05_Change_Notice
MTK ConfidentialWednesday, January 14, 20151
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U1001E
U1001F
MT6735-SBSVOCRENote: 10-1D
MT6735-SBSGNDDVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU DVDD_CPU M12 M13 M15 M16 M17 M18 M19 M20 N12 N13 N14 N15 N16 N17 N18 N19 N20 T12 T13 T14 T15 T16 T17 T18 T19 T20 U12 U13 U14 U15 U16 U17 U18 U19 U20 V14 W14 Y14 AA14 AB14 AC14 T11 T21 T23 U21 V7 V8 V9 V10 V11 V12 V13 V15 V16 V17 V18 V21 V22 V23 W7 W8 W9 W10 W11 W12 W13 W15 Y13 Y15 AA7 AA9 AA11 AA13 AA15 AA17 AA19 AA21 AA23 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AC7 AC8 AC9 AC10 AC11 AC12 AC13 AC15 AC17 AC18 AC19 AC21 AC22 AC23 DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS
VPROC
AVDD& MD_AAVDD18_MD AVDD18_AP AVDD28_DAC AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AVSS18_MD AL4 AK11 AL9 AE11 AG6 AG7 AG8 AG9 AH3 AH6 AH9 AJ1 AJ2 AJ3 AJ4 AJ5 AJ6 AJ9 AK5 AK9 AL5 AL8 VIO18_PMU VTCXO_0_PMUD
VCORE_PMU[20] VCORE_PMIC_FB[20] GND_VCORE_FB SH1005 1 2 NC/MMD/L1/4MIL C10006 C/ 47/ uF/ 0805/ NC C0805 C10008 C/ 22/ uF/ 0603 C0603 2 C10009 C/ 22/ uF/ 0603 C0603 SH1006 1 2 NC/MMD/L1/4MIL 2 1 2 1 1
Note: 10-2
C10012 C/ 22/ uF/ 0603 C10016 C/ 4.7/ uF/ 0402 C10017 C/ 4.7/ uF/ 0402 C10018 C/ 1/ uF/ 0201
C0603 C0402 C0402 2 C0201
2 2 1 2
1 1 1
C10025 C/ 1/ uF/ 0201 C10027 C/ 1/ uF/ 0201 C10035 C/ 1/ uF/ 0201 C10037 C/ 1/ uF/ 0201 C10039 C/ 1/ uF/ 0201
C0201 2 C0201 2 C0201 2 C0201 C0201 2
1 1 1 2 1 1
D_GND
K8 L7 L8 L9 L10 L11 L12 L15 L16 L19 L20 L21 L22 M8 M10 M22 N8 N10 N22 T8 T10 T22 U7 U8 U9 U10 U11 U22 U23 Y7 Y8 Y9 Y10 Y11 Y12 AA8 AA10 AA12 AB8 AB10 AB12
DVDD_CORE DVD
D_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE DVDD_CORE
1
1 2
C10078 C/ 1/ uF/ 0201
C10090 C/ 100/ nF/ 0201
D_GND 2
VPROC_PMU
Note: 10-1VPROC_PMIC_FB_6328[20] GND_VPROC_PMIC_FB_6328 SH1002 1 2 NC/MMD/L1/4MIL C0805 C0805 C0603 C0402 C0402 C0201 C0201 C0201 C0201 C0201 C0201[20]
D_GND C0201
D_GND C0201
SH1001 1 2 NC/MMD/L1/4MIL 1 1 1 1 1 1 2 1 2 2 1 2 1 2 1 2 1
C10036 C/ 47/ uF/ 0805 2 C10038 C/ 47/ uF/ 0805 C10040 C/ 22/ uF/ 0603 C10046 C/ 4.7/ uF/ 0402 2 C10047 C/ 4.7/ uF/ 0402 C10052 2 C10053 C10059 2 C10060 C10062 2 C10064 C/ 1/ uF/ 0201 C/ 1/ uF/ 0201 C/ 1/ uF/ 0201 C/ 1/ uF/ 0201 C/ 1/ uF/ 0201 C/ 1/ uF/ 0201
PLLAVDD18_PLLGP AVDD18_MEMPLL AVSS18_PLLGP AVSS18_PLLGP AVSS18_PLLGP AVSS18_PLLGP AVSS18_PLLGP AVSS18_MEMPLL AG16 E1 1 C0201 AE14 AG15 AH15 AJ15 AK15 E3 VIO18_PMU
150mils1 C10083 C/ 100/ nF/ 0201 C10098 C/ 100/ nF/ 0201 C0201
VIO18_PMU
Each C/ 47/ uF/ 0805 can be replaced by 2pcs C/ 22/ uF/ 0603
2
D_GND D_GND
D_GND
D_GND
PERI_DDVDD18_CONN DVDD18_EFUSE DVDD18_IORB DVDD18_IOLT DVDD18_IOLB DVDD18_IOLB DVDD18_IOLB FSOURCE_P DVDD18_MC0 DVDD18_MC1 DVDD28_MC1 C28 AB29 AD3 K27 1 1 1 1 1 C10085 C/ 100/ nF/ 0201 C10096 C/ 100/ nF/ 0201 C0201 C10097 C/ 100/ nF/ 0201 C0201 C10084 C/ 100/ nF/ 0201 C10082 C/ 100/ nF/ 0201/ NC C0201 C0201 C0201 AA29 AL20 AL26 W30 C27 F3 G1 D_GND VIO18_PMU VIO18_PMU
Note: 10-1
VLTE_PMU[20] VLTE_PMIC_FB[20] GND_VLTE_FB SH1003 1 2 NC/MMD/L1/4MIL C10065 C/ 22/ uF/ 0603 SH1004 1 2 NC/MMD/L1/4MIL C0603 2 1 2 2 1 2 1 2 1 1 D_GND
VLTEW16 W17 W18 W19 W20 W21 W22 W23 W24 Y16 Y17 Y18 Y19 Y20 Y21 Y22 Y23 Y24 AA16 AA18 AA20 AA22 AA24 AB16 AB18 AB20 AB22 AB24 DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE DVDD_LTE
2
2
2
2
C10098 close to AVDD18_MEMPLL(E1 ball)& DVDD18_MC1(F3 ball) and keep trace length< 150mils
2
C
Note: 10-2
Note: 10-3
2
C
C0603 2 C10066 C/ 22/ uF/ 0603 C10067 C/ 22/ uF/ 0603/ NC C0603 C10068 C/ 1/ uF/ 0201 C10069 C/ 1/ uF/ 0201 C10070 C/ 1/ uF/ 0201 C10071 C/ 1/ uF/ 0201 C10079 C/ 4.7/ uF/ 0402 C10080 C/ 4.7/ uF/ 0402 C0201 C0201 2 C0201 C0201 2 C0402 C0402 2
1 1 1 1
D_GND
D_GND
D_GND
D_GND
D_GND
GNDDVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS D
VSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS DVSS A27 B5 B7 B9 B14 B18 B23 C6 C15 C22 C26 D3 D5 D8 D10 D11 D18 E24 G10 G13 G15 G17 H10 H13 H15 H17 K7 K9 L13 L17 L18 L23 M7 M9 M11 M21 M23 N7 N9 N11 N21 N23 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 T7 T9
150mils 150mils
VIO18_PMU VMC_PMU
D_GND
DVDD28_MC2
L31
D_GND
DVDD28_SIM1 DVDD28_SIM2
H1 L2 C10088 C/ 100/ nF/ 0201 C10089 C/ 100/ nF/ 0201 C10091 C/ 4.7/ uF/ 0402 C10092 C/ 100/ nF/ 0201 C0201 1 1 1 1 C0402 C0201 C0201
VSIM1_PMU VSIM2_PMU
PERI_AAVDD18_MIPIRX0 AVDD18_MIPIRX1 AVDD18_MIPITX N30 W31 T1
C10092 close to DVDD18_MC0 and keep trace length< 150mils C10091 close to DVDD28_MC1 and keep trace length< 150milsVIO18_PMU VIO18_PMU
2
2
2
D_GND 1
D_GND
D_GND
D_GND
2
VLTE_SRAMVLTE_PMU VLTE_SRAM 1 C10010 C/ 100/ nF/ 0201 AC16 AC20 AC24 VLTE_SRAM VLTE_SRAM VLTE_SRAM
1
AVSS18_MIPIRX0 AVSS18_MIPITX
2
D_GND AVDD18_USB AVDD33_USB W1 T2 1
2
N27 L3
D_GND D_GND
D_GND
2
C10093 C/ 220/ nF/ 0201
C0201
C10094 C/ 220/ nF/ 0201
C0201
VIO18_PMU VUSB33_PMU 1 C10100 C/ 100/ nF/ 0201 C0201 D_GND VCN18_PMU 1 C10099 C/ 100/ nF/ 0201 C0201 2
D_GND
SRAMB
D_GND AVDD18_WBG B30
2
VSRAM_PMU
AVSS33_USB
W2
D_GND
C10095 C/ 1/ uF/ 0201 C0201
B
L14 V19 V20 1 1 C10004 C/ 4.7/ uF/ 0402 C10005 C/ 100/ nF/ 0201
DVDD_SRAM DVDD_SRAM DVDD_SRAM
D_GND
D_GND
VDDQG9 G12 G14 G16 G18 H9 H12 H14 H16 H18 DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI DVDD12_EMI
AVSS18_WBG AVSS18_WBG AVSS18_WBG AVSS18_WBG AVSS18_WBG AVSS18_WBG AVSS18_WBG
C29 D29 E28 E31 F27 F28 L30
2
2
D_GND D_GND
VM_EXT
VM
GND
1
R1021 R/ NC/ 0603 R0603 2 2
1
R1005 R/ 0/ ohm/ 0603 R0603
DVDD12_EMI
Schematic design notice of"10_BB_POWER" page. Note 10-1: 4 mil GND trace with good shielding to PMIC (Differential)IC-MT6735-LP2-E1-SBS_MAP0827
1
1
1
1
1
1
1
2
2
D_GND
2
2
2
2
2
D_GND
IC-MT6735-LP2-E1-SBS_MAP0827
Note 10-2: Please reserve footprint of C10006& C10067& C10038 for MT6735/MT6735M/MT6735P PCB design, since MTK will confirm if these CAPs can be removed or not near MT6735 MP.
A
2
C10086 C/ 100/ nF/ 0201 C0201
C10076 C/ 100/ nF/ 0201 C0201
C10072 C/ 100/ nF/ 0201 C0201
C10077 C/ 100/ nF/ 0201 C0201
C10073 C/ 100/ nF/ 0201 C0201
C10087 C/ 2.2/ uF/ 0402 C0402
C10075 C/ 2.2/ uF/ 0402 C0402
A
Note 10-3: FSOURCE_P(EFUSE) (1)FSOURCE_P EFUSE power(VEFUSE) should be only for EFUSE usage(not share with other application) (2)W/I EFUSE program, VEFUSE need 1uF bypass cap (pls refer to“LDO output voltage/current table”) (3)W/O EFUSE program, VEFUSE bypass cap should be NC.Title Size D Date:5 4 3 2
10_BB_ POWER
MTK ConfidentialWednesday, January 14, 20151
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U1001B U1001A
MT6735-SBSD
This c
ircuit muse be reserved SIM[65][65][65] VIO18_PMU[65][65][65] R1112 R/ 47/ K/ 0201/ NC R0201 1 Board_Type_ID AK20 AH19 SIM2_SCLK SIM2_SIO SIM2_SRST L4 K1 K2 SIM1_SCLK SIM1_SIO SIM1_SRST K4 J2 J4 SIM1_SCLK SIM1_SIO SIM1_SRST SIM2_SCLK SIM2_SIO SIM2_SRST
MT6735-SBSABB_IFC2KX26M_IN C2K_TX_BBIP C2K_TX_BBIN C2K_TX_BBQP C2K_TX_BBQN C2K_RX1_BBIP C2K_RX1_BBIN C2K_RX1_BBQP C2K_RX1_BBQN C2K_RX2_BBIP C2K_RX2_BBIN C2K_RX2_BBQP C2K_RX2_BBQN APC1 APC2 AE13 AK14 AK13 AL12 AK12 AJ13 AH13 AG13 AG14 AL15 AL14 AH14 AJ14 AH10 AJ10D
PMU_IF[20,90][20][20][20] SYSRSTB WATCHDOG SRCLKENA0 SRCLKENA1 AC2 U4 V4 AC30 SYSRSTB WATCHDOG SRCLKENA0 SRCLKENA1
DRAM_IF
2
BPI-L/CBPI_BUS20 BPI_BUS19 BPI_BUS18 BPI_BUS17 BPI_BUS16 BPI_BUS15 BPI_BUS14 BPI_BUS13 BPI_BUS12 BPI_BUS11 BPI_BUS10 BPI_BUS9
[20]
RTC32K1V8 PWRAP_SPI0_CSN
AC1 Y4 Y3 AB2 AB1
RTC32K_CK PWRAP_SPI0_CSN PWRAP_SPI0_CK PWRAP_SPI0_MO PWRAP_SPI0_MI REXTDN AUD_CLK_MOSI AUD_DAT_MOSI AUD_DAT_MISO PWRAP_INT E2 EXTDN R1101 1 2 R/ 36/ ohm/ 0201/ 1% R0201 D_GND
1
[20] PWRAP_SPI0_CSN[20] PWRAP_SPI0_CK[20] PWRAP_SPI0_MO[20] PWRAP_SPI0_MI
R1111 R/ 47/ K/ 0201/ NC R0201 2 D_GND
AK21 Board_Type_ID AL21 AF20 AG20 AF21 AG21 AF22 AH21 AK22 AG22
APC1
[33]
[20] AUD_CLK_MOSI[20] AUD_DAT_MOSI_1[20] AUD_DAT_MISO_1
Y1 AUD_DAT_MOSI_1 Y2 W3 AA2
C
PLLs Test Pin
AH22 VREF F16 EVREF[41] AJ22 AK23 AL23
LTEX26M_IN BPI_BUS8 BPI_BUS7 BPI_BUS6 BPI_BUS5 LTE_TX_BBQP LTE_TX_BBQN LTE_TX_BBIP LTE_TX_BBIN
AE10 AK2 AK3 AL3 AK4
LTE_LTEX26M_IN RF_TX_BBIP RF_TX_BBIN RF_TX_BBQP RF_TX_BBQN[31][31][31][31]
[31]
C
RFI_C[31] LTE_RFIC0_BSI_EN[31] LTE_RFIC0_BSI_CK[31] LTE_RFIC0_BSI_D2[31] LTE_RFIC0_BSI_D1[31] LTE_RFIC0_BSI_D0 AG17 AG18 AK16 AL17 AK17 AG19 AH18 AJ19 AL18 RFIC0_BSI_EN RFIC0_BSI_CK RFIC0_BSI_D2 RFIC0_BSI_D1 RFIC0_BSI_D0 C2K_TXBPI RFIC1_BSI_EN RFIC1_BSI_CK RFIC1_BSI_D0 RFIC1_TX_BSI_EN RFIC1_TX_BSI_CK RFIC1_TX_BSI_D0
LTE_RX1_BBIP LTE_RX1_BBIN LTE_RX1_BBQP LTE_RX1_BBQN LTE_RX2_BBIP LTE_RX2_BBIN LTE_RX2_BBQP LTE_RX2_BBQN
AH7 AJ7 AK6 AL6 AK7 AK8 AJ8 AH8
RF_RX1_BBIP RF_RX1_BBIN RF_RX1_BBQP RF_RX1_BBQN RF_RX2_BBIP RF_RX2_BBIN RF_RX2_BBQP RF_RX2_BBQN
[31][31][31][31][31][31][31][31]
RFIC_ET_P RFIC_ET_N
AH5 AH4
JTAG[90][90]B
JTMS JTCK JTDI JTDO
AJ31 AJ30 AJ29 AK28
JTMS JTCK JTDI[31] JTDO LTE_TXBPI 2 1 VIO18_PMU R1109 R/ 47/ K/ 0201/ NC R0201 R1110 R/ 47/ K/ 0201 R0201 2 DVDD12_EMI[34] BPI_BUS22 D_GND VLTE_SRAM_ID
AK19 AK18 AJ18
MISC BSIRFIC_MIPI0_SCLK RFIC_MIPI0_SDATA RFIC_MIPI1_SCLK RFIC_MIPI1_SDATA LTE_PAVM0 LTE_PAVM1 AD2 AB5 AC3 AB4 AD4 AC4 MIPI0_SCLK MIPI0_SDATA MIPI1_SCLK MIPI1_SDATA[32][32][33][33]B
This circuit muse be reservedAH1 AD5 AG3 1 AG4 AE5 AF5 AG5 AF2 AF1 AE2 AG2 1 1 C1102 C/ 100/ nF/ 0201 D_GND C1103 C/ 1/ uF/ 0402 D_GND AE1 AH2
[90][90]
BPI - LLTE_TXBPI BPI_BUS27 BPI_BUS26 BPI_BUS25 BPI_BUS24 BPI_BUS23 BPI_BUS22 BPI_BUS21 BPI_BUS4 BPI_BUS3 BPI_BUS2 BPI_BUS1 BPI_BUS0
R1109: 47K, R1100: NC, Ext. Buck for LTE VSRAM: Enable R1109: NC, R1
100: 47K, Ext. Buck for LTE VSRAM: Disable
MiscAK30 TESTMODE
D_GND
AUX IND_GND AUXIN2 AUXIN1 AUXIN0 AH11 AG12 AUX_IN1_NTC AG11 AUX_IN0_NTC C1105 C/ 100/ pF/ 0201 RF PA TEMPERATURE AP TEMPERATURE 1 2 C0201 2 C0201 1 C0201 C1104 C/ 100/ nF/ 0201 D_GND AUX_IN1_NTC AUX_IN0_NTC[32][63]
NCA1 A2 A30 A31 B1 B31 AK1 AL1 AL2 AL30 AL31 NC NC NC NC NC NC NC NC NC NC NC IC-MT6735-LP2-E1-SBS_MAP0827
1
R1105 R/ 8.06/ K/ 0201 EVREF 2
1
[34] BPI_BUS21 C1101 C/ 100/ nF/ 0201
[41]
EVREF
2
REF POWERREFP AVSS_REFN AL10 AK10 REFP
R1106 R/ 8.06/ K/ 0201 2 D_GND
C1106 1 C/ 100/ pF/ 0201
C1105/C1106 close to BB
1
2
2
IC-MT6735-LP2-E1-SBS_MAP0827
D_GND
Close to AP IC.A A
Title Size C Date:5 4 3 2
11_BB_1
MTK ConfidentialWednesday, January 14, 20151
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11
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99
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4
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1
U1001C
U1001D
MT6735-SBSCSI[62][62][62][62][62][62][62][62][62][62] RCP RCN RDP0 RDN0 RDP1 RDN1 RDP2 RDN2 RDP3 RDN3 P28 N28 N29 P29 P30 P31 T30 R30 T31 U31 RCP RCN RDP0 RDN0 RDP1 RDN1 RDP2 RDN2 RDP3 RDN3
MT6735-SBSUSBTCP TCN TDP0 TDN0 TDP1 TDN1 TDP2 TDN2 TDP3 TDN3 N2 N1 R2 P2 R3 P3 N3 M3 M1 M2 TCP TCN TDP0 TDN0 TDP1 TDN1 TDP2 TDN2 TDP3 TDN3[61][61][61][61][61][61][61][61][20][61][61][20][64][64] USB_DP USB_DM U2 V2 USB_DP USB_DM
DSI
MSDCsMSDC0_RSTB MSDC0_CMD D26 B24 C23 E25 D25 D23 A24 A23 E23 B25 B26 A26 MSDC0_RSTB MSDC0_CMD MSDC0_CLK MSDC0_DSL MSDC0_DAT7 MSDC0_DAT6 MSDC0_DAT5 MSDC0_DAT4 MSDC0_DAT3 MSDC0_DAT2 MSDC0_DAT1 MSDC0_DAT0[41][41][41][41][41][41][41][41][41][41][41][41]
1
USB_VRT_P0
V1
USB_VRT
MSDC0_CLK MSDC0_DSL MSDC0_DAT7 MSDC0_DAT6 MSDC0_DAT5 MSDC0_DAT4 MSDC0_DAT3 MSDC0_DAT2 MSDC0_DAT1 MSDC0_DAT0
R1201 R/ 5.1/ K/ 0201/ 1% R0201
D
BCT3 T4 CHD_DP CHD_DM
D
D_GND
CHD_DP CHD_DM
2
MSDC1_CLK[62][62][62][62][62][62] RCP_A RCN_A RDP0_A RDN0_A RDP1_A RDN1_A T28 R28 T29 R29 V30 U30 V29 U29 V28 U28 MSDC1_CMD RCP_A RCN_A RDP0_A RDN0_A VRT RDP1_A RDN1_A RDP2_A RDN2_A RDP3_A RDN3_A 2
H3 F2 G2 H2 H4 G4 L29 K28 M30 M31 L27 M27
MSDC1_CLK MSDC1_CMD MSDC1_DAT3 MSDC1_DAT2 MSDC1_DAT1 MSDC1_DAT0
MSDC1_CLK MSDC1_CMD
[40][40]
KEYPADR1 MIPI_VRT 1[65,90] R1227 R/ 1.5/ K/ 0201/ 1% R0201 AG24 AK24 AL24 KPROW0 AG23 AJ23 AH23 KPROW2 KPROW1 KPROW0
MSDC1_DAT3 MSDC1_DAT2 MSDC1_DAT1 MSDC1_DAT0 MSDC2_CLK
MSDC1_DAT[3..0]
[40]
Note: 12-1
MSDC2_CMD MSDC2_DAT3 MSDC2_DAT2 MSDC2_DAT1 MSDC2_DAT0
Note 12-1: MSDC2 Pin should be NC (No Connection) for MT6735M& MT6735P
D_GND AH31 W4 AA5 DISP_PWM0 LCM_RST DSI_TE[23][61][61] VCAM_IO_PMU
[65][65,90]
KPCOL1 KPCOL0
KPCOL2 KPCOL1 KPCOL0
DISP_PWM LCM_RST
CONN_IFWB_CTRL0 WB_CTRL1 WB_CTRL2 WB_CTRL3 WB_CTRL4 WB_CTRL5 WB_SCLK WB_SDATA WB_SEN XIN_WBG SCL1 SDA1 WB_RSTB ANT_SEL0 ANT_SEL1 ANT_SEL2 F29 G29 G28 H29 H28 J29 B27 B28 A29 E27 B29 J28 M28 L28 WB_CTRL0 WB_CTRL1 WB_CTRL2 WB_CTRL3 WB_CTRL4 WB_CTRL5C
[23] GPIO_Flash_Strobe[23] GPIO_Flash_ENC
W29 W28 Y31
CMDAT0 DSI_TE CMDAT1 CMPCLK
[62] GPIO_CAMERA_RESET
R1202 R/ 4.7/ K/ 020
1 1 2 1 2 R1203 R/ 4.7/ K/ 0201 SCL0 SDA0
R0201
I2CAA30 Y30 SCL0 SDA0
R0201
[62][62] VIO18_PMU
CONN_SCLK CONN_SDATA CONN_SEN CONN_XO_IN CONN_RSTB
R1204 R/ 4.7/ K/ 0201 R0201 1 2 1 2 R1205 R/ 4.7/ K/ 0201 R0201 SCL1 SDA1 R1206 R/ 4.7/ K/ 0201 R0201 1 2 1 2 R1207 R/ 4.7/ K/ 0201 R0201 SCL2 SDA2
AB31 AB30
[62]
CMMCLK
Y27 Y28
CMMCLK CMMCLK1
Note: 12-2
[61][61]
Note 12-2: MT6735M& MT6735P does Not have CMMCLK1 function[63] EINT_ALPS AH28 AH29 AG30 AH30
VIO18_PMU
AA28 AB28
SCL2 SDA2
SPISPI_CS SPI_CK SPI_MO SPI_MI
PCM (ext MD)AB27 AC27 SCL3 SDA3 PCM_CLK PCM_SYNC AE27 AD29 AD28 AD27 EINT_M GPIO_CTP_RSTB[63][61]
[23,51,63][23,51,63]
[63] EINT_ACC
UART[90][90] UTXD0 URXD0 AJ28 AJ27 AG27 AH27 AD30 AE29 AE30 AE31 UTXD0 URXD0 UTXD1 URXD1 UTXD2 URXD2 UTXD3 URXD3
PCM_TX PCM_RX
GPIOSRCLKENAI AC31 SRCLKENAI[51]
[63] EINT_GYRO
I2SB
EINT0 EINT1 EINT2
AF28 AE28 AF27 AF30 AF31 AL29 AK29 AJ26 AH26 AG26 AH25 AG25 AK25 EINT_NFC GPIO_NFC_IRQ GPIO_NFC_RSTB GPIO_NFC_ENB EINT_SD EINT_EAR CAM_PDN0 INT_SIM1 INT_SIM2 EINT_CTP CAM_RST1 CAM_PDN1[51]B
AK26[50] GPIO_GPS_LNA_EN AL27 AK27
[51][51][51][40][60][62][65][65][61][62][62]
I2S_BCK I2S_LRCK I2S_DATA_IN
[50] WB_CTRL0[50][50][50] WB_CTRL1 WB_CTRL2 WB_CTRL3
WB_CTRL0 WB_CTRL1 WB_CTRL2 WB_CTRL3 WB_CTRL4 WB_CTRL5 CONN_SCLK CONN_SDATA CONN_SEN CONN_RSTB WB_RX_IP WB_RX_IN WB_RX_QP WB_RX_QN WB_TX_IP WB_TX_IN WB_TX_QP WB_TX_QN GPS_RX_IP GPS_RX_IN GPS_RX_QP GPS_RX_QN F2W_CLK F2W_DATA E30 D30 C30 C31 D28 D27 K30 J30 J31 H31 H30 G30 F30 F31
WCN 6625GPS_RXIP GPS_RXIN GPS_RXQP GPS_RXQN F2W_CLK F2W_DATA WB_RXIP WB_RXIN WB_RXQP WB_RXQN WB_TXIP WB_TXIN WB_TXQP WB_TXQN
EINT3 EINT4 EINT5 EINT6 EINT7 EINT8 EINT9 EINT10 EINT11 EINT12
[50] WB_CTRL4[50] WB_CTRL5[50][50] IC-MT6735-LP2-E1-SBS_MAP0827[50][50] CONN_SEN CONN_RSTB CONN_SCLK CONN_SDATA
[50] GPS_RX_IP[50] GPS_RX_IN[50] GPS_RX_QP[50] GPS_RX_QN[50] F2W_CLK[50] F2W_DATA[50]A
GPS_RX_IP GPS_RX_IN GPS_RX_QP GPS_RX_QN F2W_CLK F2W_DATA WB_RX_IP WB_RX_IN WB_RX_QP WB_RX_QN WB_TX_IP WB_TX_IN WB_TX_QP WB_TX_QN CONN_XO_INA
IC-MT6735-LP2-E1-SBS_MAP0827
WB_RX_IP WB_RX_IN WB_RX_QP WB_RX_QN WB_TX_IP WB_TX_IN WB_TX_QP WB_TX_QN CONN_XO_IN
[50][50][50][50][50][50][50][50]5 4
Schematic design notice of"12_BB_2" page. Note 12-1: MSDC2 Pin should be NC (No Connection) for MT6735M& MT6735P Note 12-2: MT6735M& MT6735P does Not have CMMCLK1 function Please refer to MT6735M/P Design Notice for details3 2
Title Size C Date:
12_BB_2
MTK ConfidentialWednesday, January 14, 20151
Sheet
12
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99
5
4
3
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1
D
U1001G
D
MT6735-SBSEMI_IF[41] DQ[0..31] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 C10 B13 C11 A12 D12 A15 A14 B12 A17 B16 B15 D15 A18 D17 B17 C18 A9 C7 B10 B8 D9 B11 A11 A8 D21 B19 B20 B21 A20 A21 D20 B22 RDQ0 RDQ1 RDQ2 RDQ3 RDQ4 RDQ5 RDQ6 RDQ7 RDQ8 RDQ9 RDQ10 RDQ11 RDQ12 RDQ13 R
DQ14 RDQ15 RDQ16 RDQ17 RDQ18 RDQ19 RDQ20 RDQ21 RDQ22 RDQ23 RDQ24 RDQ25 RDQ26 RDQ27 RDQ28 RDQ29 RDQ30 RDQ31 RCS_B RCS1_B RCKE RDQM0 RDQM1 RDQM2 RDQM3 RDQS0 RDQS1 RDQS2 RDQS3 RDQS0_B RDQS1_B RDQS2_B RDQS3_B RCLK0 RCLK0_B RA0 RA1 RA2 RA3 RA4 RA5 RA6 RA7 RA8 RA9 B4 B3 D4 D14 C14 D7 C19 E15 E17 E12 F20 F15 F17 F12 E20 F9 E9 D6 B6 A3 A6 A5 C3 D2 C2 B2 D1 CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 CS0_N CS1_N CKE DQM0 DQM1 DQM2 DQM3 DQS0_T DQS1_T DQS2_T DQS3_T DQS0_C DQS1_C DQS2_C DQS3_C[41][41][41][41][41][41][41][41][41][41][41][41][41][41][41]C
C
CLK0_T CLK0_C
[41][41] CA[0..9][41]
B
B
IC-MT6735-LP2-E1-SBS_MAP0827
A
A
Title Size B Date:5 4 3 2
13_BB_3
MTK ConfidentialWednesday, January 14, 2015 Sheet1
13
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99
5
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2
1
U2001A
[65,90] PWRKEY[65][11,90] HOMEKEY SYSRSTB HOMEKEY
E2 N6 D3 D2
CONTROL SIGNALPWRKEY HOMEKEY RESETB EXT_PMIC_EN
BUCK OUTPUTVPROC VPROC VPROC VPROC VPROC
L2001 PL/ 0.33/ uH/ 2520
A7 B7 C7 D7 B8
VPROC_SW
1
2
125mil VPROC_PMU
[11]
WATCHDOG D_GND
M7 1 2 R2003R/ 200/ K/ 0201 R0201
VPROC_FB AVSS45_VPROC_FB WDTRSTB_IN UVLO_VTH FSOURCE PMU_TESTMODE SRCLKEN_IN0 SRCLKEN_IN1 SPI_CSN SPI_CLK SPI_MOSI SPI_MISO VCORE1 VCORE1 VCORE1 VCORE1_FB AVSS45_VCORE1_FB VLTE_FB AVSS45_VLTE_FB VLTE VLTE VLTE
C16 B15
4 mil GND trace with good shielding from baseband (Differential) VPROC_PMIC_FB_6328 VPROC_PMIC_FB_6328[10] GND_VPROC_PMIC_FB_6328 GND_VPROC_PMIC_FB_6328[10] L2003 PL/ 0.47/ uH/ 2016
N2 P4 D4 P8 R5 M6 K6
D
UVLO_VTH R RANGE: 200KOHM~ 250KOHM[11][11] SRCLKENA0 SRCLKENA1
D_GND
A12 B12 C12
VLTE_SW
1
2
75mil VLTE_PMUD
4 mil GND trace with good shielding (Differential)
C14 E13
VLTE_PMIC_FB GND_VLTE_FB
VLTE_PMIC_FB GND_VLTE_FB
[10][10]
[11] PWRAP_SPI0_CSN[11] PWRAP_SPI0_CK[11] PWRAP_SPI0_MO[11] PWRAP_SPI0_MI PWRAP_SPI0_MO PWRAP_SPI0_MI
L2006 PL/ 0.47/ uH/ 2016
L6 N5 R15
A5 A6 B5 C2 C1
VCORE_SW
1
2
90mil
VCORE_PMU
AUX ADCVAUX18
VCORE_PMIC_FB VCORE_PMIC_FB GND_VCORE_FB GND_VCORE_FB 4 mil GND trace with good shielding from baseband (Differential)
[10][10]
1VBAT C2023
2C/ 1/ uF/ 0201 C0201
M12 N13 P14
AVDD18_AUXADC AVSS18_AUXADC AUXADC_VINL2008
Please refer to latest MMD designNC/MMD/PMIC 100mil SH2009
D_GND
1
2
BAT_VPROC
VBAT INPUT50mil
VSYS22 VSYS22 VSYS22_FB
B10 B11 C10 D10C2007 C/ 22/ uF/ 0603 C0603 NC/MMD/PMIC SH2010
AVDD45_VPROC AVDD45_VPROC AVDD45_VPROC AVDD45_VPROC AVDD45_VLTE AVDD45_VLTE AVDD45_VLTE AVDD45_VCORE1 AVDD45_VCORE1 AVDD45_VCORE1 AVDD45_VSYS22 AVDD45_VSYS22 AVDD45_VPA AVDD45_SMPS
C3
1
L2009
2
1NC/MMD/PMIC
2SH2011
BAT_VLTE
30mil 30mil
1D_GND
2
BAT_VCORE1
B13 C13 D13 C4 C5 B4 A1 B1 A16 C15
VPA VPA_FB
A15 B14
VPA_SW
1 1
2 PL/ 2.2/ uH/ 2520 1
30mil C2055 C/ 2.2/ uF/ 0402 C0402
D_GND VPA_PMU
NC/MMD/PMIC
SH2012
2
C2049 C0201 C/ 1/ nF/ 0201/ 16V/ NC
11. VBAT_Buck input cap should connect to its individual GND first, then go to main GND. 2. Buck controller power trace (AVDD
45_SMPS) must use single trace connected to system (battery) power directly, and can’t merge with others. 3. Please refer to latest MMD design NC/MMD/PMIC 1 NC/MMD/PMIC 1
2 2 SH2013 2 SH2014
BAT_VSYS BAT_VPA
30mil 30mil 4mil
LDO OUTPUTVM VTCXO_0 VTCXO_1 VRF18_0 VRF18_1 VSIM1 VSIM2 VCN18 VCN28 VCN33 VIO18 VUSB33 VIO28 TREF VEFUSE VMC VMCH VEMC_3V3 VCAMA VCAMAF VCAMD VCAMIO VGP1 VSRAM
J1 P9 T16 F10 F9 R11 N11 F3 R13 R12 F2 P11 K2 P13 T15 K4 R9 R10 T14 H5 H2 E3 H4 E4
D_GND
D_GND VM VTCXO_0_PMU VRF18_0_PMU VSIM1_PMU VSIM2_PMU
2R2005 R/ 1/ ohm/ 0201 R0201
1 1
2
D_GND 20mil 20mil 20mil 20mil 20mil
2
2
4 mil GND trace with good shielding from baseband (Differential)
1
A2 B2
VSYS_SW
50mil
1
2
PL/ 0.47/ uH/ 2016
50mil
VSYS_PMU C2039 C/ 10/ uF/ 0603 C0603
C2043 C/ 1/ uF/ 0201 C0201
VBATC
120mil
T13 T8 K1 T11 M2
AVDD45_LDO1 AVDD45_LDO2 AVDD45_LDO3 AVDD45_LDO4 AVDD45_LDO5
VCN18_PMU VCN28_PMU VCN33_PMU VIO18_PMU VUSB33_PMU VIO28_PMU VBATREF VEFUSE VMC_PMU VMCH_PMU VEMC_3V3_PMU VCAMA_PMU VCAM_AF_PMU VCAMD_PMU VCAM_IO_PMU VGP1_PMU VSRAM_PMU
1
1
1
1
1
C0201 C/ 100/ nF/ 0201
D_GND C2031 D_GND
2
C2040 C/ 22/ uF/ 0603 C0603
1
2
2
2
2
2
1
1
C0201
C2030 C/ 100/ nF/ 0201
C/ 1/ uF/ 0201
2
1
1
1
1
1
C0201
C2040 close to AVDD22_LDO1/2/3/4 balls
L3
2
2
2
2
D_GND
GNDA9 B9 C8 C9 D9 B6 C6 D6 C11 D11 D12 A3 B3 A14 B16 AVSS45_VPROC AVSS45_VPROC AVSS45_VPROC AVSS45_VPROC AVSS45_VPROC
Vibrator DriverVIBR J4
GND_VPROC SH2001
Close to MT6328
D_GND
15mil
D_GND
D_GND VIBR_PMU
D_GND
2
D_GND
D_GND VRTC C2008 C/ 22/ uF/ 0603 C0603
2
D_GND
AVSS45_VREF
C2050 C/ 1/ uF/ 0201/ NC C0201
C2047 C/ 1/ uF/ 0201 C0201
C2046 C/ 1/ uF/ 0201 C0201
C2048 C0201 C/ 1/ uF/ 0201/ NC
2
1
2
1
NC/MMD/PMIC
GND_VLTE
XIN XOUT ENBB XOSC_EN
T6 R6 R3 T1 M9 P5 R4ENBB
32K_IN 32K_OUT
1
SH2002
SH2003
SH2004
GND_VSYS
AVSS45_VSYS22 AVSS45_VSYS22 AVSS45_VPA
2
2
2
2
1
1
1
1
1
2
NC/MMD/PMIC
NC/MMD/PMIC
NC/MMD/PMIC
NC/MMD/PMICSH2005 NC/MMD/PMIC SH2005
AVSS45_SMPS
RTC32K_2V8 RTC32K_1V8_0
RTC32K1V8
[11]
2
D_GND D_GND D_GND D_GND
D_GND
Please refer to latest MMD designB
E5 E12 D5 E10 G7 E11 G8 E6 G9 H10 H7 E7 H8 H9 E8 E9 J10 J7 J8 J9 K7 K8 K9 K10 G11
RTC32K_1V8_1 AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO
1
D_GND
AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO AVSS45_LDO
H12 G12 F12 G10 F11 G6 L7 L8 L9 J6 H6 H11 J11 K11 L12 L10 L11
Close to MT6328
2
C2019 C/ 2.2/ uF/ 0402 C0402
C2016 C/ 2.2/ uF/ 0402 C0402
C2017 C/ 2.2/ uF/ 0402 C0402
C2018 C/ 2.2/ uF/ 0402
4 mil trace with good shi
elding (Differential) U2001B[21][21] BATSNS ISENSE[31] MT6169_XO4_CLK
1
1
2
[11] AUD_DAT_MOSI_1 U2001C[11] AUD_DAT_MISO_1
N8 M10
AUD_DAT_MOSI AUD_DAT_MISO
AU_FLYP AU_FLYN AVDD45_SPK
G15 F15 D14 E14 R14 K16 K12 G13
1
2
C0402
2
2
1
VBAT R/ 330/ K/ 0402/ 1% VBUS
FCHR_ENB CHG_DM BATSNS CHG_DP ISENSE VSYSSNS BATON VCDT ISINK1 VDRV CHRLDOU/ MT6328E1
M1 N1 E15 D15 R16 P15 N14D_GND
N3 1 N4C2051 C/ 1/ uF/ 0201 C0201[21] VCDT D_GND CHR_LDO R2033 R/ 39/ K/ 0402/ 1% VDRV BAT_ON
CHD_DM CHD_DP CS_N CS_P
[12][12][21][21]
[60][60][60][60][60][60][60]
AU_SPK1P AU_SPK1N AU_HSP AU_HSN AU_HPL AU_HPR ACCDET AU_VIN0_P AU_VIN0_N AU_VIN1_P AU_VIN1_N AU_VIN2_P AU_VIN2_N
F16 E16 K15 J14 H15 H16 M14 M16 M15 K13 L13 K14 L14
SPK_P SPK_N AU_HSP
AVSS45_SPK VAUD28 AVDD28_AUD
M4 P2 R1 R2 1 P3C2041 C/ 1/ uF/ 0201 C0201
R2032
2
AU_HSN AU_HPL AU_HPR ACCDET AVSS18_AUD AU_VIN0_P AU_VIN0_N AU_VIN1_P AU_VIN1_N AU_VIN2_P AU_VIN2_NU/ MT6328E1 D_GND D_GND Pole4_J[60]
1
Gauge ISINK
CS_N CS_P ISINK0
AVSS28_AUD AVDD18_AUD
A
2
VCDT rating: 1.268V1
2
4 mil trace with good shielding (Differential)
C2036 C/ 1/ uF/ 0201 C0201
D_GND
1
single via to GND plane directlyA
D_GND
G14 F13 1C2027 C/ 2.2/ uF/ 0402 C0402 VIO18_PMU
AVSS45_ISINK
Close to PMICD_GND D_GND
[60][60][60][60][60][60]
2
1
2
2
1
AU_REFN
H14
GND shielding To improve noise level, connect to audio jack first, and then connect to GND5 4 3 2
2
2
C2020 C/ 2.2/ uF/ 0402 D_GND
C
C2011
C2012
C2014
C2015
C2013
Close to MT632850mil VSYS_PMU 20mil 20mil 20mil 20mil 20mil
1
1
1
1
1
J2 H3 E1 F1 G1 T2 T3 T5
C0402 C/ 4.7/ uF/ 0402
C0402
C0402
C0402C/ 2.2/ uF/ 0402
AVDD22_LDO1 AVDD22_LDO1 AVDD22_LDO2 AVDD22_LDO3 AVDD22_LDO4
C0402 C/ 2.2/ uF/ 0402
2
2
2
2
2
C/ 4.7/ uF/ 0402
C/ 4.7/ uF/ 0402
DIG PowerDVDD18_IO DVDD18_DIG DVSS18_IO
VIO18_PMU
C2057
D_GND
VREFL4 VREF
C2056 C0201 C/ 1/ uF/ 0201
R2026 R/ 1/ K/ 0201 R0201
RTCAVSS45_VCORE1 AVSS45_VCORE1 AVSS45_VCORE1 AVSS45_VLTE AVSS45_VLTE AVSS45_VLTE
AVDD28_RTC AVSS28_RTC
R8 R7D_GND
VRTC
1
2
1
2D_GND
GND_VCORE1
1
2X2001 X/ 32/ KHz/ CM7V-T1A CRYS/SMD/3.2X1.5/9H032000XX/TXC
C2032 C/ 100/ nF/ 0201 C0201 D_GND
C2033 C/ 22/ pF/ 0201 C0201
C2034 C/ 22/ pF/ 0201 C0201
GND_VPA
B
R/ 0/ ohm/ 0201-3P(1-2)[11] SRCLKENA0 ENBB
R2035
1 2 3ENBB_6169[31]
D_GND
U/ MT6328E1 D_GND
AudioJ12 M8 CLK26M AUD_CLK AU_MICBIAS1 AU_MICBIAS0 N15 N16C2038 C/ 2.2/ uF/ 0402 C2044 C2042 C/ 1/ uF/ 0201 C/ 1/ uF/ 0201 C0201 C0201 MICBIAS1 MICBIAS0 C2054 C/ 100/ nF/ 0201 C0201[11] AUD_CLK_MOSI
VBAT 20mil C2022 C/ 1/ uF/ 0201 C0201
J5
Charger
BC1.1/1.2
20mil D_GND D_GND
AVSS18N_AUD
C2058 C/ 2.2/ uF/ 0402 C0402
C2027/ C2038/ C2058 flying cap& holding cap: 4.7uF for 16ohm reciver 2.2uF for 32ohm reciver
Title
Size A1 Date:1
20_POWER_MT6328
MTK ConfidentialWednesday, January 14, 2015 Sheet 20 of 99
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4
3
2
1
BATTERY CONNECTOR
Pulse ChargerVBUS
D
CON2101 CON/ KEIRAKU KBC13S3A2R BAT/SMD/KBC23S3D4XR/KEIRAKU VBAT D2103 D/ MMSZ5231BT1G DIODE/SMD/MMSZ5221B VF: 4.85V~5.36V D_GND VBAT+ 6 NC NTC GND7 NC NC NC 1 2 3 125mil 4 5 125mil
VBAT
Battery NTC=10K, R2103 select 16.9K, 1% Battery NTC=47K, R2013 select 61.9K, 1%R2104 2 R/ 1/ K/ 0402 R0402 R2103 2 R/ 16.9/ K/ 0402 R0402
D
OVP: 12V50mil
1 1
BAT_ON VBATREF
[20]
From MT6328C2101 R2192 50mil 1 2 CHR_LDO CHR_LDO D_GND 1 2
SOD123 500mW
D_GND
C/ 1/ uF/ 0603/ 25V
R/ 1.5/ K/ 0402
Kelvin connection6 5C
R/ 0.010/ ohm/ 1206/ 1% 125mil R2137
ESD suggest<5pf on BAT_OND_GND
1. R2135 close to battery connector. (<10mm) 2. Charging path should be 40mil or wider 3. Star connection from R2135 to BAT connector
C
4E U2106
50milC C B
U/ STT818B/ SOT-6 VDRV
1
2
3
U2116 3
1
2
VDRV
50mil CS_P CS_N[20][20]
Q/ SSM3K35MFV 2-1L1B/SMD/SSM3K35MFV
4 mil trace with good shielding (Differential)50mil 1 R2135 R/ 0.056/ ohm/ 0805/ 1% R0805 2 ISENSE[20]
Rsense
BATSNSC
[20]
DifferentialC
50mil
100mil
VBAT
B
B
A
A
Title Size D Date:5 4 3 2
21_POWER_TBD
MTK ConfidentialWednesday, January 14, 20151
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D
LCM Backlight LED DriverPL2303 VBAT PL/ 22/ uH/ LQH3NPN220MJ0L U2305 6 VIN PAD GND SW COMP FB 4 2 1 1 1 LCM_LEDK 1 LCM_LEDK C2319 C/ 1/ uF/ 0603/ 50V C0603[61][12] GPIO_Flash_Strobe[12] GPIO_Flash_EN D2301 D/ PMEG6010CEH LCM_LEDA LCM_LEDA[61] VBAT
Flash LED 5V BoostD
Flash LED I2C address: 0X63 (Write:0xC6, Read:0xC7)PL2305 PL/ VLS252010HBX-1R0M L/IND/SMD/2520 1 2 U2301 U/ LM3642 DSBGA9/SMD/P0.5/LM3642 B3 B2 C1 C3 C2 IN STROBE TX/TORCH SCL SDA GND A3 D_GND D_GND D_GND SW LED OUT A2 B1 A1 1 C2322 C/ 10/ uF/ 0402 C0402 K 2 FLASH_1 40mil 1 1 2 C2323 C/ 33/ pF/ 0201 C0201 LED2302 LED/ LUW F8DN FLASH_LED/LUW_F8DN
40mil 1 C2320 C/ 4.7/ uF/ 0402 C0402
[12]
DISP_PWM0 1
5
CTRL
D_GND GPIO_Flash_Strobe GPIO_Flash_EN
U/ TPS61161 C2312 SON6/SMD/P0.65/TPS61161 C/ 2.2/ uF/ 0402 R2310 R/ 10/ ohm/ 0201 7 3 2
C2315 C/ 220/ nF/ 0201/ X7R 2 2
2
2
A
[12,51,63]
SCL2 SDA2
VOUT max.: 38V Switch Frequency: 5KHz~100KHz VFB: 200mV
D_GND
[12,51,63]
2
D_GND
C
C
B
B
A
A
Title Size C Date:5 4 3 2
23_POWER_THIRD-PARTY
MTK ConfidentialWednesday, January 14, 20151
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External Buck for DRAMD D
VBAT
U2401 U/ NCP6324CMTAATBG/ NC WDFN8/SMD/P0.5/NCP6324 8 7 PVIN AVIN EN MODE/PG SW FB PGND AGND 2 4 1 3
L2401 PL/ VLS252010HBX-1R0M/ NC L/IND/SMD/2520 1 2 2 R2416 R/ 220/ K/ 0201/ NC R0201 1 1
1.22VVM_EXT
D_GND D_GND
D_GND
2
C2402 C/ 4.7/ uF/ 0402/ NC C0402
VM 2
5 6
2
C2413 C/ 15/ pF/ 0201/ NC C0201 1 C2411 C/ 10/ uF/ 0603/ NC C0603
1
Vout=0.6x(1+R1/R2)
R2417 R/ 210/ K/ 0201/ NC R0201 1 D_GND
D_GND
[Optional] for Low Power enhancement
DRAM Buck Purpose: Reserved for low power performanceC C
B
2
B
A
A
Title Size C Date:5 4 3 2
24_POWER_THIRD-PARTY
MTK ConfidentialWednesday, January 14, 20151
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R3101 R/ 62/ ohm/ 0201 R0201 RF_TXDET 1 2 1 R3102 R/ 105/ ohm/ 0201 R0201 2 RF_HB1_TX_MT6169 2 D_GND 1 R3103 R/ 105/ ohm/ 0201 R0201
D_GND RF_MB2_TX_MT6169
RF_TX_BBIP RF_TX_BBIN RF_TX_BBQN RF_TX_BBQP RF_RX1_BBIP RF_RX1_BBIN RF_RX1_BBQN RF_RX1_BBQP RF_RX2_BBIP RF_RX2_BBIN
Off-Page ConnectorD
RF_MB1_TX_MT6169
RF_TXDET_MT6169
(To RF front-end)
RF_LB3_TX_MT6169
D
[33] RF_TXDET
RF_B40B41_PRX_MT6169_RFIP1_HB1 RF_B40B41_PRX_MT6169_RFIN1_HB1
D_GND RF_RX2_BBQN RF_RX2_BBQP
M13
M15
G14
[32] RF_MB2_TX_MT6169[33] RF_MB1_TX_MT6169[33] RF_LB3_TX_MT6169 RF_B34B39_PRX_MT6169_RFIP1_MB1 B14 RF_B34B39_PRX_MT6169_RFIN1_MB1 B13 RF_900_PRX_MT6169_RFIP1_LB2 A15[33] RF_B40B41_PRX_MT6169_RFIP1_HB1[33] RF_B40B41_PRX_MT6169_RFIN1_HB1[33] RF_DCS_PRX_MT6169_RFIP1_HB3[33] RF_DCS_PRX_MT6169_RFIN1_HB3 RF_900_PRX_MT6169_RFIN1_LB2 A14 B12 A12 RF_850_PRX_MT6169_RFIP1_LB3A11 RF_850_PRX_MT6169_RFIN1_LB3 B11[33] RF_B34B39_PRX_MT6169_RFIP1_MB1C
L13 K13 J13 H13 G13 F13 E13 E14 E15 L14
C15
C14
D14
H15
H14
N15
N14
N13
B15
K14
F15
F14
[32] RF_HB1_TX_MT6169
J14
J15
M7
M6
M5
M4
N8
N7
N5
N4
RFIP1_MB1 RFIN1_MB1 RFIP1_LB2 RFIN1_LB2 RFIP1_HB2 RFIN1_HB2 RFIP1_LB3 RFIN1_LB3 RFIP1_MB2 RFIN1_MB2 RFIP1_HB3 RFIN1_HB3 RFIP2_LB1 RFIN2_LB1 RFIP2_HB1 RFIN2_HB1 RFIP2_LB2 RFIN2_LB2 RFIP2_HB2 RFIN2_HB2 RFIP2_MB1 RFIN2_MB1 RFIP2_LB3 RFIN2_LB3 VRXHF2 VRXHF1 V28_ESD1 VTXHF VTXLF VRXLF VDCXO_DIG VIO VTCXO XMODE CLK_SEL EN_26M_BB RFIN2_MB2 RFIP2_MB2 RFIN2_HB3 RFIP2_HB3 OUT_32K 32K_EN TST1 U3101
TST4 TST3 TXBPI VRT TST2 TMEAS BSI_CK BSI_EN BSI_D0 BSI_D1 BSI_D2
H12 M12 K10 N10 M10 M9 K6 J7 J6 J5 K4
RFIN1_HB1
RFIN1_LB1
RX1_BBIN
RFIP1_HB1
RFIP1_LB1
RX2_BBIN
TX_HB1
TX_HB2
RX1_BBQN
RX2_BBQN
RX1_BBQP
RX2_BBQP
DET_GND TXO_GND TXO_GND TXO_GND TXO_GND TXO_GND TXO_GND TXO_GND TXO_GND TXO_GND
TX_LB1
TX_LB2
TX_LB3
TX_LB4
RX1_BBIP
RX2_BBIP
TX_MB1
TX_MB2
TX_BBIN
TXDET
TX_BBQN
TX_BBIP
TX_BBQP
LTE_TXBPI VRT only 5% resistor LTE_RFIC0_BSI_CK LTE_RFIC0_BSI_EN LTE_RFIC0_BSI_D0 LTE_RFIC0_BSI_D1 LTE_RFIC0_BSI_D2 1 R3105 R/ 2K/ ohm/ 0201/ 1% R0201 2 D_GND
RF_PCS_PRX_MT6169_RFIP1_MB2 B10 RF_PCS_PRX_MT6169_RFIN1_MB2B9 RF_DCS_PRX_MT6169_RFIP1_HB3 A9
[33] RF_B34B39_PRX_MT6169_RFIN1_MB1[33] RF_PCS_PRX_MT6169_RFIP1_MB2[33] RF_PCS_PRX_MT6169_RFIN1_MB2[33] RF_900_PRX_MT6169_RFIP1_LB2[33] RF_900_PRX_MT6169_RFIN1_LB2[33] RF_850_PRX_MT6169_RFIP1_LB3[33] RF_850_PRX_MT6169_RFIN1_LB3
RF_DCS_PRX_MT6169_RFIN1_HB3 A8 B8 B7 B6 A6 A5 B5 RF_B41_DRX_MT6169_RFIP2_HB2 B4 RF_B41_DRX_MT6169_RFIN2_HB2 B3
U/ MT6169MT6169/VFBGA175/P0.4/B0.25/6.2X5.4
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
L12 L11 L10 L9 L8 L7 L6 L3 K12 K9 K8 K7 K3 J12 J11 J10 J9 J8 J4 J3
Off-Page Connector(To BB IC part)[11] RF_RX2_BBIP[11] RF_RX2_BBIN[11] RF_RX2_BBQP[11] RF_RX2_BBQNC
[11][11][11][11]
RF_RX1
_BBIP RF_RX1_BBIN RF_RX1_BBQP RF_RX1_BBQN
[34] RF_B41_DRX_MT6169_RFIP2_HB2[34] RF_B41_DRX_MT6169_RFIN2_HB2[34] RF_B39_DRX_MT6169_RFIP2_MB1[34] RF_B39_DRX_MT6169_RFIN2_MB1[34] RF_B40_DRX_MT6169_RFIP2_HB3[34] RF_B40_DRX_MT6169_RFIN2_HB3
RF_B39_DRX_MT6169_RFIP2_MB1 A3 RF_B39_DRX_MT6169_RFIN2_MB1 A2 A1 B1
XTAL2 XTAL1
GND GND GND GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND GND GND
GND GND GND GND GND GND GND GND GND GND
XO3 XO4 XO2 XO1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
H11 H10 H9 H8 H7 H6 H5 H4 H3 G12 G11 G10 G9 G8 G7 G6 G5 G4 G3 G2
[11][11][11][11]
RF_TX_BBIP RF_TX_BBIN RF_TX_BBQP RF_TX_BBQN
[11][11][11][11][11]
LTE_RFIC0_BSI_CK LTE_RFIC0_BSI_EN LTE_RFIC0_BSI_D2 LTE_RFIC0_BSI_D1 LTE_RFIC0_BSI_D0
[20] ENBB_6169[11] LTE_TXBPI[11] LTE_LTEX26M_IN D_GND[51] MT6169_XO3_CLK[20] MT6169_XO4_CLK[50] CLK_WCNB
C8 D13 M11 N11 K11 M8 L4 M3 J1
C3 C4 C5 C6 C7 C9 C10 C11 C12
D3 D4 D5 D6 D7 D8 D9 D10 D11 D12
C1
C2
D2
G1 H2 H1 M1
L2 N1 N2
E1 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12
E2
F1 J2 F3
K1 K2
B
1 32K_EN
VRF18_0_PMU
XMODE
1
1
1
1
2
2
2
2
2
RF_B40_DRX_MT6169_RFIN2_HB3 C/ 100/ nF/ 0201 C/ 100/ nF/ 0201 C/ 100/ nF/ 0201
D_GND
2
C3105 C/ 100/ nF/ 0201 C0201
2
D_GND D_GND D_GND VIO18_PMU VRF18_0_PMU VRF18_0_PMU
1
MT6169_XO3_CLK MT6169_XO4_CLK CLK_WCN LTE_LTEX26M_IN
D_GND D_GND ENBB_6169 1 ENBB_6169 Xtal2 D_GND 2 Xtal1 D_GND 1A
2
R3107 R/ 1K/ ohm/ 0201 C0201 R0201
C0201 C0201
2
C3102 C/ 100/ nF/ 0201 C0201
1
RF_B40_DRX_MT6169_RFIP2_HB3
R3108 R/ 1K/ ohm/ 0201 R0201
VTCXO_0_PMU C3112 C3101 C3104 1 1 2 VIO18_PMU 1 C3106 C/ 100/ nF/ 0201 C0201 C3103 C/ 100/ nF/ 0201 C0201
F2 F4 F5 F6 F7 F8 F9 F10 F11 F12 D_GND
VIO18_PMU VTCXO_0_PMU
C3111 C/ 2.2/ uF/ 0201 C0201
Far end Cap. For PMIC stability
D_GND 3 2 1
2
C3108 C/ 100/ nF/ 0201 C0201A
U3102 VTCXO/ 26/ MHz/ KT2520F26000DCW28QAK TCXO/SMD/2.5X2.0/KT2520F
NC NC
OUT
Vcc
Vcon
GND
4
5
6
VTCXO_0_PMU
1
Title C3110 C/ 100/ nF/ 0201 C0201 Size A2 Date:
2
C3109 C/ 0201/ NC C0201
31_RF_MT6169_PIN_OUT
MTK ConfidentialWednesday, January 14, 20151
D_GND5 4 3 2
D_GND
Sheet
31
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5
4 38/41 MMMB MH PA: B34,39,40,
3
2
1Off-Page Connector(To RF front-end)[31] RF_HB1_TX_MT6169
3/4G_PAIN_HB
[31] RF_MB2_TX_MT6169[33] RF_B40B41_PRX_FEM C3292 TXM_RX1 1 2 RF_HB1_TX_FEM D_GND L3213 D_GND C/ 18/ pF/ 0201 L0201 1 2 RF_B41_TRX_SAW_In 1 1 1 C3272 C/ 0201/ NC C0201 C3273 L/ 3.9/ nH/ 0201 C0201 5 U3224 SAW/ SAFEA2G60MA0F0A FILTER/SMD/885049 G 3 4 RF_B41_TRX_SAW_Out 1 C0201 L/ 1/ nH/ 0201 C3285 2 L3219 L/ 0201/ NC L0201
D
RF_HB1_TX_MT6169
C3256 C/ 15/ pF/ 0201 C0201 1 2
R3230 L/ 2.2/ nH/ 0201 R0201 RF_HB1_TX_MT6169_1 1 2 1 1 R3233 C/ 1.2/ pF/ 0201 R0201 2 2
DRF_B41_TRX_TXM L3218 L/ 10/ nH/ 0201 L0201 RF_B41_TRX_TXM[33] RF_B40_TRX_TXM[33]
R3231 C/ 1.2/ pF/ 0201 R02
01
RF_B40B41_PRX_FEM
RF_B41_TRX_FEM
IN 2 D_GND G OUT
2
D_GND
D_GND RF_B40B41_TRX_FEM_BYPASS D_GND D_GND
2
D_GND
G
C/ 0201/ NC C0201
LPF for more margin on Tx spuriousC3217 C/ 0201/ NC C0201 2 1 L3215 L/ 0201/ NC RF_MB2_TX_MT6169_1 2 2 C0201 C/ 0201/ NC C3254 L0201 1 2 1 2 3 RF_MB2_TX_FEM 4 MIPI0_SDATA R3210 R 2/ 0/ ohm/ 0201 1 MIPI0_SDATA_PA5 MIPI0_SCLK MIPI0_SCLK_PA 2 1 6 R3209 R/ 0/ ohm/ 0201 7 8
U3203 SKY77824/HRSMAC012/RF5418
B41B TRXL3210 C/ 3/ pF/ 0201 L0201 RF_B40_TRX_FEM 1 1
D_GND
D_GND RF_B40B41_TRX_TXM_BYPASS[33]
29 GND
RX2 RX1 GND HB4 GND HB3
28 27 26 25 24 23
5
RF_MB2_TX_MT6169
GND GND GND GND GND GND
1
1
D_GND This path is no use for sky77824 This path is reserved for other vendor's M/H PA which supports B34/B39 and TXM can't support B34/B39 TXM reuse
9 10 11 12 13 14
D_GND
2
2
C3258 L/ 3.6/ nH/ 0201 C0201
C3259 L/ 0201/ NC C0201 D_GND
1
G
C3228 C/ 0201/ NC C0201
GND M/H PA GND RFIN_H RFIN_M/ NC SDATA SCLK VIO VBAT
GND HB2 GND HB1 NC GND VCC2 VCC1
22 21 20 19 18 17 16 15
RF_B34B39_PA_TXM[33] TXM_HB2 D_GND U3215 SAW/ SAFEA2G35MF0F0A FILTER/SMD/885049 2 RF_B40_TRX_SAW_in G C3288 3 D_GND L/ 2.7/ nH/ 0201 C0201 4 RF_B40_TRX_SAW_out 1 2 L3221 L/ 5.1/ nH/ 0201 L0201 D_GND G C3286 RF_B40_TRX_1 1 2 RF_B40_TRX_TXM[11] AUX_IN1_NTC
2
2
C3291 C/ 0201/ NC C0201
1
1
IN OUT
C/ 33/ pF/ 0201 C0201 L3222 L/ 0201/ NC L0201 D_GND
D_GND
D_GND D_GND D_GND LTE_VMIPI C3249 C/ 33/ pF/ 0201 1 D_GND
B40 TRX
MIPI0_SDATA MIPI0_SCLK
[11][11]
D_GND
VBAT
CC3289 C/ 100/ nF/ 0201/ X7R C0201
2
1
1
VPA_PMU C3290 C/ 10/ pF/ 0201/ X7R C0201 1 C3243 C/ 100/ pF/ 0201/ X7R C0201 1 1 1 C3233 C/ 1/ uF/ 0201/ X7R C0201
L3211 D_GND L/ 2.6/ nH/ 0201 L0201 RF_B40B41_TRX_LPF_in_BYPASS 2 1
1 2 3
GND GND IN OUT
6 5 4
C3262 D_GND C/ 2.7/ pF/ 0201 C0201 RF_B40B41_TRX_LPF_out_BYPASS 1 2 1 1 C3264 L/ 3.3/ nH/ 0201 D_GND C0201 C3271 C/ 0201/ NC C0201
CRF_B40B41_TRX_TXM_BYPASS 2 LTE_VMIPI D_GND 2 1 R/ 0/ ohm/ 0402 R3212 VIO18_PMU
2
2
D_GND
D_GND D_GND
2
2
D_GND D_GND VPA_VCC1
U3210 LPF/ LF1608-B2R5KCB BALUN/SMD/HHM22112A2
D_GND
2
2
C3244 C/ 100/ pF/ 0201/ X7R C0201
Power Net ConnectionVPA_VCC1 and VPA PMU need to be connected after CapVPA_VCC1 2 1 R/ 0/ ohm/ 0201 R3211 10mil
C3245 C/ 1/ uF/ 0201/ X7R C0201
Bypass pathFor power LTE_VMIPI star connectionVPA_PMU C3206 C/ 0201/ NC C0201 1 2 1 L3214 L/ 0201/ NC L0201 2 2 U3216 LPF/ LF2012-L1R4NAA/ NC 1 3 RF_B34B39_PA_LPF_out In OUT GND C3276 C/ 0201/ NC 1 1 1 2 RF_B34B39_PA_TXM L3224 L/ 0201/ NC VBAT
1
D_GND
D_GND
1
L3216 L/ 0201/ NC L0201
1
RF_B34B39_PA_FEM
RF_B34B39_PA_LPF_in
L3223 L/ 0201/ NC
2
2
2 D_GND 2
C3263 C/ 0.5/ pF/ 0201 C0201
C3265 C/ 0201/ NC C0201 D_GND
D_GND
2
2
GND GND
VPA_PMU
50mil 1
VPA_PMU
D_GND
D_GND
D_GND
D_GND
C3234 C/ 470/ nF/ 0201/ X7R C0201
B34/39This path is no use for sky77824 This path is reserve
d for other vendor's M/H PA which support B34/B39 and TXM can't supports B34/B39 TXM reuse
D_GND
2
Thermistor/ To sense board level temperatureFar end Cap. For PMIC stabilityVIO18_PMU 1
BAUX_IN1_NTC RF PA TEMPERATURE 1 2
R3232 R/ 390K/ ohm/ 0201/ 1% R0201
B
NTC3201 close to PA, and located in the same layer2
NTC3201 NTC/ NTCG064EF104F/ 0201 R0201
D_GND
A
A
Title Size D Date:
32_RF_MT6169_RF_TX
MTK ConfidentialWednesday, January 14, 2015 Sheet 32 of 99
5
4
3
2
1
5
4
3
2
1[31] RF_DCS_PRX_MT6169_RFIP1_HB3[31] RF_DCS_PRX_MT6169_RFIN1_HB3[31] RF_B40B41_PRX_MT6169_RFIP1_HB1[31] RF_B40B41_PRX_MT6169_RFIN1_HB1
ASM_Main_824~2690MHzDCON3303 CON/ 4/ TA-RF02-001-03-811 COAXIAL/SMD/TA-RF02-001-03-811 4 3 1 2 D_GND CON3301 Car_Kit/ MM8130-2600 MM8130-2602 C3318 C/ 33/ pF/ 0201 4 C0201 1 2 RF_ant_TRX_ant_1 2 1 1 6 C3356 C/ 33/ pF/ 0201 C0201 1 2 1
SP10T
[31] RF_B34B39_PRX_MT6169_RFIP1_MB1[31] RF_B34B39_PRX_MT6169_RFIN1_MB1[31] RF_PCS_PRX_MT6169_RFIP1_MB2[31] RF_PCS_PRX_MT6169_RFIN1_MB2
DRF_TXDET RF_Ant_TRX_TXM C3357 C/ 22/ uF/ 0603 C0603 VBAT C3316 C/ 10/ pF/ 0201 C0201[31] RF_850_PRX_MT6169_RFIP1_LB3 C3314 C/ 1/ nF/ 0201 C0201 R3301 R/ 10K/ ohm/ 0201 R0201 APC1_TXM 1 11 2 10 9 8 7 6 1 5 4 3 2 1 C3354 1 1 39 C/ 4.7/ pF/ 0201 C0201 RF_MB1_TX_TXM RF_LB3_TX_TXM 2 C3340 C/ 10/ nF/ 0201 C0201 D_GND D_GND LTE_VMIPI 2[11] APC1 1 C3312 C/ 0201/ NC C0201 2 1 APC1 RF_MB1_TX_MT6169[31] R3377 R/ 24K/ ohm/ 0201 R0201 2 RF_LB3_TX_MT6169[31][31][31] RF_850_PRX_MT6169_RFIN1_LB3 1 1[31] RF_900_PRX_MT6169_RFIP1_LB2[31] RF_900_PRX_MT6169_RFIN1_LB2 L3351 L/ 0201/ NC L0201 2 2 1 2
4 3 1
2
3 1RF_Ant_TRX_carkit 5
RF_ant_TRX_ant
D_GND L3317 L3346 L/ 0201/ NC L/ 0201/ NC L0201 L0201 2 2 D_GND
D_GND U3307 SKY77910/HRTXAB008/RF5210 19 18 17 16 15 14 13 12
D_GND
D_GND RF_TXDET
D_GND D_GND D_GND
GND18
GND16
GND15
GND14
GND13
20 21 22 23 24 25 26 27 RF_2GHB_PRX_TXM RF_2GLB_PRX_TXM RF_B40B41_TRX_TXM_BYPASS 28 29 30
GND20 GND21 ANT GND23 NC24 NC25 NC26 NC27 TRX8 TRX7
GND12
NC19
CPL
GND11 VBAT VCC VRAMP VIO SDATA SCLK GND4 HB_IN LB_IN GND38 GND1
2
D_GND
D_GND MIPI1_SDATA MIPI1_SCLK 2 C3355 C/ 4.7/ pF/ 0201 C0201
MIPI1_SDATA MIPI1_SCLK
[11][11]
TRX6 NC36 NC37 TRX5 TRX4 TRX3 TRX2 TRX1
GND39
31
32
33
34
35
36
37
38
D_GND
D_GND
[32] RF_B40B41_TRX_TXM_BYPASS
CRF_B39_PRX_TXM RF_B34_PRX_TXM RF_B40_TRX_TXM RF_B34B39_PA_TXM RF_B41_TRX_TXM
D_GND R3304 R/ 0/ ohm/ 0201 R0201 1 2
MT6169 TX Ouput need a DC block(MUST).C3313 C/ 33/ pF/ 0201 C0201 RF_MB1_TX_MT6169 1 2
[32] RF_B40B41_PRX_FEM
C
[32] RF_B40_TRX_TXM[32] RF_B34B39_PA_TXM
RF_MB1_TX_1 1
D_GND R3318 R/ 12/ ohm/ 0201 R0201 1 2 1 C3315 C/ 33/ pF/ 0201 C0201 1 2
RF_LB3_TX_1 1
2
R3306 L/ 15/ nH/ 0201 R0201
2G_PAIN_HB
[32] RF_B41_TRX_TXM
RF_LB3_TX_MT6169
2
D_GND
D_GND C3303 C/ 8/ pF/ 0201 L0201 1 2 2
Pi attenuation for LB 8PSK TX in RX band noise2
2
R3328 R/ 440/ ohm/ 0201
R0201
R3327 R/ 440/ ohm/ 0201 R0201
2G_PAIN_LB
RF_DCS_PRX_MT6169_RFIP1_HB3
L3303 L/ 4.7/ nH/ 0201 L0201
L3302 L/ 0201/ NC L0201 1 RF_DCS_PRX_MT6169_RFIN1_HB3
1
1
L0201 L3340
L3332 C0201 C3342 1
L0201 D_GND 6 L3337 L/ 0201/ NC 9 RF_B34B39_PRX_SAW_RFIN1_MB1 L0201 U3305 DIPX/ SAWFD1G90BK0F0A SAWFILTER/SMD/SAWFD1G90BH0F0A D_GND 1 7 8 5 RF_B34B39_PRX_SAW_RFIP1_MB1 1
L3304 C/ 22/ pF/ 0201 L0201 RF_2GHB_PRX_TXM 1 2 C3341 C/ 3.3/ pF/ 0201 2 C0201 L3336 L/ 3/ nH/ 0201 L0201 RF_B34B39_PRX_MT6169_RFIP1_MB1 2 C3308 C/ 0201/ NC C0201
1
1
RF_2GHB_PRX_SAW C3309 L/ 3.3/ nH/ 0201 L0201
G G
2 10
B34&B39 PRXD_GND L/ 0201/ NC
1
D_GND D_GND
1
2
C3301 L0201 C/ 8/ pF/ 0201 RF_DCS_PRX_SAW_RFIN1_HB3 RF_DCS_PRX_SAW_RFIP1_HB3 2 RF_PCS_PRX_SAW_RFIP1_MB2 RF_PCS_PRX_SAW_RFIN1_MB2 C3302 C/ 12/ pF/ 0201 L0201 1 2
1
IN_1 DCS OUT_1 DCS OUT_2
6 7 8 9
L/ 10/ nH/ 0201 2 2 RF_B39_PRX_SAW RF_B34_PRX_SAW 1 4 LCH HCH
B
GND GND GND
2
2
RF_B39_PRX_TXM RF_B34_PRX_TXM
Bal_port1 Bal_port2
L3342 L/ 0201/ NC L0201 2
C/ 3.9/ pF/ 0201 C0201
GND GND GND
3 5
1
1
2
RF_B34B39_PRX_MT6169_RFIN1_MB1
G G
1
1
C/ 10/ pF/ 0201 C3343 1 2
D_GND
D_GND
PCS OUT_2
L3305 L/ 3.6/ nH/ 0201 L0201
2
4
G
PCS OUT_1
RF_PCS_PRX_MT6169_RFIN1_MB2 L3306 L/ 0201/ NC L0201 RF_PCS_PRX_MT6169_RFIP1_MB2
B
L3338 L/ 5.6/ nH/ 0201 L0201 2
1 C3344 C/ 3.3/ pF/ 0201 C0201 U3304 D_GND SAW/ SAWFD1G84CB0F0A SAWFILTER/10P/SMD/SAWFD1G84CB0F0A
2
2 3 10
C3358 C/ 12/ pF/ 0201 L0201
D_GND
D_GND
D_GND 2 RF_850_PRX_SAW_RFIP1_LB3
1
IN_1
850 OUT_1 850 OUT_2
2
2
U3323 BAL/ TDK-TFSZ06052460-3310A2 BALUN/SMD/TFSZ06052460-3310A2 C3352 C/ 3/ pF/ 0201 1 D_GND GND Diff2 C0201 1 2RF_B40B41_PRX_Balun 2 SE Diff1 L3344 L/ 0201/ NC L0201 L3350 L/ 6.8/ nH/ 0201 L0201
C3349 C/ 7/ pF/ 0201 C0201 1 2 RF_B40B41_PRX_MT6169_RFIP1_HB1 RF_B40B41_PRX_MT6169_RFIN1_HB1 1
7 8 9 RF_900_PRX_SAW_RFIP1_LB2 2
L3309 L/ 0201/ NC L0201 1
C3311 L/ 5.6/ nH/ 0201 C0201
4
G
900 OUT_1 900 OUT_2 G G
C3305 L/ 4.7/ nH/ 0201 L0201 C3306 L/ 3.9/ nH/ 0201 L0201 1 2
3 5
D_GND
D_GND
1
2 U3303 D_GND RF_900_PRX_SAW_RFIN1_LB2 SAW/ SAWFD881MCF0F0A SAWFILTER/10P/SMD/SAWFD881MCF0F0A
C3353 C/ 7/ pF/ 0201 C0201
L3310 L/ 10/ nH/ 0201 L0201 1 1 2
2
RF_B40B41_PRX_FEM
L3343 L3341 4 RF_B40B41_PRX_Balun_RFIP1_HB1 L/ 0201/ NC L/ 3/ nH/ 0201 L0201 L0201 3 RF_B40B41_PRX_Balun_RFIN1_HB1
1
RF_2GLB_PRX_TXM
RF_2GLB_PRX_SAW
G G
B40/B41 PRX
C3310 C/ 22/ pF/ 0201 C0201 2 1
L3307 L/ 18/ nH/ 0201 L0201 6 RF_850_PRX_SAW_RFIN1_LB3 1 2
2 10
2
C3304 L/ 4.7/ nH/ 0201 L0201 1 2 L3308 L/ 0201/ NC L0201
RF_850_PRX_MT6169_RFIP1_LB3
1
RF_850_PRX_MT6169_RFIN1_LB3
RF_900_PRX_MT6169_RFIP1_LB2
L3311 L/ 0201/ NC L0201 1 RF_900_PRX_MT6169_RFIN1_LB2
D_GND
D_GND
C3307 L/ 3.9/ nH/ 0201 L0201
A
A
Title Size D Date:
33_RF_MT6169_RF_PRX
MTK ConfidentialWednesday, January 14, 2015 Sheet 33 of 99
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4
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1
DRX ANT: 1880-2690MHzSP3T DRX Car KitD_GND CON3401 Car_Kit/ MM8130-2600 MM8130-2602 3 2 C3454 C/ 33/ pF/ 0201 C0201 1RF_Ant_DRX_carkit 1 2 3 5 L3441 L/ 47/ nH/ 0201 L0201 2 D_GND 1 RF_B41_DRX_switch RF_B39_DRX_switch
D4 DRX_Ant 2 6
U3402 RF1628
DD_GND
RF_Ant_DRX_switch 1
4 5
VC1
RF2
RF4
RF1 RF3 GND
GND VC2 VDD
9 8 7
1
C3435 C/ 100/ pF/ 0201 C0201
VTCXO2 2
D_GND D_GND RF_B40_DRX_switch D_GND BPI_BUS21 2 BPI_BUS22 2 VTCXO2 C3447 C/ 100/ pF/ 0201 C0201 R3414 R/ 0/ ohm/ 0201 1 2 1 C3483 is power capacitor of PMU. VTCXO_0_PMU C3483 C/ 1/ uF/ 0201 C0201
6
1
1
D_GND
C3439 D_GND C/ 100/ pF/ 0201 C0201 D_GND
For power VTCXO2 star connection[31] RF_B40_DRX_MT6169_RFIP2_HB3[31] RF_B40_DRX_MT6169_RFIN2_HB3[31] RF_B39_DRX_MT6169_RFIP2_MB1[31] RF_B39_DRX_MT6169_RFIN2_MB1[31] RF_B41_DRX_MT6169_RFIP2_HB2[31] RF_B41_DRX_MT6169_RFIN2_HB2
C
B40 DRXC3452 L/ 1.5/ nH/ 0201 C0201 1 2 RF_B40_DRX_SAW 1 U3422 SAW/ EPCOS_AG07D SAWFILTER/SMD/SAFFB1G90FB0F0A U3423 C3455 L/ 1.5/ nH/ 0201 3 1 D_GND G GND BAL C0201 RF_B40_DRX_BALUN_in 4 RF_B40_DRX_SAW_out 1 2 2 OUT UNBAL BAL L3443 L/ 12/ nH/ 0201 L0201 D_GND L3442 L/ 0201/ NC L0201 D_GND 5 C3453 C/ 6.2/ pF/ 0201 C0201 1 2 3RF_B40_DRX_Balun_RFIN2_HB3 L3438 L/ 3.6/ nH/ 0201 4RF_B40_DRX_Balun_RFIP2_HB3 L0201 1 BAL/ TDK-TFSZ06052460-3310A2 BALUN/SMD/TFSZ06052460-3310A2 2 RF_B40_DRX_MT6169_RFIP2_HB3 L3439 L/ 0201/ RF_B40_DRX_MT6169_RFIN2_HB3 NC L0201
B39 DRXU3407 SAW/ SAFFB1G90FB0F0A D_GND SAWFILTER/SMD/SAFFB1G90FB0F0A C3415 L/ 1.2/ nH/ 0201 C0201 OUT 1 2 RF_B39_DRX_SAW 1 IN OUT 2 G L3411 L/ 0201/ NC L0201 D_GND 5 D_GND G C3413 C/ 6.8/ pF/ 0201 C0201 RF_B39_DRX_SAW_RFIP2_MB1 1 2 RF_B39_DRX_MT6169_RFIP2_MB1 L3412 L3413 L/ 0201/ NC RF_B39_DRX_MT6169_RFIN2_MB1 L0201 L/ 3.6/ nH/ 0201 L0201 RF_B39_DRX_SAW_RFIN2_MB1 1 2 C3417 C/ 6.8/ pF/ 0201 C0201
2
C
4 3
G
RF_B39_DRX_switch
RF_B40_DRX_switch
[36]
DRX_Ant
IN 2
L3440 L/ 10/ nH/ 0201 L0201 D_GND
G
[11] BPI_BUS21[11] BPI_BUS22
C3451 C/ 6.2/ pF/ 0201 C0201
D_GND
B41B DRXU3421 SAW/ SAFFB2G60AA1F0A D_GND SAWFILTER/SMD/SAFFB1G90FB0F0A C3433 C/ 12/ pF/ 0201 C0201 1 2RF_B41_DRX_SAW_In C3434 C/ 10/ pF/ 0201 C0201 1 2 D_GND RF_B41_DRX_BALUN_in 2 1 2 C3401 C/ 5/ pF/ 0201 C0201 RF_B41_DRX_BALUN_RFIP2_HB2 1 2 U3403 GND BAL 3 4 L3401 L3403 L/ 0201/ NC L/ 2.4/ nH/ 0201 L0201 L0201 RF_B41_DRX_BALUN_RFIN2_HB2 RF_B41_DRX_MT6169_RFIN2_HB2 1 2 C3405 C/ 5/ pF/ 0201 C0201 RF_B41_DRX_MT6169_RFIP2_HB2
G
RF_B41_DRX_switch
1
OUT OUT
4 3
RF_B41_DRX_SAW_out
UNBAL BAL
IN G 5
B
L3430 L/ 4.7/ nH/ 0201 L0201 D_GND
L3429 L/ 3.9/ nH/ 0201 L0201 D_GND D_GND
L3437 L/ 0201/ NC L0201
BAL/ TDK-TFSZ06052460-3310A2 BALUN/SMD/TFSZ06052460-3310A2
B
D_GND
A
A
Title
Size A2 Date:
34_RF_MT6169_RF_DRX
MTK ConfidentialWednesday, January 14, 2015 Sheet 34 of 99
5
4
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2
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D
LTE Antenna
D
ANT3601 ANT/ 92138100010F CON3601 CON/ TA-RF02-001-03-8
11 COAXIAL/SMD/TA-RF02-001-03-811 4 3 1 2 R/ 0/ ohm/ 0402 4 3 1 2 R3603 1 2 1 1
ANT3602 ANT/ 92138100010F 1
ANT3603 ANT/ 92138100010F 1 1 Feed
Feed
1
Feed
D_GND 2 C3601 C/ 1/ pF/ 0402 C0402
L3601 L/ 0402/ NC L0402 2 2
L3603 L/ 15/ nH/ 0402 L0402 2
R3601 R/ 0/ ohm/ 0402
1
D_GND D_GND
D_GND
D_GND
C
C
[Optional] Please Note That: 1. MT6735 can support GPIO Switch for antenna design, and it is optional function. Please decide to use it or not by each project consideration. 2. Please modify matching topology or GPIO Switch components position for diffetent antenna concepts. 3. Please fine ANT design guideline for details.
RxD Antenna
B
B
ANT3604
ANT3605
ANT3606
ANT/ 92138100010F ANT/ 92138100010F ANT/ 92138100010F 1 1 1 R3622 R/ 0/ ohm/ 0402 2 2 D_GND 1 R3605 R/ 0/ ohm/ 0402 Feed
Feed
R3604[34] DRX_Ant 1 2
1
C3602 C/ 1/ pF/ 0402 C0402
L3602 L/ 0402/ NC L0402 2
D_GND
1
2
D_GND
D_GND
A
1
Feed
R/ 0/ ohm/ 0402
A
Title Size A2 Date:5 4 3 2
36_RF_AT
MTK ConfidentialWednesday, January 14, 20151
Sheet
36
of
99
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4
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D
D
SD CARD
VMCH_PMU
CON4001 CON/ 12/ TA-M017-012-07-811 MICROSD/8P/SMD/TA-M017-012-07-811 11 12 13 14 15 16 17 18 19
[12] MSDC1_DAT[3..0]
MSDC1_DAT2 MSDC1_DAT3 MSDC1_DAT0 MSDC1_DAT1
C
[51] MSDC_NFC_SWPIO[51] MSDC_NFC_VCCSWP
1 2 3 4 5 6 7 8 9 10
CD(Vss) DAT2 CD(Vdd) CD/DAT3 CMD VDD GND CLK GND VSS GND DAT0 GND DAT1 GND ANT1 GND ANT2 GND
EINT_SD
EINT_SD
[12]
C
2
[12][12]
MSDC1_CMD MSDC1_CLK
D_GND C4001 C/ 4.7/ uF/ 0402 C0402
D_GND
Based on your system level design, if better ESD performance is needed on your system.
1
Shielding connect to ground
D_GND
Note: 40-1
D_GND
D_GND
D_GND D_GND
Based on your system level design, if better ESD/desense performance is needed on your system.B B
Schematic design notice of"40_MEMORY_SD Card" page.Note 40-1: The total equivalent capacitance of MSDC ESD protection device and desense bypass CAP must be<=10pF. But for NFC app. equivalent capacitance of MSDC_NFC_SWPIO and MSDC_NFC_VCCSWP should<=0.5pF.
A
A
Title Size C Date:5 4 3 2
40_Memory SD Card
MTK ConfidentialWednesday, January 14, 20151
Sheet
40
of
99
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4
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Connect to APD
DQ[0..31] CA[0..9] CS0_N CS1_N CKE DQM0 DQM1 DQM2 DQM3 DQS0_C DQS1_C DQS2_C DQS3_C DQS0_T DQS1_T DQS2_T DQS3_T CLK0_T CLK0_C VREF_CA VREF_DQ MSDC0_RSTB MSDC0_CMD MSDC0_CLK MSDC0_DSL MSDC0_DAT0 MSDC0_DAT1 MSDC0_DAT2 MSDC0_DAT3 MSDC0_DAT4 MSDC0_DAT5 MSDC0_DAT6 MSDC0_DAT7
DQ[0..31] CA[0..9] CS0_N CS1_N CKE DQM0 DQM1 DQM2 DQM3 DQS0_C DQS1_C DQS2_C DQS3_C DQS0_T DQS1_T DQS2_T DQS3_T CLK0_T CLK0_C VREF_CA VREF_DQ MSDC0_RSTB MSDC0_CMD MSDC0_CLK MSDC0_DSL MSDC0_DAT0 MSDC0_DAT1 MSDC0_DAT2 MSDC0_DAT3 MSDC0_DAT4 MSDC0_DAT5 MSDC0_DAT6 MSDC0_DAT7R4103 1 R4104 1[13] DQ[0..31] DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 2 R/ 240/ ohm/ 0201
/ 1% 2 R/ 240/ ohm/ 0201/ 1% W11 V11 V10 V12 V9 U10 U11 U12 N12 N11 N10 M9 M12 M10 M11 L11 AB10 Y9 AB11 W8 Y10 AB12 AA11 W9 L9 J11 H12 K10 L8 H11 K9 H10 K6 J6[13] CA[0..9] CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 Y6 W6 V6 V5 V4 N5 M5 M6 L6 L5 U4102 LPDDR2+eMMC Samsung186 MCP FBGA186/P0.5/B0.27/12X16/SUMSUNG/2-IN-1 CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 ZQ0 ZQ1 VDD1 VDD1 VDD1 VDD1 VDD2 VDD2 VDD2 VDD2 VDD2 VDD2 VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDCA VDDCA VDDCA VCC VCC VCCQ VCCQm VDDI H9 J4 AA4 AB9 H8 K5 N4 R10 Y5 AB8 J10 J13 K8 L12 M13 P9 R9 T9 V13 W12 Y8 AA10 AA13 M4 P4 W5 D11 E5 E11 F5 R4107 1 2 R/ 0/ ohm/ 0201 D8 C4110 C/ 1/ uF/ 0201 C4111 C/ 4.7/ uF/ 0402 1 1
D
eMMC+LPDDR2162/186 Ball, 0.5mm pitch VDD1=1.8V VDD2=1.20V VDDCA=1.2V VDDQ= 1.20VVDD1: Core 1DVDD18_EMI
C4101 C/ 1/ uF/ 0402 C0402
C4102 C/ 100/ nF/ 0201 C0201 DVDD12_EMI
SH4101 VIO18_PMU 1 2 DVDD18_EMI
2
2
D_GND
D_GND
R/ 0/ ohm/ 0201/ NC
VDD2: Core 2C4105 C/ 100/ nF/ 0201 C4106 C/ 100/ nF/ 0201 C4107 C/ 100/ nF/ 0201 C4108 C/ 100/ nF/ 0201 C4103 C/ 2.2/ uF/ 0402 C4104 C/ 2.2/ uF/ 0402
Power
1
1
1
1
1
2
2
2
2
2
C
2
1
D_GND
D_GND
D_GND
D_GND
D_GND
D_GND
C
1. VCC: Core Voltage 2.7v~ 3.6v 2. VCCQ: IO Voltage 1.7v~1.95v (low voltage range)C0402 C0402 C0201 C0201 C0201 C0201 VEMC_3V3_PMU VIO18_PMU C4109 C/ 100/ nF/ 0201 2 1
Note: 41-1
C4112 C/ 220/ nF/ 0201
eMMC
RCLK CLKm RST CMD DAT7 DAT6 DAT5 DAT4 DAT3 DAT2 DAT1 DAT0
1
1
1
Power I/FVIO18_PMU VEMC_3V3_PMU DVDD12_EMI VIO18_PMU VEMC_3V3_PMU DVDD12_EMI
D_GND
J9 J12 K13 L13 M8 N13 R8 U13 V8 W13 Y13 AA9 AA12 W4 R4 L4 E12 H4 J5 J8 K4 P5 R11 Y4 AA5 AA8 F6 1 R4109 2 F9 R/ 0/ ohm/ 0201 A1 A3 A14 A16 B2 B15 C1 C16 D4 D5 D12 D13 E4 E13 H13 K2 K15 M2 M15 R2 R15 U2 U15 AB4 AB13 AC4 AC5 AC12 AC13 AD1 AD16 AE2 AE15 AF1 AF3 AF14 AF16
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSCA VSSCA VSSCA VSSm VSSm VSS VSS VSS VSS VSS VSS VSS VSS VSSQm VSSQm
E7 D7 D9 E9 D10 E10 E6 D6
MSDC0_DAT7 MSDC0_DAT6 MSDC0_DAT5 MSDC0_DAT4 MSDC0_DAT3 MSDC0_DAT2 MSDC0_DAT1 MSDC0_DAT0
[12][12][12][12][12][12][12][12]
2
2
2
2
CloseD_GND to MemoryD_GND C0201 C0201 C0402 C0201 C0402 C0201 D_GND D_GND D_GND
CS0# CS1# CKE0 CKE1 CLK CLK# DQS0 DQS0# DQS1 DQS1# DQS2 DQS2# DQS3 DQS3# DM0 DM1 DM2 DM3 VREFCA VREFDQ
U4 U5 T4 T5 R6 P6 U9 U8 N9 N8 Y11 Y12 K11 K12 T8 P8 W10 L10 N6 R12 C/ 1/ uF/ 0201
CS0_N CS1_N CKE CKE CLK0_T CLK0_C DQS0_T DQS0_C DQS1_T DQS1_C DQS2_T DQS2_C DQS3_T DQS3_C DQM0 DQM1 DQM2 DQM3
[13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13][13] EVREF EVREF[11][11]
The eMMC VCC/VCCQ/VDDI bypass cap recommand value, please refer to vendor datasheet or MT6735 Design Notice (eMMC power capacitor value reference)
LP-DDR2
B
2
1
F7 R4108 1 2 R/ 0/ ohm/ 0201 E8 F4 F8
MSDC0_DSL MSDC0_CLK MSDC0_RSTB MSDC0_CMD
[12][12][12][12]
C4114 C/ 100/ nF/ 0201
C4113 C/ 4.7/ uF/ 0402
1
B
D_GND
DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU DNU
NC NC NC NC NC NC NC NC NC NC NC NC NC NC
G4 G5 G6 G7 G8 G9 H5 H6 R5 T6 U6 AA6 AB5 AB6
2
C4115 C4116 C0201 C0201 D_GND D_GND
Schematic design notice of"41_Memory_eMMC_LPDDR2" page. Note 41-1: Please reserve R4107/ R4108/ R4109 for co-layout different eMMC+LPDDR2 Type eMMC Type MT6735+ eMMC 5.0 Device MT6735+ eMMC 4.5 Device R4107/ R4108/ R4109 Mount Remove Remark R4107/ R4108/ R4109 Check the eMMC 4.5 Device, if the F5/F7/F9 Ball are real NC, the resistor cam be mounted
A
2
C/ 100/ nF/ 0201
1
1
A
Title Size D Date:5 4 3 2
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GPS co-VCTCXO: Suggest to reserve this option circuit, since MTK will confirm if it’s ok to implement this near MT6735 MPReserve Keep out region from L1 to Main GND layer
[12] WB_CTRL0[12] WB_CTRL1[12][12] WB_CTRL2 WB_CTRL3
WB_CTRL0 WB_CTRL1 WB_CTRL2 WB_CTRL3 WB_CTRL4 WB_CTRL5 CONN_SCLK CONN_SDATA CONN_SEN CONN_RSTBD
[12] WB_CTRL4 R5001 CONN_XO_IND
R/ 0/ ohm/ 0201-3P(1-2) 1 3 CLK_WCN[31] D_GND
U5002 3 2 OUT GND VCC NC 4 1 VCN28_PMU
[12] WB_CTRL5[12][12][12] CONN_SCLK CONN_SDATA CONN_SEN CONN_RSTB
2
Close to Antenna
TCXO/ 26/ MHz/ IT2205AE 1
Same layer as Antenna, 50ohm trace reference to 3rd layer GND(2nd Layer clean)
C5001 C/ 1/ uF/ 0201
[12]
D_GND[12] GPS_RX_IP[12] GPS_RX_IN ANT5001 SPR/ PVT1024 ANT/2P/SMD/PVT1024 1 ANT5003 SPR/ PVT1024 ANT/2P/SMD/PVT1024 1 50 Ohm F5001 TRPX/ TDK TPX205950MT-7110A1 MB RF_WBT[12] GPS_RX_QP[12] GPS_RX_QN[12] F2W_CLK 7 50 Ohm 2 50 Ohm 2 3 COM GND HB GND F5001 C5004 1 2 50 Ohm D_GNDC
2
GPS_RX_IP GPS_RX_IN GPS_RX_QP GPS_RX_QN F2W_CLK F2W_DATA WB_RX_IP WB_RX_IN WB_RX_QP WB_RX_QN WB_TX_IP WB_TX_IN WB_TX_QP WB_TX_QNC
Feed
Feed
CON5001Car_Kit/ MM8430-2610 R5004 1 1 2 50 Ohm 1 4 6 5 2 3 1 R/ 0/ ohm/ 0402 R5005 D_GND
8
1
GND
GND
D_GND RF_WF_5G WB_CTRL4 WB_CTRL5 D_GND WB_AVDD18 GPS_RF_LNA D_GND C5002 C/ 100/ nF/ 0201 1 2 C0201 D_GND 1 2 C5005 C/ 100/ pF/ 0201 C0201 30 29 28 27 26 25 24 23 22 21 WB_RX_IN WB_CTRL0 WB_RX_IP WB_CTRL3 WB_CTRL2 WB_CTRL1
[12] F2W_DATA[12][12][12][12][12][12][12][12][12] WB_RX_IP WB_RX_IN WB_RX_QP WB_RX_QN WB_TX_IP WB_TX_IN WB_TX_QP WB_TX_QN CONN_XO_IN
6 5
C5003 C/ 0402/ NC
1
L5004 L/ 0402/ NC 2
R/ 0/ ohm/ 0201 R0201
D_GND
2
L/ nH/ 0201/ NC L5011 D_GND
L/ nH/ 0201/ NC L5012
D_GND
D_GND D_GND
4 C/ 18/ pF/ 0201
LB
CONN_XO_IN
ANT5002 SPR/ PVT1024 ANT/2P/SMD/PVT1024 1 U5001
NC
WB_CTRL5
WB_CTRL4
WB_CTRL3
WB_CTRL2
WB_CTRL1
WB_AVDD18
WB_CTRL0
Feed
FBAR/ ACPF-7124 R5014 RF_WBT 50 Ohm 1 2 4 OUT R/ 0/ ohm/ 0201 L/ nH
/ 0201/ NC L/ nH/ 0201/ NC R0201 L5008 L5007 U5005 1 IN C5016 1 L/ nH/ 0201/ NC L5006 R/ 0/ ohm/ 0201 50 Ohm WB_ANT 2 L/ nH/ 0201/ NC 32 VCN33_PMU D_GND 1 2 D_GND D_GND C5006 C/ 4.7/ uF/ 0402 D_GND R5016 1 1 2 C5007 C/ 100/ pF/ 0201 33 WB_AVDD33 NC 31
WB_RX_IN
WB_RX_IP
G G G
WB_RF_2G
WB_RX_QP
20
WB_RX_QP
FM_AVDD28 BEAD5001 FB/ BLM15AG601SN1
VCN28_PMU
5 3 2
L5005
WB_RX_QN
19
WB_RX_QN
D_GND D_GND
<Critical!!> 5G PCB loss is higher and Trace must kept short and 50-Ohm No layer transition RF_WF_5G
D_GND
D_GND
WB_TX_IP
18
WB_TX_IP
34
Close to MT66252 35 FM_AVDD28 36 C5008 1 2 C/ 10/ nF/ 0201 37
WIFI5G_RF
WB_TX_IN
17
WB_TX_IN
R/ 0/ ohm/ 0201 L/ nH/ 0201/ NC L/ nH/ 0201/ NC R0201 L5009 L5010
NC
U/ MT6625L/ QFN40
WB_TX_QP
16
WB_TX_QP
GPS_AVDD18 SH5001 1 2 SHORT/ 0402/ NC 2
AVDD28_FM
WB_TX_QN
15
WB_TX_QN
VCN18_PMU
B
D_GND[60] FM_RX_N_6625 1 L5002[60] FM_ANT 1 1 2 L/ 82/ nH/ 0402 R5013 R/ 0/ ohm/ 0201/ NC R0201 2 R5006 R/ 0/ ohm/ 0201/ NC R0201
D_GND D_GND
B
FM_LANT_N
GPS_RX_IP
14
GPS_RX_IP WB_AVDD18 1 SH5002 1 2 SHORT/ 0402/ NC D_GND
C5015 C/ 1/ uF/ 0201 C0201
38 50 Ohm GPS_ANT 39 GPS_AVDD18
FM_LANT_P
GPS_RX_IN
13
GPS_RX_IN
D_GND
GPS_RFIN
GPS_RX_QP
12
GPS_RX_QP
2
D_GND D_GND 1
F2W_CLK
FM_DBG
HRST_B
SDATA
Close to ANT
F2W_DATA
GPS xLNA
AVDD28_FSOURCE
AVDD18_GPS C5009 C/ 4.7/ nF/ 0201 2 41 DVSS C0201 D_GND
40
GPS_RX_QN
11
GPS_RX_QN
1
2
3
4
5
6
7
8
9
10
XO_IN
CEXT
SCLK
SEN
MT6625 IPD CONN_XO_IN
VCN28_PMU
D_GND CONN_RSTB C5012 C/ 1/ uF/ 0201 1 2 C0201 2 3 1 GPS_ANT 50 Ohm D_GND CONN_SCLK CONN_SDATA[12] CONN_SEN D_GND C0201 C0201 C/ 100/ pF/ 0201
D_GND 4 5
F2W_DATA F2W_CLK
A
L5003 50 Ohm G G G GPS_RF_LNA 1 IN OUT 4 1 1 2 1
D_GND
GNDRF AI PON
VCC AO GND
C/ 1/ uF/ 0201
matching value depends on LNA selected
A
1 C5013 2
D_GND D_GND D_GND
GPIO_GPS_LNA_EN
2 C5014
U5003 GNSS SAW/B8313
2 3 5
L/ 5.6/ nH/ 0402
6
2
2
C5011 C/ 0402/ NC
C5017 C/ 0402/ NC
U5004
U/ BGA725L6
1
Title Size C Date:5 4 3 2
Same layer as Antenna, 50ohm trace reference to 3rd layer GND(2nd Layer clean)
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ANT5101 ANT/ N124M1 PAD/1P/R2.2
ANT5102 ANT/ N124M1 PAD/1P/R2.2
1
R5101 R/ 0/ ohm/ 0402 R0402 2 2
1 R5102 R/ 0/ ohm/ 0402 R0402
D
2
2
ANT_N
ANT_P
C5104 C5105 C/ 4.7/ pF/ 0402/ NC C/ 4.7/ pF/ 0402/ NC C0402 C0402 1 2 1 2 C5106 C/ 39/ pF/ 0402 C0402 1 2 C5107 C/ 39/ pF/ 0402 C0402 1 2
2
2
C5101 C/ 39/ pF/ 0402 C0402
R5103 R/ 0/ ohm/ 0402 R0402
R5104 R/ 0/ ohm/ 0402 R0402
C5102 C/ 39/ pF/ 0402 C0402
C5101,C5102,C5104,C5105,C5106,C5107, C5108, C5109 need to use 2% accuracy and 50V tolerance capacitor PS: 0201 cap can't tolerance 50V
POWER MODE[1:0]=[NFC_RST:NFC_VENB]Power Mode NFC enable (configure, R/W, card, polling loop, polling loop card listening) N
FC disable (HPD) Hign battery card listening Reset NFC_RST 1 NFC_VENBD
1
1
1
1
0
0 1 0
1 1 0
1
2
1. R5128=R5129=10K if SWIO1/SWIO2 need support PBtF 2. R5128=R5129=NC if SWIO1/SWIO2 no need to support PBtFR5128 R/ 10/ K/ 0402/ NC R0402 2 1 R5129 R/ 10/ K/ 0402/ NC R0402 2 1 2
2
EBOM for Feature
C5108 D_GND C/ 18/ pF/ 0402 C0402
1
C5109 C/ 18/ pF/ 0402 C0402 MT6169_XO3_CLK
C5110 C/ 180/ pF/ 0402 C0402 1 2
C5111 C/ 180/ pF/ 0402 C0402 1 2
C5112 C/ 180/ pF/ 0402 C0402 1 2
Components in this region use 5% accuracy1
R5130/R5108 are close to each otherR5130 R/ 0/ ohm/ 0201 D_GND R0201 2 D_GND R5108 1 2
4
3 D_GND
D_GND
DVDD_EPMU1 1
R5105 R/ 7.5/ K/ 0402 R0402
D_GND L5101 L/ MLF1608DR56J L/IND/SMD/0603
L5102 L/ MLF1608DR56J L/IND/SMD/0603
1
2 X5101 X/ 27.12/ MHz/ FA-128/ NC CRYS/SMD/FA-128
RXIN_P
C
D_GND
DVDD_EPMU2
TX_N
TX_P
R/ 0/ ohm/ 0201/ NC R0201 RXIN_P ANT_N ANT_P NFC_RST D_GND 27 31 33
VSIM1_NFC VSIM1_PMU[65] SIM1_NFC_SWP1
SH5101 1 2 SHORT/ 0402/ NC SH5102 1 2 SHORT/ 0402/ NC SH5103 1 2 NC/MMD/L1/4MIL
U5101 U/ MT6605E3 MT6605/MQFN32/SMD/P0.4/4X4/S DVDD_SIM1 DVDD_EPMU1 NFC_SWP1
SYSRST_B (NFC_RST) 1.Input pin 2.Internal pull high 3.Low active OSC_EN (NFC_OSC_EN) 1.NFC_OSC_EN is output pin, and high active. 2.Need to connect to host SRCLKENAI and SRCLKENAI pin need to be default low.
C
25
23
18
17
TX_N
TX_P
24
26
Close
SH5104 1 2 SHORT/ 0402/ NC SH5105 1 2 VSIM2_PMU SHORT/ 0402/ NC SH5106 1 2[65] SIM2_NFC_SWP2 NC/MMD/L1/4MIL VSIM2_NFC SH5107 1 2 NC/MMD/L1/4MIL SH5108 1 2 NC/MMD/L1/4MIL
DVDD_SIM2 DVDD_EPMU2 NFC_SWP2
Close
ENB (NFC_VEN) 1.Input pin 2.Internal pull low 3.Low active 4.If default NFC would like to disable, please configure to high C5116 close to pin19 EBOM for Feature
VBAT_NFC
D_GND
C5115 C/ 2.2/ uF/ 0402 C0402 1 2
MAIN_GND
RXIN_N
RXIN_P
ANT_N
ANT_P
TX_N
TX_P
SYSRST_B
CLK_IN
20
VBAT
Test_Mode/GPIO1/OSC_EN/JTAG_TDO
32
NFC_OSC_EN
NFC_VENB C0201 C5116 C/ 1/ uF/ 0201 1 2 C5117 C0402 C/ 10/ uF/ 0402 1 2 C5119 C0402 C/ 470/ nF/ 0402 1 2 C5120 1
21
ENB
D_GND
19
AVDD_PA
[40] MSDC_NFC_VCCSWP[40] MSDC_NFC_SWPIO
NFC_VCCSWP NFC_SWPIO
D_GND
22
AVDD
B
C5117= 10uF is necessary for PBtF DVDD28 (VRTC_NFC) Coin battery or gold cap is necessary if PBtF card mode is supported
D_GND
29
DVDD12
C0201 2 28 DVDD18
MT6605 QFN32 4x4DVDD_EPMU1 DVDD_EPMU2 SWIO1/GPIO6 DVDD_SIM1 DVDD_SE SWIO_SE
UART_TXD/I2C_DAT/SPI_CS
2
NFC_I2C_SDA
1. MT6605 I2C address is 0x28 2. MT6605 can support SW I2C and only HW I2C is allowed R5116 NC: XTAL MODE R5116 10K: Co-Clock (default)DVDD_IO_NFC
UART_RXD/I2C_CK/SPI_CK
1
NFC_I2C_SCL R5116 R0402 R/ 10/ K/ 0402 1
SPI_MISO/GPIO2/JTAG_TMS/DBG_TXD
4
2
SPI_MOSI/GPIO3/JTAG_TCK/DBG_RXD
5
1
TP5102 TP/SMD/12MIL TP/ 30/ mil NFC_IRQ
D_GND
IRQ/GPIO4
6
C/ 100/ nF/ 0201 SH5109 1 2 SHORT/ 0402/ NC SH5110 1 2 SHORT/ 0402/ NC SH5111 1 2 SHORT/ 0402/ NC VRTC_NFC C0201 C
5121 C/ 100/ nF/ 0201 1 2 30 DVDD28 EINT/GPIO5/JTAG_TDI 7 NFC_EINT
IRQ (NFC_IRQ) 1. IRQ is output pin and high active 2. IRQ is also a NFC strap pin 3. Host EINT connected with IRQ must be default low EINT (NFC_EINT) 1. Input pin 2. Internal pull low 3. High active
B
VIO18_PMU
DVDD_IO_NFC VRTC_NFC VBAT_NFC
DVDD_SIM2
VRTC VBAT
D_GND
3
DVDD_IO
GPIO0/JTAG_TRST SWIO2
8
1
TP5101 TP/SMD/12MIL TP/ 30/ mil
DVDD_IO_NFC
10
9
14
15
16
11
12
DVDD_EPMU1
DVDD_SIM1
NFC_SWP1
13 NFC_SWP2 DVDD_SIM2 1 C5126 C/ 470/ nF/ 0402 C0402
[12]
EINT_NFC
[12] GPIO_NFC_IRQ
[12] GPIO_NFC_RSTB[12] GPIO_NFC_ENB
SH5112 1 2 NC/MMD/L1/4MIL SH5113 NFC - IRQ 1 2 NC/MMD/L1/4MIL SH5114 NFC - nRST 1 2 NC/MMD/L1/4MIL SH5115 NFC - VENB/ UART-CTS1 1 2 NC/MMD/L1/4MIL NFC - EINT
NFC_VCCSWP NFC_EINT NFC_IRQ NFC_RST NFC_VENB
1. Current reference design can't support external SE 2. For PBtF and external SE support, please refer to MT6605 Schematic and Layout Review Notice1 2
NFC_SWPIO
2
2
C5122 C/ 470/ nF/ 0402 C0402
C5123 C/ 1/ uF/ 0201 C0201
C0402 C/ 470/ nF/ 0402 C5124
D_GND DVDD_EPMU2 1
D_GND MT6169_XO3_CLK
D_GND
D_GND
A
[31] MT6169_XO3_CLK SH5116 1 2 NC/MMD/L1/4MIL SH5117 1 2 NC/MMD/L1/4MIL SH5118 1 2 NC/MMD/L1/4MIL
T-Card
SIM1
SIM2D_GND 2
C5125 C/ 1/ uF/ 0201 C0201
Reserve test points or 0ohm of below signals for NFC debug 1. SWIO1 (must) 2. Debug_RXD (must) 3. GPIO0 (must) 4. IRQ (must) 5. EINT (must) 6. I2C_DAT (must) 7. I2C_CK (must) 8. Debug_TXD (optional)A
1
[12] SRCLKENAI
SRCLKENAI
NFC_OSC_EN
NFC_OSC_EN
[12,23,63]
SCL2
NFC_I2C_SCL
1
2
Title[12,23,63] SDA2 NFC_I2C_SDA Size C Date:5 4 3 2
51_CONNECTIVITY_NFC_MT6605
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Earphone Audio SpeakerD
D_GND 1 C6023 C/ 33/ pF/ 0201/ NC C0201
D_GND
Based on your system level design, if better Audio performance is needed on your system, please add 32ohm to audio path for performance enhance proposal ( 32ohm condition pop noise can improve 6dB )2 1 SPK6001 SPK/ DMSP1115KJ-10-F1-G SPEAKER/SMD/2403-260-00071
[20]
ACCDET
2
R6008 R/ 47/ K/ 0402 R0402 1
VIO18_PMU 1 R6002 R/ 470/ K/ 0402/ NC R0402 2 D_GND CON6001 Pole3_J 2 5 MIC+ NCD
close to IC[12] BEAD6002 FB/ BLM18BD182SN1/ 0603 BEAD0603
close to connectorEINT_EAR EINT_EAR
R6005 R/ 47/ K/ 0402/ NC R0402 2 1
(1) CTIA: L-R-G-M (2) OMTP: L-R-M-G
[20]
AU_SPK1P
2
HP_MIC
[20]
AU_HPL
HP_MP3L
BEAD6001 FB/ BLM18BD182SN1/ 0603 BEAD0603 BEAD6003 FB/ BLM18BD182SN1/ 0603 BEAD0603 BEAD6005 FB/ BLM18BD182SN1/ 0603 BEAD0603
[20]
AU_SPK1N 1 C6024 C/ 33/ pF/ 0201/ NC C0201[20] AU_HPR BEAD6004 FB/ BLM18BD182SN1/ 0603 BEAD0603
HP_MP3R R6006 R6007
4 BEAD6006 FB/ BLM18BD182SN1/ 0603 BEAD0603 3 1
SPKL SPKR GND CON/ 5/ EJ-3699M-GP
Based on your system level design, if better desense performance is needed on your system.
2
2
D_GND D_GND
Based on your system level design, if better ESD pe
rformance is needed on your system.
2
1
C6007 C/ 33/ pF/ 0201 C0201
1
BEAD6002/ BEAD6004 are for FM-desense tuning proposal
C6008 C/ 33/ pF/ 0201 C0201
[20]
Pole4_J
1
1
GND shieldingSH6005 NC/R 2 2 R/ 470/ ohm/ 0201 R/ 470/ ohm/ 0201
1
C<= 1pFESD6006 ESD/ ESD5311NKM ESD/SMD/ESD5311N 1 2 D_GND
Note: 60-1 Note: 60-3
D_GND
Note: 60-1
Based on your system level design, if better ESD performance is needed on your system.
Single via to GND plane
2
Note: 60-22 L6002 L/ LQW18ANR10G00 BEAD0603 FM_ANT FM_RX_N_6625[50][50]
Handset Microphone 2Analog MICMICBIAS0C
Earphone MICPHONEMICBIAS1
1 1
D_GND D_GND
D_GND
2
MIC6002 Close MIC/ SPU0410HR5H-PB FILTER/SMD/SPU0410HR5H-PB 1 VDD OUT 4
to MIC Close to BB
close to MT63282 AU_VIN2_P 2 C6013 C/ 100/ pF/ 0201 C0201 AU_VIN2_N C6015 C/ 33/ pF/ 0201 C0201 1 1[20][20] 2 R6011 R/ 2.5/ K/ 0201/ NC R0201 1 R6013 R/ 1/ K/ 0201/ NC R0201 1 D_GND
R6012 R/ 0/ ohm/ 0402 R0402
C
2
C6012 C/ 100/ nF/ 0201 C0201
1
Close to BB
Close to MIC
Close to CON6001Earphone Detection CircuitNC/R SH6007 1 2
2
GND
GND
3
1
ModeD_GND
[20]
AU_VIN1_N C6019 C/ 33/ pF/ 0201 C0201 1
Low Cost Mode Traditional Mode (ACC)
R6002 NC 470K
R6005 NC 47K
R6008 47K NC
R6030 NC 0R
2
2
2
2
C6016 C/ 33/ pF/ 0201 C0201
1
Reserved for ACC mode
C6020 C/ 100/ pF/ 0201 C0201
Reserved to enhance TDD performanceR6014 R/ 1.5/ K/ 0201/ NC R0201
1
D_GND
2
SH6003 NC/R
D_GND 1 1 C6021 C/ 33/ pF/ 0201 C0201
2
Note: 60-1D_GND D_GND D_GND[20] AU_VIN1_P
2
tie together and single via to GND planeHP_MIC
together then single via to main GND
Based on your system level design, if better audio performance is needed on your system, please reserve for ACC mode[20]
Reserved for ACC modeACCDET R6030 1 2 R/ 0/ ohm/ 0201/ NC R0201
Handset Microphone 1Analog MICB
R6013/ R6014/ R6030: Based on your system level design, if better audio performance is needed on your system, please reserve for ACC mode
MICBIAS0
MIC6003 Close MIC/ SPU0410HR5H-PB FILTER/SMD/SPU0410HR5H-PB 1 VDD OUT 4
to MIC Close to BBAU_VIN0_P 2 C6034 C/ 100/ pF/ 0201 C0201 AU_VIN0_N C6039 C/ 33/ pF/ 0201 C0201 1 1[20][20]
ReceiverB
2
C6038 C/ 100/ nF/ 0201 C0201
1
1
close to IC
close to connector
2
GND
GND
3
2
2
C6035 C/ 33/ pF/ 0201 C0201
1
Reserved for ACC mode
[20]
AU_HSN
6mil 2 C6025 C/ 100/ pF/ 0201 C0201
6mil
REC6001 REC/ 2403 260 00031/ NC RECEIVE/SMD/NXP 2 1
D_GND
2
SH6004 NC/R
Note: 60-1D_GND D_GND D_GND
[20]
AU_HSP
6mil
1
6mil
together then single via to main GND
1
2
2
C6032 C/ 33/ pF/ 0201 C0201
1
C6031 C/ 33/ pF/ 0201 C0201
Note: 60-1
Schematic design notice of"60_PERI_AUDIO_IO" page.A
D_GND
D_GND
Based on your system level design, if better ESD performance is needed on your system.A
Note 60-1: The equivalent capacitance of audio and speech ESD protection device must be<=330pF. choose
bi-directional device only Note 60-2: The equivalent capacitance of FM ANT. ESD protection device must be<=1pF. Note 60-3: TVS Stand off voltage for speaker should>=5VTitle Size C Date:5 4 3 2
60_PERI_AUDIO_IO
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