计算机电路基础期末测试(英文版)
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样卷
一、选择题 (共30题,每题1 分, 共30分) 1. The binary number 10011001 is equal to the decimal number . (a) 220 (b) 153 (c) 156 (d) 255 2. The sum of 1100+1011 equals . (a) 101001 (b) 101010 3. An example of a state storage device is . (a) The flip-flop (b) the comparator (c) the register (d) both answers (a) and (c)
4. The reset state of a D latch occurs when . (a) D=0 (b) D=1 (c) D=0 or 1 (d) D=0 and 1 5. The octal number 24 is equal to the decimal number . (a)18 (b) 20 (c) 22 (d) 34 6. The decimal number 16 is equal to the binary number .
(a)10010 (b) 11000 (c) 10000 (d) 01001 7. The BCD number for decimal 35 is . (a) 011100110 (b)11000011 (c)00110101 (d) 001000011 8. The output expression for an AND-OR circuit having one AND gate with inputs A, B ,C and one AND gate with inputs C, D is . (a) BCDE (b) AB + CD (c) ABC + CD (d) (B + C)(D+E)
(c) 10111
(d) 101000
9. The basic logic gates not include . (a) AND gate (b) OR gate (c) NAND gate (d) NOT gate 10. An example of a canonical SOP expression is . (a) ABC?ABC? ABC (b) ABC + ACD (c)AC?ABCD? ABC (d) CD + AB + A 11. The result of 1100-0111 equals . 12. The expression ABCD + ABCD . (a) cannot be simplified (b) can be simplified to BCD+ ABC (c) can be simplified to ABC (d) None of these answers is correct. 13. All Boolean expressions can be implemented with . (a) NAND gates only (b) NOR gates only (c) all of these (d) combinations of AND gates, OR gates, and inverters 14. A half-adder is characterized by . (a) three inputs and two outputs (b) two inputs and two outputs (c) two inputs and three outputs (d) two inputs and one output 15. According to DeMorgan's theorems, the following equalities are correct: . (a) 001 (b) 0111 (c) 101 (d) 100
(a) ABC?A?B?C (b) AB?A?B (c) A?B?C?ABC (d) all of these 16. A logic circuit with an output X = ABC + AC+ABC consists of . (a) two AND gates and one OR gate (b) three AND gates, one OR gate, and three inverters (c) three OR gates, one AND gate, and three inverters (d) two AND gates, one OR gate, and one inverter 17. An exclusive-NOR function is expressed as . (a) A B?AB (b) AB?AB (c) (A+A)(B+B) (d) AB?A?B 18. According to the distributive law, the following equality is correct . (a) A(D + C) = AB + AC (b) A+BC =(A+B)(A+C ) (c) A+ C= C+A (d) A + AB = A 19. Eight states are required, how much state variable are needed .
(a) two state variables (b)three state variables (c) four state variables (d) one state variables
20. According to the commutative law, the following equality is correct . (a) A(B + C) = AB + AC (b) A(BC) =ABC (c) A+B= B+A (d) A + AB = A
21. The Boolean expression A+B+C+D is .
(a) a sum term (b) a product term (c) a literal term (d) a sum of product term 22. The output of JK flip-flop is set to 1 when . (a) J=1,K=0 (b) J=1,K=1 (c) J=0,K=0 (d) J=0,K=1 23. A 4-variable Karnaugh map has . (a) thirty-two cells (b) sixteen cells (c) sixty-four cells (d) eight 24. The inputs to a full-adder are A =1, B = 1 and Cin= 1. The outputs are . (a)Sum= 1, Cout =1 (b)Sum = 1, Cout = 0 (c) Sum = 0, Cout =1 (d) Sum = 0, Cout = 0
25. The complement of a variable is always . (a) 0 (b) 1 (c) equal to the variable (d) the inverse of the variable
26. The output of an AND gate with input A , B, and C is a 1 (High) when .
(a) A=0,B=0 ,C=0 (b) A=0,B=1,C=0 (c) A=0,B=0 ,C=1 (d) A=1,B=1 ,C=1 27. A?A B= .
(a) B (b) A?A (c) A B (d) A? B 28. In general, a multiplexer has .
(a) one data input, several data outputs, and select inputs (b) one data input, one data output, and one select input (c) several data inputs, one data output, and select inputs (d) several data inputs, several data outputs, and select inputs
29. The term bit means . (a) a small amount of data (b) a 1 or a 0 (c) binary digit (d) both answers
(b) and (c) 30. The Boolean expression 0+ A equals . (a) A (b) 0 (c) 1 (d) A 二、计算题 ( 共 5 题,每题4分, 共20分) 1. Convert each binary number to decimal. (a) 111001.01 (b) 10001011.11
2. Convert each hexadecimal number to binary: (a) F9 (b) AB8
3. Expand the following expressions into canonical SOP form. (a) ABC+ABD+ABC +CD (b) (A+B+C)(A+C)
4. Use a Karnaugh map to find the minimum SOP form for each expression. (a) CD+ABCD+ABCD+CD+ABCD (b) ABC+BC+ABCD+ABCD 5. Write the truth table and draw the state diagram of D flip-flop.
三逻辑分析设计题 (共 5 题, 每题 10 分, 共50分) 1. The output of a logic circuit is a 1 only when any of the following patterns is present at its three inputs: 011,101,110,111. Draw the truth table of the output function. Obtain the minimal Boolean expression and develop a logic circuit using OR gate and AND gate to generate the output signal. Assume the complements of variables are available.
2.1) Write the output expression for each circuit in figure as following, 2) Implement the logic circuits using only NAND gates.
3. The circuit show in figure as following. Write the flip-flop input functions and the next state functions. Draw the Q1,Q2 output diagram of JK flip-flops. The flip-flops are initially RESET.
4. 设计一个8421BCD码的检码电路。要求当输入量ABCD≤4,或≥8时,电路输出L为高电平,否则为低电平。用8选1数据选择器(CT74l51)实现。
5. 运用清零法,用74LS161(异步清零)及与非门组成N=11 的计数器,其中CR为清零端(低电平有效),LD为置数端(低电平有效),QA QB QC QD为四位输出端(QA为高位)。 分析过程,画出电路图。
答案
一、选择题:(将答案填入下表,本题共30题,每题1 分, 共30分) 试题 答案 试题 答案 1 b 16 b 2 c 17 a 3 d 18 b 4 a 19 b 5 b 20 c 6 c 21 a 7 c 22 a 8 c 23 b 9 c 24 a 10 a 25 d 11 c 26 d 12 c 27 d 13 c 28 c 14 b 29 d 15 d 30 d 二、计算题:( 共 5 题,每题4分, 共20分) 1. Convert each binary number to decimal.
(a) 57.25 (b) 139.75
2. Convert each hexadecimal number to binary:
(a) 11111001 (b)101010111000
3. Expand the following expressions into canonical form.
(a) ABCD?ABCD?ABCD?ABCD?ABCD?ABCD?ABCD----(2分) (b) A BC+ ABC + ABC+A BC+ABC----(2分)
4. Use a Karnaugh map to find the minimum SOP form for each expression. (a) (b)
-(2分)
AB?BC?ABD?ABD-(2分)
5. The diagram:------(4分)
3.
D 0 1 Qn+1 0 1 ----(2分) ----(2分) 三、逻辑分析设计题: (共5题, 每题10分, 共50分)
1. 1)The truth table:
或卡诺图 2)The output expression: ------(4分) X?ABC?ABC?ABC?ABC---(3分) ?AB?BC?AC3 )The circuit:
2. 1) The output expression:
------(3分) X?AB?ACD?ABCD ------(4分)
2)The circuit using only NAND gates: X?AB?ACD?AB?ACD 或X?AB?ACD?ABCD?AB?ACD?ABCD------(3分)
------(3分)
3. The flip-flop input functions are: 分).
J0?K0?1J1?K1?Q1,
Q1n?1?Q1Q2n?1?Q1?Q2----(4
------(4分)
4. 1)根据题意列出真值表为: ------(2分)
2)由真值表可得到输出逻辑函数表达式为:
L(D3D2D1D0)??m(0,1,2,3,4,8,9)??d(10,11,12,13,14,15)------(2分)
3)卡诺图 ------(4分)
------(2分)
5. 1)分析过程 ------(6分)
有效状态为0000—1010 ,74LS161为异步清零,所以应该用1011清零。 CR=QA QB QD 2)画图--------(4分)
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