Architectural Considerations in a Self-Timed Processor Design

Department of Computer Science University of Utah Salt Lake City, UT 84112 USA

Abstract

Architectural Considerations in a

Self-Timed Processor Design

William F. Richardson

CSTD-96-001

February 12, 1996

There are fundamental differences in the structure of asynchronous and synchro-nous processors, and the problems of each approach require innovative solutions. This work explores some of the ways in which the structure of a specific design is affected by an asynchronous paradigm. The Fred architecture presented here is an example of such a design approach. The self-timed design philosophy directly results in a powerful and flexible architecture which exhibits significant savings in design effort and circuit complexity. Some of the architectural constraints discovered in the course of the re-search have simple yet unconventional solutions, which in turn provide additional ben-efits beyond their immediate application. Further, when an asynchronous philosophy is incorporated at every stage of the design, the microarchitecture is more closely linked to the basic structures of the self-timed circuits themselves, and the resulting processor is quite surprising in its simplicity and elegance.

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