WF2M32I-150HI5中文资料

元器件交易网

2Mx32 5V Flash Module

FEATURES

WF2M32-XXX5

Access Time of 90, 120, 150ns

66 pin, PGA Type, 1.185" square, Hermetic Ceramic HIP (Package 401). 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880") square (Package 510) 3.56mm (0.140") height. Designed to t JEDEC 68 lead 0.990" CQFJ footprint (FIGURE 3)

Organized as 2Mx32

Commercial, Industrial, and MilitaryTemperature Ranges

5 Volt Read and Write. 5V ± 10% Supply.

Data# Polling and Toggle Bit feature for detection of program or erase cycle completion.

Supports reading or programming data to a sector not being erased.

RESET# pin resets internal state machine to the read mode.

Built in Decoupling Caps and Multiple Ground Pins for Low Noise Operation, Separate Power and Ground Planes to improve noise immunity

Packaging:

Low Power CMOS

Sector Architecture

32 equal size sectors of 64KBytes per each 2Mx8

chip Any combination of sectors can be erased. Also supports full chip erase.

Minimum 100,000 Write/Erase Cycles Minimum

* This product is subject to change without notice.

Note: For programming information refer to Flash Programming 16M5 Application Note.

FIGURE 1 – PIN CONFIGURATION FOR WF2M32-XHX5

元器件交易网

WF2M32-XXX5

FIGURE 2 – PIN CONFIGURATION FOR WF2M32-XG2UX5

元器件交易网

ABSOLUTE MAXIMUM RATINGS

Parameter

Voltage on Any Pin Relative to VSS Power DissipationStorage TemperatureShort Circuit Output CurrentEndurance – Write/Erase Cycles (Extended Temp)Data Retention

SymbolVT PTTstgIOS

Ratings-2.0 to +7.0

8-65 to +125100100,000 min

20

UnitVW°CmAcyclesyears

WF2M32-XXX5

CAPACITANCE

TA = +25°C, f = 1.0MHz

Parameter

OE# capacitance WE1-4# capacitance HIP (PGA) IP (Alternate pinout) CQFP G4T CQFP G2U

G2U (Alternate pinout)CS1-4# capacitance Data I/O capacitanceAddress input capacitance

SymbolCOECWECWECWECWECWECCSCI/OCAD

Max5020505020502020 50

UnitpFpFpFpFpFpFpFpFpF

This parameter is guaranteed by design but not tested.

RECOMMENDED DC OPERATING CONDITIONS

ParameterSupply VoltageGroundInput High VoltageInput Low VoltageOperating Temperature (Mil.)Operating Temperature (Ind.)

SymbolMinVCCVSSVIHVILTATA

4.502.0-0.5-55-40

Typ5.00----Max5.50VCC + 0.5+0.8+125+85

UnitVVVV°C°C

DC CHARACTERISTICS – CMOS COMPATIBLE

VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C

Parameter

Input Leakage CurrentOutput Leakage Current

VCC Active Current for Read (1)

VCC Active Current for Program or Erase (2) VCC Standby Current Output Low VoltageOutput High Voltage

Low VCC Lock-Out Voltage

SymbolILIILOx32ICC1ICC2ICC3VOLVOHVLKO

Conditions

VCC = 5.5, VIN = GND to VCCVCC = 5.5, VIN = GND to VCCCS# = VIL, OE# = VIH, f = 5MHzCS# = VIL, OE# = VIH

VCC = 5.5, CS# = VIH, f = 5MHz, RESET# = VCC ± 0.3VIOL = 12.0 mA, VCC = 4.5IOH = -2.5 mA, VCC = 4.5

Min

Max10101602408.00.454.2

UnitµAµAmAmAmAVVV

0.85xVCC

3.2

NOTES:1. The ICC current listed includes both the DC operating current and the frequency

dependent component (@ 5MHz). The frequency component typically is less than 2mA/MHz, with OE# at VIH.

2. ICC active while Embedded Algorithm (program or erase) is in progress.3. DC test conditions VIL = 0.3V, VIH = VCC - 0.3V

元器件交易网

VCC = 5.0V, -55°C ≤ TA ≤ +125°C

Parameter

Write Cycle Time

Chip Select Setup TimeWrite Enable Pulse WidthAddress Setup TimeData Setup TimeData Hold TimeAddress Hold Time

Write Enable Pulse Width High

Duration of Byte Programming Operation (1)Sector Erase (2)

Read Recovery Time before WriteVCC Setup Time

Chip Programming TimeChip Erase Time (3)

Output Enable Hold Time (4) RESET# Pulse Width (5)

SymboltAVAVtELWLtWLWHtAVWLtDVWHtWHDXtWLAXtWHWLtWHWH1tWHWH2tGHWLtVCS

tWCtCStWPtAStDStDHtAHtWPH

Min9004504504520

-90

Max

Min12005005005020

-120

Max

WF2M32-XXX5

AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS - WE# CONTROLLED

Min15005005005020

-150

Max

Unitnsnsnsnsnsnsnsnsµssecµsµssecsecnsns

30015

050

44256

tOEHtRP

10500

10500050

30015

050

44256

10500

30015

44256

NOTES:

1. Typical value for tWHWH1 is 7µs.2. Typical value for tWHWH2 is 1sec.

3. Typical value for Chip Erase Time is 32sec.4. For Toggle and Data Polling.

5. RESET# internally tied to VCC for the default pin con guration in the HIP package.

AC CHARACTERISTICS – READ-ONLY OPERATIONS

VCC = 5.0V, -55°C ≤ TA ≤ +125°C

Parameter

Read Cycle TimeAddress Access TimeChip Select Access TimeOutput Enable to Output Valid

Chip Select High to Output High Z (1)Output Enable High to Output High Z (1)Output Hold from Addresses, CS# or OE# Change, whichever is FirstRST Low to Read Mode (1,2)

SymboltAVAVtAVQVtELQVtGLQVtEHQZtGHQZtAXQX

tRCtACCtCEtOEtDFtDFtOHtReady

Min90

-90

Max9090402020

20

20

Min120

-120

Max120120503030

20

Min150

-150

Max150150553535

Unitnsnsnsnsnsnsnsµs

NOTES:

1. Guaranteed by design, not tested.

2. RESET# internally tied to VCC for the default pin con guration in the HIP package.

元器件交易网

VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C

Parameter

Write Cycle Time

Write Enable Setup TimeChip Select Pulse WidthAddress Setup TimeData Setup TimeData Hold TimeAddress Hold Time

Chip Select Pulse Width High

Duration of Byte Programming Operation (1)Sector Erase Time (2)Read Recovery TimeChip Programming TimeChip Erase Time (3)

Output Enable Hold Time (4)

NOTES:

1. Typical value for tWHWH1 is 7µs.2. Typical value for tWHWH2 is 1sec.

3. Typical value for Chip Erase Time is 32sec.4. For Toggle and Data Polling.

WF2M32-XXX5

AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED

SymboltAVAVtWLELtELEHtAVELtDVEHtEHDXtELAXtEHELtWHWH1tWHWH2tGHEL

tWCtWStCPtAStDStDHtAHtCPH

-90-120MinMaxMinMax901200045500045500

045503003001515

00

4444256256

1010

Min

15005005005020

-150

Max

Unitnsnsnsnsnsnsnsnsµssecµssecsecns

30015

44256

10

tOEH

FIGURE 3 – AC TEST CIRCUIT

FIGURE 4 – RESET TIMING DIAGRAM

元器件交易网

WF2M32-XXX5

FIGURE 5 – AC WAVEFORMS FOR READ OPERATIONS

元器件交易网

WF2M32-XXX5

FIGURE 6 – WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED

元器件交易网

WF2M32-XXX5

FIGURE 7 – AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS

元器件交易网

WF2M32-XXX5

FIGURE 8 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM

OPERATIONS

元器件交易网

WF2M32-XXX5

FIGURE 9 – ALTERNATE CS# CONTROLLED PROGRAMMING OPERATION TIMINGS

元器件交易网

WF2M32-XXX5

FIGURE 10 – ALTERNATE PIN CONFIGURATION FOR WF2M32I-XHX5

FIGURE 11 – ALTERNATE PIN CONFIGURATION FOR WF2M32U-XG2UX5

元器件交易网

WF2M32-XXX5

FIGURE 12 – PIN CONFIGURATION FOR WF2M32I-XG2UX5

元器件交易网

WF2M32-XXX5

PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H)

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

元器件交易网

WF2M32-XXX5

PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

元器件交易网

I

I

N

WF2M32-XXX5

ORDERING INFORMATION

W F 2M32 X - XXX X X 5 X

LEAD FINISH:

Blank = Gold plated leadsA = Solder dip leads

VPP PROGRAMMING VOLTAGE 5 = 5 V

GRADE:

= Compliant +125°C= Military +125°C I = Industrial -40°C to +85°C= Commercial +70°C PACKAGE TYPE: H = Ceramic Hex In line Package, HIP (Package 401) G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510) TIME (ns)T MARK For HIP Package Blank = 4CS# and 4WE#

= 4CS# and 1WE#, RESET# For G2U Package Blank = 4CS# and 4WE#

U = 1CS# and 1WE#

= 4CS# and 1WE#, RESET#

ORGANIZATION, 2M x 32

User con gurable as 4M x 16 or 8M x 8

(Except WF2M32U-XG2UX which is 32 bit wide only.)

WHITE ELECTRONIC DESIGNS CORP.

本文来源：https://www.bwwdw.com/article/osb4.html