如何测量告诉ADC的INL和DNL

如何测量告诉ADC的INL和DNL

ADC INL DNLADC LNA ADC ADC INL INL DNL DNLINL N 0 INL ADC 1ADC INL = [(VD-VZERO)/VLSB-IDEAL]-D 0 < D < 2N - 1INLDNL ADC VFSR ≤1LSBDNLLSB 1a DNL = 0LSB 1LSB 1LSB = VFSR/2N N ADC 1LSB DNL ADC DNLVDD V ZERO VLSB-IDEALNADCINLINL DNLDNLDACDUT PC X-Y DACDNL = [(VD+1 - VD)/VLSB-IDEAL - 1] 0 < D < 2N - 2 VD ADC D VLSB-IDEAL DNL ADC SNR N ADC ADC X-Y VDIFFADCDAC DAC V DIFF INL DNLSFDR INL LSBFSR INLINLADCINL (1b)13

如何测量告诉ADC的INL和DNL

DIGITAL OUTPUT CODEDIGITAL OUTPUT CODE11111111 . . . . . . . . . . . . 00000110 00000011FULL-SCALE RANGE (FSR) IDEAL TRANSFER EXAMPLE: FUNCTION ADJACENT PHYSICAL VALUE VD+1 CORRESPONDS TO DIGITAL OUTPUT CODE D+1 EXAMPLE: PHYSICAL VALUE VD CORRESPONDS TO DIGITAL OUTPUT CODE D CODE WIDTH = 2LSB 0.5LSB11111111IDEAL SPACING BETWEEN TWO ADJACENT CODES VLSB - IDEAL = 1LSB REAL TRANSFER FUNCTION WITH ONE MISSING CODE. . . . . . . . . . . 00000111 00000110 00000101 00000100 00000011 00000010 00000001 00000000ACTUAL ADC TRANSFER FUNCTION BEFORE OFFSET AND GAIN CORRECTIONINL ERROR (BEST-STRAIGHT-LINE INL)ACTUAL ADC TRANSFER CURVE AFTER OFFSET AND GAIN CORRECTION INL ERROR (ENDPOINT INL) BEST-STRAIGHTLINE FIT IDEAL TRANSFER CURVE V OFFSET (LSB) ANALOG INPUT00000010 00000001 00000000IDEAL 50% TRANSITION POINT IDEAL CODE CENTER FIRST TRANSITION LAST TRANSITION ANALOG INPUT1a. ≤1LSBADCDNL1b.ADCADC50% 50%ADC1b ADC 2 ADC ADC PC 2N-1 N ADC MAX108 MAX108 P Q P > QOUT DVM INL/DNL 314

如何测量告诉ADC的INL和DNL

dV/dt INL/DNL 4a , 4b INL S 50% L SAR L DAC 5CDUTRAMP dV dt +=I CN-BIT ADCINTEGRATORNNN 2 -1 CODES UNDER TEST FROM PCPRECISION DVM CURRENT SOURCESCLOCKDIGITAL MAGNITUDE COMPARATORISINKSIGNAL LINES ‘>’ AND ‘<’ OF THE MAGNITUDE COMPARATOR DIRECTLY CONTROL THE CURRENT FLOW OF THE TWO CURRENT SOURCES.><2.1.5GHz, +4dBm HP8662/3A SINE-WAVE SOURCE EXTERNAL 50 TERMINATION TO GNDI CLKCLK+ +5V ANALOG VIN+ SERVO-LOOP CIRCUIT -5V ANALOG VIN-MAX108EVKIT+5V DIGITAL +3.3V DIGITALQOUTPPC 16 DATA HP16500C DATA ANALYSIS SYSTEM DREADY+ POWER SUPPLIESGPIB3.MAX108EVKITMAX10815INLDNL

如何测量告诉ADC的INL和DNL

DAC DAC N ADC DAC ADC 16 1/8LSB DACINLDNLADC SNR SNR N 6.02 + 1.762M MSNRdB = N2M-1SNRSAR 16INL DNL TOC0.5 0.4 0.3 0.2INTEGRAL NONLINEARITY vs. DIGITAL OUTPUT CODE (LOW-FREQUENCY SERVO-LOOP DATA)0.5 0.4 0.3 0.2 DNL (LSB) 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5DIFFERENTIAL NONLINEARITY vs. DIGITAL OUTPUT CODE (LOW-FREQUENCY SERVO-LOOP DATA)INL (LSB)0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 0 32 64 96 128 160 192 224 256 DIGITAL OUTPUT CODE03264 96 128 160 192 224 DIGITAL OUTPUT CODE2564a.MAX108 ADCINL4b.MAX108 ADCDNL16

如何测量告诉ADC的INL和DNL

SUCCESSIVE APPROXIMATION REGISTER SAR L END OF CONVERSION EOC DATAREAD L BACK AFTER END OF CONVERSION L-BIT DAC N-BIT ADCL>NN DIGITAL MAGNITUDE COMPARATOR NN 2 -1 CODES UNDER TEST FROM PCCLOCKCLOCK‘DATA’ COUNTER COUNTS WHEN ‘>’ OUTPUT OF THE MAGNITUDE COMPARATOR IS A ‘1’. DIVIDE-BY SR FLIP FLOP S Q R CLK RESET REFERENCE COUNTER COUNTS EVERY CLOCK PULSE DIGITAL AVERAGER RDIVIDE-BY 2M>2M-1RESET CLOCK 1 ‘1’5.DACSAR SAR SAR/DAC 1/2FSR 1/4FSR MSB LSB SAR N SARReferencesJohns, D., and K. Martin. 1997. Analog Integrated Circuit Design. Plasche, R. van de. 1994. Integrated Analog-toDigital and Digital-to-Analog Converters. Sanchez-Sinencio, E., and A. G. Andreou. 1999. Low-Voltage/Low-Power Integrated Circuits and Systems—Low-Voltage Mixed-Signal Circuits. MAX108 data sheet. Rev. 1, 5/99. Maxim Integrated Products. MAX108EVKIT data sheet. Rev. 0, 6/99. Maxim Integrated Products.1/4FSR N DAC17

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