HBE-EMPOSIII-SV210实验箱的构成

1. 实验目的：

了解三星S5PV210处理器的结构及特点；掌握HBE-EMPOSIII-SV210的系统构造及特征。

2. 实验内容：

对照实验箱，阅读并理解以下资料。

阅读材料：

3. HBE-EMPOSIII-SV210 系统概要

3.1 S5PV210 处理器构造及特征

HBE-EMPOSIII-SV210基于采用ARM公司CortexTM-A8内核的三星S5PV210，是一种嵌入式教学用具。在了解HBE-EMPOSIII-SV210的系统结构之前，我们将对S5PV210做简要说明，并简单了解一下处理器的结构及特点。

[图 1-1] S5PV210 的框图

S5PV210的框图如[图1-1]所示。从图中可知，S5PV210由ARM内核、系统外围设备（System Peripheral）、多媒体（Multimedia）、存储器接口（Memory Interface）、电源管理（Power Management）、连通性（Connectivity）等功能块构成。

是一种实现ARM架构V7-A的32位RISC微处理器S5PV210基于三星开发的ARM CortexTM -A8，

。它为要求低耗电、高性能的移动及普通应用提供解决方案。此外，为提供3G和3.5G通信服务相关的优化硬件性能，S5PV210还具有64位内部总线结构。

S5PV210针对动作视频处理（Motion Video Processing）、显示控制及缩放（Display Control And Scaling）等，内置了多个功能强大的硬件加速器。其中，MFC（Multi Format Codec，多格式编码译码器）提供了有关MPEG-1/2/4、H.263/H.264的编码和解码，还提供了有关VC1、Divx的解码。此外，这种硬件加速器还支持实时电视会议和模拟电视输出、HDMI接口。.

S5PV210 的特征如下。

? ARM CortexTM-A8 based CPU Subsystem with NEON

? ?

32/32KB I/D Cache, 512KB L2 Cache

Operating frequency up to 800 Mhz at 1.1V, 1 GHz at 1.2V

? 64-bit Multi-layer bus architecture

?

MSYS domain for ARM CortexTM-A8, 3D engine, Multi Format Codec and Interrupt Controller

? Operating frequency up to 200 Mhz at 1.1V

?

DSYS domain mainly for Display IPs(such as LCD controller, Camera interface, and TVout), and MDMA

? Operating frequency up to 166 Mhz at 1.1V

?

PSYS domain mainly for other system component such as system peripherals,external memory interface, peri DMAs, connectivity IPs, and Audio interfaces.

? Operating frequency up to 133 Mhz at 1.1V

?

Audio domain for low power audio play

? Advanced power management for mobile applications

? 64KB ROM for secure booting and 128KB RAM for security function

? 8-bit ITU 601/656 Camera Interface supports horizontal size up to 4224 pixels for scaled

and 8192 pixels for un-scaled resolution

? Multi Format Codec provides encoding and decoding of MPEG-4/H.263/H.264 up to

1080p@30fps and coding of MPEG-2/VC1/Divx video up to 1080p@30fps. ? JPEG codec support up to 80 Mpixels/s

? 3D Graphics Acceleration with programmable shader up to 20M triangles/s and 1000

Mpixels/s

? 2D Graphics Acceleration up to 160MPixels/s

? 1/2/4/8 bpp Palletized or 8/16/24bpp Non-Palletized Color-TFT recommended up to

XGA resolution.

? TV-out and HDMI interface support for NTSC and PAL mode with image enhancer ? MIPI-DSI and MIPI-CSI interface

? One AC-97 audio codec interface and 3-channel PCM serial audio interface ? 3-channel 24-bit I2S interface

? 1-channel TX only S/PDIF interface support for digital audio ? 3-channel I2C interface ? 2-channel SPI interface

? 4-channel UART including 3Mbps port for Bluetooth 2.0

? On-chip USB 2.0 OTG supporting high speed (480Mbps, on-chip transceiver) ? On-chip USB 2.0 Host

? Asynchronous Modem Interface ? 4 SD/SDIO/HS-MMC interface. ? ATA/ATAPI-6 standard interface

? 24-channel DMA controller (8 channels for Memory-to-memory DMA, 16 channels for

Peripheral DMA) ? 14x8 key matrix interface

? 10-channel 12-bit multiplexed ADC ? Configurable GPIOs

? Real time clock, PLL, timer with PWM and watch dog timer.

? System timer support for accurate tick time in power down mode(except sleep mode) ? Memory Subsystem

? ? ? ? ? ?

Asynchronous SRAM/ROM/NOR Interface with x8 or x16 data bus. NAND Interface with x8 data bus

Muxed/Demuxed OneNAND Interface with x16 data bus.

LPDDR1 Interface with x16 or x32 data bus (266~400Mbps/pin DDR) DDR2 interface with x16 or x32 data bus (400Mbps/pin DDR) LPDDR2 interface (400Mbps/pin DDR)

3.2 HBE-EMPOSIII-SV210的系统构造及特征

在本节中，记述了目标板 — HBE-EMPOSIII-SV210 的系统构造及特征。

3.2.1 系统构造

HBE-EMPOSIII-SV210以S5PV210处理器为中心，主要由CPU模块（由NAND Flash memory、DDR2 SDRAM和缓存等构成）、通过NOR Flash Memory、LCD、UART、USB、Audio、

Ethernet、Camera、SD

Card

slot等外围设备和FPGA控制的DipSwitch、DotMatrix、LEDs、

CharacterLCD、OLED、7-Segment、蜂鸣器、Keypad、CMOS Camera等多种应用设备以及基板（提供通过Microcontroller控制的各种传感器）构成。

下[图 1-2] 显示了 HBE-EMPOSIII-SV210 的整体框图。

[图 1-2] HBE-EMPOSIII-SV210 整体框图

3.2.2 系统特征

HBE-EMPOSIII-SV210主要由CPU模块和基板构成，将提供以下多种功能。. ? HBE-EMPOSIII-SV210 CPU Module

? ? ?

? HBE-EMPOSIII-SV210 Base Board(CPU Connected)

三星 S5PV210(ARM CortexTM-A8 Core) 512MByte DDR2 SDRAM : 128MByte * 4ea 256MByte NAND Flash Memory : 256MByte * 1ea

? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?

? HBE-EMPOSIII-SV210 Base Board(FPGA Connected)

? ? ? ? ? ? ? ? ? ? ? ? ?

Character LCD(16 * 2) 1,3M Pixel CMOS Camera 6Digit 7-Segment 512Kbyte SRAM * 2ea

18,752 Logic Elements FPGA EP2C20 7 * 5 Dot Matrix 2ea 4 * 4 Keypad

8point DIP Switch 2ea OLED LED 8ea Buzzer

Tact Switch 4ea Light Sensor

? Temperature/Humidity Sensor

10/100Base-T Ethernet Controller 7”TFT LCD with Touch Screen 3.1M Pixel CMOS Camera

IIS Audio Codec : Speaker, MIC & Line-In USB 2.0 Host 3 Port and USB 2.0 OTG 1 Port RS232 Level UART 3 Port TTL Level UART 4 Port Bluetooth

SD/MMC Card Connector 2 Port Composite Video Out 1 Port HDMI 1 Port SPDIF 1 Port 5 * 3 Keypad 1ea Jog Switch

1ea Power On/Off Switch 2ea Boot Mode Switch

3.3 HBE-EMPOSIII-SV210 产品构成

下<表1-1>显示了一套HBE-EMPOSIII-SV210产品中所包含的所有组件。.

<表 1-1> HBE-EMPOSIII-SV210 产品构成

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