OV5648_COB_DS
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datasheet
PRELIMINARY SPECIFICATION
1/4" color CMOS QSXGA (5 megapixel) image sensor
with OmniBSI+ technology
OV5648
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
Copyright © 2012 OmniVision Technologies, Inc. All rights reserved.
This document is provided “as is” with no warranties whatsoever, including any warranty of merchantability,
non-infringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample.
OmniVision Technologies, Inc. and all its affiliates disclaim all liability, including liability for infringement of any proprietary rights, relating to the use of information in this document. No license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.
The information contained in this document is considered proprietary to OmniVision Technologies, Inc. and all its affiliates. This information may be distributed to individuals or organizations authorized by OmniVision Technologies, Inc. to receive said information. Individuals and/or organizations are not allowed to re-distribute said information.
Trademark Information
OmniVision and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc. OmniBSI+ is a trademark of OmniVision Technologies, Inc.
All other trademarks used herein are the property of their respective owners.
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
datasheet (COB)
PRELIMINARY SPECIFICATIONversion 1.1
september 2012
To learn more about OmniVision Technologies, visit http://www.77cn.com.cn.
OmniVision Technologies is publicly traded on NASDAQ under the symbol OVTI.
i
applications
ordering information
cellular phonestoys
PC multimediadigital still cameras
OV05648-G04A (color, chip probing, 200 µm backgrinding, reconstructed wafer)
features
1.4 µm x 1.4 µm pixel with OmniBSI+ technology for high performance (high sensitivity, low crosstalk, low noise)
optical size of 1/4"
automatic image control functions: automatic exposure control (AEC), automatic gain control (AGC), automatic white balance (AWB), and automatic black level calibration (ABLC)
programmable controls for frame rate, AEC/AGC 16-zone size/position/weight control, mirror and flip, cropping, windowing, and panningdefective pixel canceling
support for output formats: 8-/10-bit raw RGB datasupport for video or snapshot operations
support for LED and flash strobe modesupport for internal and external frame synchronization for frame exposure modesupport for horizontal and vertical sub-samplingstandard serial SCCB interfaceMIPI interface (two lanes)
32 bytes of embedded one-time programmable (OTP) memory
on-chip phase lock loop (PLL)
embedded 1.5V regulator for core powerprogrammable I/O drive capability, I/O tri-state configurability
support for black sun cancellation
key specifications (typical)
active array size: 2592 x 1944power supply:
core: 1.5V ± 5% (with embedded 1.5V regulator)analog: 2.6 ~ 3.0V (2.8V typical)I/O: 1.7V ~ 3.0Vpower requirements: active: 198 mWstandby: 35 µWtemperature range:
operating: -30°C to 70°C junction temperature (see table 8-2)
stable image: 0°C to 50°C junction temperature (see table 8-2)
input clock frequency: 6~27 MHzmax S/N ratio: 34 dB
dynamic range: 67 dB @ 8x gainmaximum image transfer rate: QSXGA (2592 x 1944): 15 fps1080p: 30 fps960p: 45 fps720p: 60 fps
VGA (640 x 480): 90 fpssensitivity: 600mV/Lux-secshutter: rolling shutterpixel size: 1.4 µm x 1.4 µm
dark current: 8 mV/s @ 50°C junction temperatureimage area: 3673.6 µm x 2738.4 µmdie dimensions: 5000 µm x 4800 µm
output formats: 8-/10-bit RGB RAW outputlens size: 1/4"
lens chief ray angle: 29.1° (see figure 10-2)
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATIONversion 1.1
iii
table of contents
1 signal descriptions 2 system level description
2.1 overview 2.2 architecture
2.3 format and frame rate 2.4 I/O control
2.4.1 system clock control 2.5 power up sequence
2.5.1 power up with internal DVDD 2.5.2 power up with external DVDD source 2.6 reset
2.7 hardware and software standby
2.8 serial camera control bus (SCCB) interface
2.8.1 data transfer protocol 2.8.2 message format 2.8.3 read / write operation 2.8.4 SCCB timing 2.8.5 group write
3 block level description
3.1 pixel array structure 3.2 subsampling 3.3 analog amplifier 3.4 10-bit A/D converters 4 image sensor core digital functions
4.1 mirror and flip 4.2 image windowing 4.3 test pattern
4.3.1 color bar 4.3.2 square 4.3.3 random data 4.3.4 transparent effect 4.3.5 rolling bar effect 4.4 AEC and AGC algorithms
1-12-12-12-12-32-32-32-32-32-42-52-52-62-62-62-62-92-103-13-13-23-23-24-14-14-24-34-34-34-44-44-44-6
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
4.4.1 average-based algorithm 4.4.2 average luminance (YAVG) 4.5 AEC/AGC steps
4.5.1 auto exposure control (AEC) 4.5.2 night mode
4.5.3 banding mode ON with AEC 4.5.4 banding mode OFF with AEC 4.5.5 manual exposure control 4.5.6 auto gain control (AGC) 4.5.7 manual gain control
4.5.8 integration time between 1~16 rows 4.5.9 gain insertion between AEC banding steps 4.5.10 gain insertion between night mode steps 4.5.11 when AEC reaches maximum 4.6 black level calibration (BLC) 4.7 strobe flash and frame exposure
4.7.1 strobe flash control 4.8 xenon flash control
4.8.1 LED1 & 2 mode 4.8.2 LED 3 mode
4.9 frame exposure (FREX) mode
4.9.1 FREX control
4.9.2 STROBE control in FREX mode 4.10 FREX strobe flash control
4.11 one-time programmable (OTP) memory
4.11.1 OTP program 4.11.2 OTP read
5 image sensor processor digital functions
5.1 ISP general controls
5.2 defect pixel cancellation (DPC) 5.3 auto white balance (AWB) 5.4 post binning filter 5.5 picture-in-picture (PIP)
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION4-74-94-114-114-114-114-114-114-124-124-124-124-124-124-144-154-154-154-164-174-184-184-214-224-234-244-255-15-15-35-35-55-6
version 1.1
v
6 image sensor output interface digital functions
6.1 system control 6.2 SCCB
6.3 group register write 6.4 timing control 6.5 frame control (FC)
6.6 mobile industry processor interface (MIPI) 7 register tables
7.1 system control [0x3000 ~ 0x3209] 7.2 group hold control [0x3200 ~ 0x3208]
7.3 AEC/AGC [0x3500 ~ 0x373A, 0x3A00 ~ 0x3A21, 0x5680 ~ 0x5A41] 7.4 timing control [0x3800 ~ 0x3834]
7.5 strobe/frame exposure [0x3B00 ~ 0x3B0C] 7.6 OTP control [0x3D00 ~ 0x3D21] 7.7 BLC control [0x4000 ~ 0x4067] 7.8 frame control [0x4200 ~ 0x4202] 7.9 MIPI control [0x4800 ~ 0x4843] 7.10 ISP control [0x5000 ~ 0x5059] 7.11 AWB control [0x5180 ~ 0x51DF] 7.12 ISP output windows [0x5980 ~ 0x5988] 8 operating specifications
8.1 absolute maximum ratings 8.2 functional temperature 8.3 DC characteristics 8.4 AC characteristics 9 mechanical specifications
9.1 physical specifications 10 optical specifications
10.1 sensor array center 10.2 lens chief ray angle (CRA) appendix A handling of RW devices
A.2 particles and cleanliness of environment A.3 other requirements
6-16-16-56-56-66-86-97-17-17-67-77-127-147-157-167-177-187-247-297-318-18-18-18-28-39-19-110-110-110-2A-1A-1A-1
A.1 ESD /EOS prevention A-1
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATIONversion 1.1
vii
list of figures
figure 1-1figure 2-1figure 2-2figure 2-3figure 2-4figure 2-5figure 2-6figure 2-7figure 2-8figure 2-9figure 2-10figure 2-11figure 2-12figure 3-1figure 3-2figure 4-1figure 4-2figure 4-3figure 4-4figure 4-5figure 4-6figure 4-7figure 4-8figure 4-9figure 4-10figure 4-11figure 4-12figure 4-13figure 4-14figure 4-15figure 4-16figure 4-17
pad diagram
OV5648 block diagram reference design schematic power up timing with internal DVDD power up timing with external DVDD source message type
SCCB single read from random location SCCB single read from current location SCCB sequential read from random location SCCB sequential read from current location SCCB single write to random location SCCB sequential write to random location SCCB interface timing
sensor array region color filter layout example of 2x2 binning mirror and flip samples image windowing color bar types
color, black and white square bars transparent effect rolling bar effect desired convergence
average-based window definition xenon flash mode
LED 1 & 2 mode - one pulse output LED 1 & 2 mode - multiple pulse output LED 3 mode FREX modes
FREX mode 1 timing diagram
FREX mode 2 timing diagram (when shutter delay is longer than exposure time) FREX mode 2 timing diagram (when shutter delay is shorter than exposure time) STROBE control in FREX mode
1-42-12-22-42-52-62-72-72-72-82-82-82-93-13-24-14-24-34-34-44-44-74-94-154-164-174-174-184-184-204-204-21
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
figure 5-1picture-in-picture image
figure 5-2picture-in-picture function block diagram figure 9-1die specifications figure 10-1sensor array center figure 10-2
chief ray angle (CRA)
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION5-65-69-110-110-2
version 1.1
ix
list of tables
table 1-1 signal descriptions
table 1-2 pad configuration under various conditionstable 2-1 format and frame rate
table 2-2 SCCB interface timing specificationstable 2-3 SCCB interface registertable 2-4 group hold registers
table 3-1 horizontal and vertical binning registerstable 4-1 mirror flip control registerstable 4-2 image windowing registerstable 4-3 test pattern registers
table 4-4 AEC/AGC control function registerstable 4-5 average based control function registerstable 4-6 average luminance control function registerstable 4-7 AEC/AGC registerstable 4-8 BLC control functionstable 4-9 flashlight modes
table 4-10 FREX mode 2 timing point descriptiontable 4-11 FREX strobe control functionstable 4-12 OTP control function registerstable 5-1 ISP general control registerstable 5-2 defect pixel cancellation registerstable 5-3 AWB control registerstable 5-4 post binning control registerstable 5-5 PIP control registerstable 5-6 SPI control registerstable 6-1 system control registerstable 6-2 system control registerstable 6-3 group hold control registerstable 6-4 timing control registerstable 6-5 frame control registerstable 6-6 MIPI transmitter registerstable 7-1 system control registers
1-11-22-32-92-102-103-24-14-24-54-64-84-94-124-144-154-194-224-235-15-35-35-55-75-76-16-56-56-66-86-97-1
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
table 7-2 group hold control registerstable 7-3 AEC/AGC registerstable 7-4 system timing registers
table 7-5 strobe/frame exposure control registerstable 7-6 OTP control registerstable 7-7 BLC registers
table 7-8 frame control registerstable 7-9 MIPI registerstable 7-10 ISP control registerstable 7-11 AWB registers
table 7-12 ISP output windows registerstable 8-1 absolute maximum ratingstable 8-2 functional temperature
table 8-3 DC characteristics (-30°C < TJ < 70°C)table 8-4 timing characteristicstable 9-1 pad location coordinatestable 10-1 CRA versus image height plot
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION7-67-77-127-147-157-167-177-187-247-297-318-18-18-28-39-110-2
version 1.1
1-1
1signal descriptions
table1-1 lists the signal descriptions and their corresponding pad numbers for the OV5648 image sensor. The die information is shown in section9.
table 1-1
padnumber
01020304050607080910111213141516171819202122232425
signal descriptions (sheet 1 of 2)
signal name
DVDDAGNDAVDDDOGNDSIODSIOCDVDDSCKSDI0SDI1DOVDDGPIOVSYNCFREXDOGNDSTROBERESETBPWDNBDVDDTMAVDDAGNDAGNDAVDDHVDD
pad type
powergroundpowergroundI/OinputpowerI/OI/OI/OpowerI/OI/OI/Ogroundoutputinputinputpowerinputpowergroundgroundpowerinput
description
digital circuit poweranalog groundanalog powerI/O ground
SCCB interface dataSCCB interface input clockdigital circuit powerSPI interface input clockSPI interface data input 0SPI interface data input 1I/O power
general purpose I/Ovideo output vertical signal
frame exposure input / mechanical shutterI/O ground
frame exposure output indicator
system reset (active low with pull up resistor)power down (active low with pull down resistor)digital circuit power
test mode (active high with pull down resistor)analog poweranalog groundanalog groundanalog powerreference
defaultstatus
1.5V
2.8V
1.5V
1.8/2.8V
1.5V
2.8V
2.8V
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
table 1-1
padnumber
26272829303132333435363738394041424344
signal descriptions (sheet 2 of 2)
signal name
NVDDPVDDXVCLKDOVDDDVDDDOGNDDOVDDMDP0MDN0EGNDMCPMCNEVDDMDP1MDN1DOVDDDOGNDDVDDDOVDD
pad type
inputpowerinputpowerpowergroundpoweroutputoutputgroundoutputoutputpoweroutputoutputpowergroundpowerpower
description
referencePLL analog powersystem clock inputI/O power
digital circuit powerI/O groundI/O power
MIPI data positive outputMIPI data negative outputMIPI ground
MIPI clock positive outputMIPI clock negative outputMIPI power
MIPI data positive outputMIPI data negative outputI/O powerI/O grounddigital circuit powerI/O power
defaultstatus
2.8V
1.8V/2.8V1.5V
1.8V/2.8V
1.5V
1.5V1.8V/2.8V
table 1-2
padnumber
0506080910
pad configuration under various conditions (sheet 1 of 2)
signal
SIODSIOCSCKSDI0SDI1
RESETa
high-zhigh-zhigh-zhigh-zhigh-z
post-RESET
I/Oinput
input by default (configurable)input by default (configurable)input by default (configurable)
software sleep
I/Oinput
high-z by default (configurable)high-z by default (configurable)high-z by default (configurable)
hardware standby(power down pin = 0)
open drainhigh-z
high-z by default (configurable)high-z by default (configurable)high-z by default (configurable)
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATIONversion 1.1
1-3
table 1-2
padnumber
12131416171820252628333436373940a.
pad configuration under various conditions (sheet 2 of 2)
signal
GPIOVSYNCFREXSTROBERESETBPWDNBTMHVDDNVDDXVCLKMDP0MDN0MCPMCNMDP1MDN1
RESETa
high-zhigh-zhigh-zhigh-zinputinputinputhigh-zhigh-zinputhigh-zhigh-zhigh-zhigh-zhigh-zhigh-z
post-RESET
input by default (configurable)input by default (configurable)input by default (configurable)input by default (configurable)inputinputinputopen drainopen draininputLP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)
software sleep
high-z by default (configurable)high-z by default (configurable)high-z by default (configurable)high-z by default (configurable)inputinputinputopen drainopen draininputLP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)
hardware standby(power down pin = 0)
high-z by default (configurable)high-z by default (configurable)high-z by default (configurable)high-z by default (configurable)inputinputinputhigh-zhigh-zhigh-zLP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)LP1
(configurable)
PWDN pin = 1 when chip power up
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
figure 1-1
pad diagram
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
proprietary to OmniVision Technologies
PRELIMINARY SPECIFICATIONversion 1.1
2-1
2system level description
2.1 overview
The OV5648 is a low voltage, high performance, 5 megapixel CMOS image sensor that provides 2592x1944 video output using OmniBSI+ technology. It provides multiple resolution raw images via the control of the serial camera control bus.The OV5648 has an image array capable of operating up to 15 fps in 2592x1944 resolution with user control of image quality, data transfer, camera functions through the SCCB interface. The OV5648 uses innovative OmniBSI+ technology to improve the sensor performance without physical or optical trade-offs.The OV5648 includes a one-time programmable (OTP) memory.
2.2 architecture
The OV5648 sensor core generates streaming pixel data at a constant frame rate, indicated by VSYNC. figure 2-1 shows the functional block of the OV5648 image sensor. figure 2-2 shows an example application of the OV5648.
figure 2-1OV5648 block diagram
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
OV5648
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI+ technology
figure 2-2reference design schematic
proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATIONversion 1.1
2-3
2.3 format and frame rate
table 2-1
format
5 Mpixel1080pquarter 5Mp720pVGA
format and frame rate
resolution
2592x19441920x10801296x9721280x720640x480
frame rate
15 fps30 fps45 fps60 fps90 fps
methodology
full resolutioncropping
cropping, subsampling/binningcropping, subsampling/binningcropping, subsampling/binning
pixel clock
84 MHz84 MHz84 MHz84 MHz84 MHz
2.4 I/O control
2.4.1 system clock control
The OV5648 has an on-chip PLL which generates a default 84 MHz clock from a 6~27 MHz input clock. A built-in programmable clock divider generates different internal frequencies.
2.5 power up sequence
Based on the system power configuration (1.8V or 2.8V for I/O power), using external DVDD or internal DVDD, the power up sequence will differ. If 1.8V is used for I/O power, using the internal DVDD is preferred. If 2.8V is used for I/O power, due to the high voltage drop of the internal DVDD regulator, there is a potential heat issue. Hence, for a 2.8V power system, OmniVision recommends using an external DVDD source. Due to the higher power-down current when using an external DVDD source, OmniVision strongly recommends cutting off all power supplies, including the external DVDD, when the sensor is not in use.
2.5.1 power up with internal DVDD
For powering up with the internal DVDD and SCCB access during the power ON period, the following conditions must occur:
1.2.3.4.5.6.7.8.
when DOVDD and AVDD are turned ON, make sure DOVDD becomes stable before AVDD becomes stablePWDNB is active low with an asynchronized design (does not need clock)PWDNB must be low during the power up period
for PWDNB to go high, power must first become stable (AVDD to PWDNB ≥ 5 ms)RESETB is active low with an asynchronized design
state of RESETB does not matter during power up period once DOVDD is stable
master clock XVCLK should be provided at least 1 ms before host accesses the sensor’s registershost can access SCCB bus (if shared) during entire period. 20 ms after PWDNB goes high or 20 ms after RESETB goes high if reset is inserted after PWDNB goes high, host can access the sensor’s registers to initialize the sensor
09.28.2012PRELIMINARY SPECIFICATIONproprietary to OmniVision Technologies
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