MBI6024 Preliminary Datasheet V2.00-EN

MacroblockFeaturesz z z z z zPreliminary DatasheetMBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsShrink SOP3x4-channel constant-current sink driver for LED strips Constant current range: 3~45mA 3 groups of output current, each group is set by an external resistor Sustaining voltage at output channels: 17V (max.) Supply voltage 3V~5.5V Embedded 16-bit PWM generator - Gray scale clock generated by the embedded oscillator - S-PWM patented technology GP: SSOP24L-150-0.64zTwo selectable modes to trade off between image quality and transmission bandwidth - 16-bit gray scale mode (with optional 8-bit dot correction) - 10-bit gray scale mode (with optional 6-bit dot correction) Quad Flat No-LeadzReliable data transmission - Daisy-chain topology - Two-wire transmission interface - Phase-inversed output clock - Built-in buffer for long distance transmission GFN: QFN24L-4*4-0.5zFlexible PWM reset modes - Auto-synchronization mode - Manual-synchronization modezRoHS-compliant packagesApplicationz z z LED strips Mesh display Architectural lighting©Macroblock, Inc. 2011 6F-4, No.18, Pu-Ting Rd., Hsinchu, Taiwan 30072, R.O.C. TEL: +886-3-579-0068, FAX: +886-3-579-7534, E-mail: info@ -1October 2011, V2.00

MBI6024Product DescriptionPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsMBI6024 is a 3x4-channel, constant-current, PWM-embedded sink driver for LED strips. MBI6024 provides constant current ranging from 3mA to 45mA for each output channel and are adjustable with three corresponding external resistors. Besides, MBI6024 can support both 3.3V and 5V power systems and sustain 17V at output channels. With Scrambled-PWM (S-PWM) technology, MBI6024 enhances pulse width modulation by scrambling the “on” time into several “on” periods to increase visual refresh rate at the same gray scale performance. Besides, the gray scale clock (GCLK) is generated by the embedded oscillator. Moreover, MBI6024 provides two selectable gray scale modes to trade off between image quality and transmission: 16-bit gray scale mode and 10-bit gray scale mode. The 16-bit gray scale mode provides 65,536 gray scales for each LED to enrich the color. Subject to the 16-bit gray scale mode, the 8-bit dot correction may adjust each LED by 256-step gain to compensate the LED brightness. Furthermore, the 10-bit gray scale mode provides 1,024 gray scales. Subject to the 10-bit gray scale mode, 6-bit dot correction may adjust each LED by 64-step gain. In addition, MBI6024 features a two-wire transmission interface to make cluster-to-cluster connection easier. To improve the transmission quality, MBI6024 provides phase-inversed output clock to eliminate the accumulation of signal pulse width distortion. MBI6024 is also flexible for either manual-synchronization or auto-synchronization. The manual-synchronization is to maintain the synchronization of image frames between ICs. The auto-synchronization is to achieve accurate gray scale, especially when using the built-in oscillator.-2-October 2011, V2.00

MBI6024Pin ConfigurationPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsR-EXTC R-EXTB R-EXTA GND CKO SDO TEST2 TEST1 16 15 14 7 8 OUTB0 13 9 10 11 12 OUTA0 GND CKI SDIOUTC3OUTA3OUTB3GND CKI SDI TEST1 TEST2 SDO CKO GND R-EXTA R-EXTB R-EXTC VDD1 2 3 4 5 6 7 8 9 10 11 1224 23 22 21 20 19 18 17 16 15 14 13OUTA0 OUTB0 OUTC0 OUTA1 OUTB1 OUTC1 OUTA2 OUTB2 OUTC2 OUTA3 OUTB3 OUTC3OUTC2 OUTB2 OUTA2 OUTC1 OUTB1 OUTA124 23 22 21 20 19 18 1 17 2 3 4 5 6 Thermal PadMBI6024GP Top ViewMBI6024GFN Top ViewTerminal DescriptionGP 1 2 3 4 5 6 7 8 9,10,11 12 15,14,13 18,17,16 21,20,19 24,23,22 Pin GFN 10 11 12 13 14 15 16 17 18,19,20 21 24,23,22 3,2,1 6,5,4 9,8,7 Name GND CKI SDI TEST1 TEST2 SDO CKO GND R-EXTA, B, C VDD Description and function Ground terminal Input terminal for clock input Input terminal for serial data input Test pin 1 (Default: internal pulled- high) Test pin 2 (Default: internal pulled- low) Output terminal for serial data output Output terminal for clock output Ground terminal Input terminals for setting output current by connecting to an external resistor 3.3V/5V supply voltage terminal Output terminals for constant-current output Output terminals for constant-current output Output terminals for constant-current output Output terminals for constant-current output Heat dissipation pad* Please connect to GND.OUTA3, B3, C3 OUTA2, B2, C2 OUTA1, B1, C1 OUTA0, B0, C0Thermal Pad*The desired thermal conductivity will be improved on condition that a heat-conducting copper foil on PCB is soldered with thermal pad.VDDOUTC0-3-October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsTypical Application CircuitVIN GNDJ3 TVS1DC/DC ConverterVLEDLDOC1 C2 TVS2 10uF 0.1uF 1 2 3 connetc to VDD 12 VDD GND CKI SDI 24 OUTA0 13 VDS OUTC3 CKO SDO 7 6 R1optionVIN GND CKI GND SDIJ1J2MBI6024GPR2option connetc to VDDVOUT GND CKO GND SDOGND 8 TVS3R-EXTA R-EXTB R-EXTC 9 10 11 R3 R4 R5 TVS4Note: 1. TVS1~TVS4 are Transient Voltage Suppressor (TVS). 2. C1~C2 are required. The values of the C1~C2 are reference only. Tantalum capacitors and Ceramic capacitors are recommended. 3. For hot plug, system grounding, connector design, external ESD protection, or detailed circuit information, please refer to the “MBI6024 Application Note” for detailed information.-4-October 2011, V2.00

MBI6024Block DiagramPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsOUTA0 OUTB0 OUTC0 OUTA1OUTC3R-EXTA R-EXTB R-EXTCIO Regulator IO Regulator IO RegulatorComparatorComparatorComparatorComparatorComparatorPWM Counter 16/10 FrequencyData RegisterData RegisterData RegisterData RegisterData Registerdivider OscillatorConfiguration Register 16/10 Dot correction RegisterBuffers16/10 Dot correction Register 8/6 Decoder & Data Dispatcher Dot correction RegisterSDI CKIShift RegisterSDO CKO-5-October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsEquivalent Circuits of Inputs and OutputsCKO, SDO terminal CKI, SDI terminal CKO, SDOR-EXTA, B, C terminalVDDOUTAn,Bn,Cn terminalOUTAn OUTBn OUTCnR-EXTA R-EXTB R-EXTC-6-October 2011, V2.00

MBI6024Maximum RatingCharacteristic Supply Voltage Sustaining Voltage at CKI, SDI PinsPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSymbol VDD VIN VOUT VDS IOUT IGND GP GFN GP GFN PD PD Rth(j-a) Rth(j-a) Tj,max Topr Tstg Human Body Mode (MIL-STD-883G Method 3015.7) Machine Mode (JEDEC EIA/JESD22-A115,) HBM Rating 0~7 -0.4~VDD+0.4 -0.4~VDD+0.4 -0.5~+17 +45 570 1.82 2.97 68.63 42.12 150** -40~+85 -55~+150 Class 3A (4000V to 7999V) Class B (200V to 399V) Unit V V V V mA mA W W °C/W °C/W °C °C °C -Sustaining Voltage at CKO, SDO Pins Sustaining Voltage at OUTn Pins Output Current per Output Channel GND Terminal Current Heat dissipation (On 4-Layer PCB, Ta=25°C)* Thermal Resistance (By simulation, on 4-Layer PCB)* Junction Temperature Operating Ambient Temperature Storage TemperatureESD RatingMM-*The PCB size is 76.2mm*114.3mm in simulation. Please refer to JEDEC JESD51. ** Operation at the maximum rating for extended periods may reduce the device reliability; therefore, the suggested junction temperature of the device is under 125°C. Note: The performance of thermal dissipation is strongly related to the size of thermal pad, thickness and layer numbers of the PCB. The empirical thermal resistance may be different from simulative value. Users should plan for expected thermal dissipation performance by selecting package and arranging layout of the PCB to maximize the capability.-7-October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSymbol VDD VDS IOUT IOH IOL IOUT dIOUT dIOUT2 %/dVDS %/dVDD VIH VIL VOL VOH VREXT VKnee IDD(off) OUTAn ~ OUTCn =OffElectrical Characteristics (VDD=5.0V, Ta=25°C)Characteristics Supply Voltage Sustaining Voltage at OUT Ports Output Current Driving Current Output Leakage Current Current Skew (Channel) Current Skew (IC) Output Current vs. Output Voltage Regulation* Output Current vs. Supply Voltage Regulation* Input Voltage of CKI, SDI Pins “H” level “L” level Condition Min. 4.5 5 1.8 2.0 0.73 x VDD GND VDD-0.2 0.55 0.7 13 Typ. 5.0 2.2 2.3 ±1.5 ±3.0 ±0.1 ±1.0 0.61 0.75 15.0 Max. 5.5 17.0 45 2.5 2.8 1.0 ±3.0 ±6.0 ±0.5 ±2.0 VDD 0.28 x VDD 0.2 0.66 0.8 17.0 Unit V V mA mA mA µA % % %/V %/V V V V V V VRefer to “Test Circuit for Electrical Characteristics” CKO, SDO at VOH=4.8V CKO, SDO at VOH=0.2V VDS=17.0V, OUTAn ~ OUTCn =Off IOUT=20mA Rext=680 VDS=1.0V IOUT=20mA Rext=680 VDS=1.0V VDS within 1.0V and 3.0V, VDD within 4.5V and 5.5V IOL=+3.0mA IOH=-3.0mAOUTAn ~ OUTCn =OnOutput Voltage “H” level of CKO, SDO “L” level Pins Voltage at R-EXTA,B,C Pins Knee Voltage* “Off”Rext=311 at IOUT=45mA Rext=360 , CKI, SDI=Low, CKO, SDO=NC, OUTAn ~ OUTCn =Off Rext=680 , CKI, SDI=Low, CKO, SDO=NC, OUTAn ~Supply Current** “On” IDD(on)7.59.011.0mAOUTCn =OnRext=680 , CKI=10MHz, CKO, SDO=NC, OUTAn ~OUTCn =On-18.020.0*One channel turns on. ** The supply current may vary with the loading conditions.-8-October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSymbol VDD VDS IOUT IOH IOL IOUT dIOUT dIOUT2 %/dVDS %/dVDD VIH VIL VOL VOH VREXT VKnee “Off” IDD(off) OUTAn ~ OUTCn =OffElectrical Characteristics (VDD=3.3V, Ta=25°C)Characteristics Supply Voltage Sustaining Voltage at OUT Ports Output Current Driving Current Output Leakage Current Current Skew (Channel) Current Skew (IC) Output Current vs. Output Voltage Regulation* Output Current vs. Supply Voltage Regulation* “H” level Input Voltage of CKI, SDI Pins “L” level “H” Output Voltage level of CKO, SDO “L” Pins level Voltage at R-EXTA,B,C Pins Knee Voltage* Condition Min. 3.0 3 1.6 1.6 0.73 x VDD GND VDD-0.2 0.60 0.80 Typ. 3.3 1.9 2.1 ±1.5 ±3.0 ±0.1 ±1.0 0.61 0.82 13.0 Max. 3.6 17.0 30 2.4 2.5 1.0 ±3.0 ±6.0 ±0.5 ±2.0 VDD 0.28 x VDD 0.2 0.62 0.84 15.0 Unit V V mA mA mA µA % % %/V %/V V V V V V VRefer to “Test Circuit for Electrical Characteristics” CKO, SDO at VOH=3.1V CKO, SDO at VOH=0.2V VDS=17.0V, OUTAn ~ OUTCn =Off IOUT=20mA Rext=680 VDS=1.0V IOUT=20mA Rext=680 VDS=1.0V VDS within 1.0V and 3.0V VDD within 3.0V and 3.6V IOL=+2.0mA IOH=-2.0mAOUTAn ~ OUTCn =OnRext=467 at IOUT=30mA Rext=360 , CKI,SDI=Low, CKO, SDO= NC, OUTAn ~ OUTCn =Off Rext=680 , CKI,SDI=Low, CKO, SDO=NC, OUTAn ~Supply Current** “On” IDD(on)-9.011.0mAOUTCn =OnRext=680 , CKI=10MHz, CKO, SDO=NC, OUTAn ~OUTCn =On-13.015.0*One channel turns on. **The supply current may vary with the loading conditions.-9-October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSymb ol tSU tHD tPHL1 tPHL2 tPHL3 tPHL4 tPHL5 tPHL6 tPLH3 tPLH4 tPLH5 tPLH6 tw(I) tWDM tOR tOR1 tOF tOF1 FCKI FOSC VLED=4V VDS=1.0V VIH=VDD VIL=GND IOUT=20m A RL=150 CL=10pF C1=4.7uF C2=0.1uF C3=4.7uF CCKO=8pF CSDO=8pFSwitching Characteristics (VDD=5.0V, Ta=25°C)Characteristics Setup Time Hold Time SDI–CKI↓ CKI↓–SDI CKI↑–CKO↓ CKI↓–SDO↑↓ GCLK↑– OUTB0 , OUTA1 , OUTB2 ↓ GCLK↑– OUTC1 , OUTA3 , OUTC3 ↓ GCLK↑– OUTA0 , OUTC0 , OUTA2 ↓ GCLK↑– ↓OUTB1ConditionMin. 7.5 7.5 22 27 32 37 22 27 32 37 15 38 2.0 8.0 2.0 12.0 0.2 -Typ. 40 30 30 35 40 45 30 35 40 45 3.5 12.0 3.5 16.0 24.0Max. -Unit ns ns ns ns38 43 48 53 38 43 48 53 5.0 15.0 5.0 20.0 10 -ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHzPropagation Delay Time (“H” to “L”), OUTC2 , OUTB3GCLK↑– OUTB0 , OUTA1 , OUTB2 ↑ Propagation Delay Time (“L” to “H”) GCLK↑– OUTC1 , OUTA3 , OUTC3 ↑ GCLK↑– OUTA0 , OUTC0 , OUTA2 ↑ GCLK↑– OUTB1 , OUTC2 , OUTB3 ↑ Pulse Width Minimum Pulse Width of PWM Rise Time CKI*OUTAn ~ OUTCnCKO/SDOOUTAn ~ OUTCnFall TimeCKO/SDOOUTAn ~ OUTCnFrequencyCKI* Internal Oscillator*The maximum frequency may be limited by different application conditions. Please refer to the application note for details.- 10 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSymbo l tSU tHD tPHL1 tPHL2 tPHL3 tPHL4 tPHL5 tPHL6 tPLH3 tPLH4 tPLH5 tPLH6 tw(I) tWDM tOR tOR1 tOF tOF1 FCKI FOSC VLED=4V VDS=1.0V VIH=VDD VIL=GND IOUT=20mA RL=150 CL=10pF C1=4.7uF C2=0.1uF C3=4.7uF CCKO=8pF CSDO=8pFSwitching Characteristics (VDD=3.3V, Ta=25°C)Characteristics Setup Time Hold Time SDI–CKI↓ CKI↓–SDI CKI↑–CKO↓ CKI↓–SDO↑↓ GCLK↑– OUTB0 , OUTA1 , Propagatio n Delay Time (“H” to “L”)OUTB2 ↓ConditionMin. 7.5 7.5 32 40 48 56 32 40 48 56 20 38 3.0 12.0 3.0 30.0 0.2 -Typ. 50 38 40 48 56 64 40 48 56 64 6.0 18.0 6.0 35.0 24.0Max. 48 56 64 72 48 56 64 72 9.0 24.0 9.0 40.0 10 -Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHzGCLK↑– OUTC1 , OUTA3 ,OUTC3↓ ↓GCLK↑– OUTA0 , OUTC0 ,OUTA2GCLK↑– OUTB1 , OUTC2 , OUTB3 ↓ GCLK↑– OUTB0 , OUTA1 ,OUTB2 ↑Propagatio n Delay Time (“L” to “H”)GCLK↑– OUTC1 , OUTA3 ,OUTC3↑ ↑GCLK↑– OUTA0 , OUTC0 ,OUTA2GCLK↑– OUTB1 , OUTC2 , OUTB3 ↑ Pulse Width Minimum Pulse Width of PWM Rise Time CKI*OUTAn ~ OUTCnCKO/SDOOUTAn ~ OUTCnFall TimeCKO/SDOOUTAn ~ OUTCnCKI* Frequency Internal Oscillator*The maximum frequency may be limited by different application conditions. Please refer to the application note for details.- 11 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsTest Circuit for Electrical / Switching Characteristics- 12 -October 2011, V2.00

MBI6024Timing WaveformPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSignal Input and Output with Phase-inversed Output ClockOutput Timing- 13 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsPrinciple of OperationMBI6024 provides SPI-like interface (CKI, SDI), a two-wire transmission interface, to address the data, so that MBI6024 receives the data directly without a latch command. The sequence of operation should follow the steps below: Step 1. Set the configuration register Step 2. Send the dot correction data Step 3. Send the gray scale data MBI6024 receives the data packet containing targeted gray scale (GS) data from the controller, and turns on the output channels according to the gray scale data. The gray scale clock of PWM generator, GCLK, is generated by the embedded oscillator.Control Interface: SPI-Like Interface (CKI, SDI)MBI6024 adopts the SPI-like interface (CKI/SDI). By SPI-like interface, MBI6024 samples the data (SDI) at the falling edge of the clock (CKI).The following waveforms is the example of the SPI-like interface.Phase-inversed Output Clock MBI6024 enhances the capability of cascading MBI6024 by phase-inversed output clock function. By phase-inversed output clock, the clock phase will be inversed from CKI to CKO to eliminate the accumulation of the pulse width deviation. This improves the signal integrity of data transmission. The following chart illustrates the phase-inversed output clock results.Original: CKI1 Original: CKO1 Phase-Inverse Clock I:CKO2 Phase-Inverse Clock II: CKO3- 14 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsThe Structure of Data PacketMBI6024’s data packet contains three parts: 1. Prefix: The prefix is a symbol of “Silent-to-Reset”, i.e. a time period for MBI6024 to distinguish two data packets. During the prefix, both CKI and SDI should be tied-low and stop for more than 172 CKI cycles. 2. Header: The header defines the cascaded IC numbers and also contains a command to decide the data type. 3. Data: This is the data for each IC. It may be gray scale data, dot correction data, or configuration data. Structure of a data packet:PrefixHeaderData- 15 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsSetting the Data Types by the CommandMBI6024 provides six kinds of commands and input data types shown as the table below: Command H[5:0] 6’b11 1111 6’b10 1011 6’b11 0011 6’b10 0111 6’b10 0011 6’b11 0111 Data Type 16-bit gray scale data 10-bit gray scale data 8-bit dot correction data 6-bit dot correction data 16-bit configuration data 10-bit configuration dataOnce MBI6024 receives the SDI=1 (1’b1), MBI6024 will start to check if the data is a valid command or not. If the 6-bit data is a valid command, the driver will latch the specific data according to the protocol. If the 6-bit data is not a valid command, MBI6024 will wait for another SDI=1 (1’b1) to check the validity of the next command. Time-Out Reset for Transmission Abort Time-out reset is to prevent ICs from misreading during the data transmission. If the CKI is tied-low for more than 95 CKI cycles, MBI6024 may identify the wires as disconnection. To prevent from misreading, MBI6024 will ignore the present input data and continuously show the previous image data until the next image data is correctly recognized. The Prefix in the Beginning of a Data Packet MBI6024 identifies the data as a new data packet after time-out, so the prefix in the beginning of a data packet should be more than 172 CKI cycles. If both CKI and SDI are tied-low and stop for more than the setting of CKI time-out period, MBI6024 will start to check the valid command of the next data packet. The prefix between two data packets helps MBI6024 identify the data packet correctly. The following timing diagram illustrates the interval between two data packets in 16-bit gray scale mode.The prefix > 172 CKI cycles- 16 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsDefinition of Configuration RegisterMBI6024 provides two configuration register sections: configuration register 1 (CF1) and configuration register 2 (CF2) as defined in the tables below.Configuration Register 1 (CF1):MSB Bit Default Value 9 10 8 7 0 6 11 5 4 1 3 1 2 11 1 LSB 0 0Note: Bit [15:10] should be set as “0” to avoid signal misjudgment. Bit Definition Value 11 9:8 GCLK frequency 10 (default) 01 00 7 6:5 4 Dot correction mode Reserved PWM counter reset PWM data synchronization Phase-inversed output clock Parity check 0 (default) 1 11 (default) 1 (default) 0 1 (default) 0 11 (default) 1 0 (default) Function GCLK=frequency of internal oscillator, i.e. 24MHz (typical). GCLK=oscillator frequency divided by two, i.e. 12MHz (typical). GCLK=oscillator frequency divided by four, i.e. 6MHz (typical). GCLK= oscillator frequency divided by eight, i.e. 3MHz (typical). enable dot correction, bypass dot correction Must fill in ‘11’ Reset PWM counter after programming configuration register Do not reset PWM counter after programming configuration register Automatic synchronization Manual synchronization The waveform is inversed from CKI to CKO; please set the two bits as 2b’11. Other combinations are reserved for internal tests. Enable Disable32:10- 17 -October 2011, V2.00

MBI6024GCLK FrequencyPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsMBI6024 provides four kinds of internal GCLK frequency, which is the internal oscillator frequency divided by 1, 2, 4, and 8, for different applications according to the bits of CF1[9:8]. The internal oscillator frequency is 24MHz (typ.); e.g. if the internal oscillator frequency is divided by 8, the GCLK frequency is 3MHz. Higher GCLK frequency provides higher visual refresh rate, but also higher EMI. If the output current is larger than 40mA, the GCLK frequency is suggested to be lower than 8MHz to keep good linearity at low gray scale level. Dot Correction Mode MBI6024 also provides 8-bit or 6-bit dot correction in 16-bit or 10-bit gray scale mode respectively. Dot correction control helps compensate LED brightness and reduces the loading of calculation in controllers. In addition, with the built-in multiplier, MBI6024 operates dot correction without sacrificing the visual refresh rate. PWM Counter Reset MBI6024 can optionally reset the PWM counter by setting the bit of CF1[4] after programming configuration register. The default setting is to reset the PWM counter to start a new PWM cycle to align the PWM output data for new setting. PWM Data Synchronization MBI6024 is also flexible for either manual-synchronization or auto-synchronization by setting the bit of CF1[3]. For auto-synchronization, the bit of CF1[3] is set to “1” (default). MBI6024 will automatically process the synchronization of previous data and next data for PWM counting. The next image data will be updated to output buffers and start PWM counting when the previous data finishes one internal PWM cycle. For manual-synchronization, the bit of CF1[3] is set to “0”. Once the next input data is correctly recognized, MBI6024 will stop the present PWM cycle and restart a new PWM cycle to show the new data immediately. The advantage of manual-synchronization is to maintain the synchronization of image frames between ICs, but the PWM cycle may not be finished, so the gray scale accuracy is slightly affected. Since S-PWM scrambles the 16-bit PWM cycle into 64 small periods, the gray scale accuracy remains good. For better gray scale performance, auto-synchronization keeps accurate gray scale especially when using the built-in oscillator, but the drawback is the synchronization of image frames between ICs. Parity Check Parity check is to check the data in the header for any error, especially to prevent the configuration register and dot correction register from miswriting.- 18 -October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsConfiguration Register 2 (CF2):Default Value MSB Bit Value 2 1 111 LSB 0Note: Bit [15:3] should be set as “0” to avoid signal misjudgment. Bit 2 1:0 Definition Reserved Reserved Value 1 (default) 11 (default) Function Must fill in ‘1’ Must fill in ‘11’16-bit Configuration DataFor 16-bit configuration data, each word is 16 bits. Each MBI6024 needs 3 words (3x16=48 bits) for the configuration data. However, each configuration data has only 10 bits, and the MSB 6 bits of each word are invalid. Prior to the configuration data, there is a 48-bit header. MBI6024 provides parity check function to check the count of bit to prevent the data transmission error. The data format is shown below:Prefix Both CKI and SDI should be tied-low and stop for more than 172 CKI cycles. 48-bits header Bit Definition 47:42 H[5:0] 41:32 A[9:0] 31:26 25:16 H[5:0] L[9:0]Value 100011 0000000000 100011 N-1 N=Number of IC in seriesFunction The command of 16-bit configuration data Address data. Always send 10’b 0000000000 Double check the command. It should be the same as the prior H[5:0], otherwise the data packet will be ignored. Set the number of IC in series P[3:0] are parity check bits, If it is incorrect, the data packet will be ignored. P[0] is the parity check bit of L[9:0] P[0]=1 if the count of “1” within L[9:0] is odd; P[0]=0 if the count of “1” within L[9:0] is even.15:12P[3:0]0000~1111P[1] is the parity check bit of A[9:0] P[1]=1 if the count of “1” within A[9:0] is odd; P[1]=0 if the count of “1” within A[9:0] is even. P[2] is the parity check bit of H[5:0] P[2]=1 if the count of “1” within H[5:0] is odd; P[2]=0 if the count of “1” within H[5:0] is even. - 19 October 2011, V2.00

MBI6024PWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsP[3] is the parity check bit of P[2:0] P[3]=1 if the count of “1” within P[2:0] is odd; P[3]=0 if the count of “1” within P[2:0] is even.11:10 9:0X1[1:0] L[9:0]XX N-1 N=Number of IC in seriesDon’t care. The value is suggested to be “0”. Double check the number of IC in series48-bit configuration data Bit Definition Value Function X2[5:0] are “don’t care” bits. The value is suggested to be “0”. CF1N[9:0] are 10 bits data of configuration register 1 (CF1). The 2nd 47:0 X2[5:0]~CF1N[9:0]~ X2[5:0]~CF1N[9:0]~ X3[12:0]~CF2N[2:0] CF1[9:0] double checks the data of configuration register bank 1 48b’0~48b’1 (CF1). It should be the same as the 1st CF1N[9:0]; otherwise the data will not be written into register. X3[12:0] are “don’t care” bits. The value is suggested to be “0”. CF2N[2:0] are 3 bits data of configuration register 2 (CF2) The configuration data of the last IC is sent first, followed by the previous ICs, and the first IC’s configuration data is sent in the end of the packet.- 20 -October 2011, V2.00

MBI602410-bit Configuration DataPWM-Embedded 3x4-Channel Constant-Current Sink Driver for LED StripsFor 10-bit configuration data, each word is 10 bits. Each MBI6024 needs 3 words (3x10=30 bits) for the configuration data. Prior to the configuration data, there is a 30-bit header. MBI6024 provides parity check function to check the count of bit to prevent the data transmission error. The data format is shown below:Prefix Both CKI and SDI should be tied-low and stop for more than 172 CKI cycles. 30-bit header Bit Definition 29:24 H[5:0]Value 110111Function The command of 10-bit configuration data P[3:0] are parity check bits, If it is incorrect, the data packet will be ignored. P[0] is the parity check bit of L[9:0]. P[0]=1 if the count of “1” within L[9:0] is odd; P[0]=0 if the count of “1” within L[9:0] is even. P[1] is the parity check bit of A[9:0] P[1]=1 if the count of “1” within A[9:0] is odd; P[1]=0 if the count of “1” within A[9:0] is even. P[2] is the parity check bit of H[5:0] P[2]=1 if the count of “1” within H[5:0] is odd; P[2]=0 if the count of “1” within H[5:0] is even. P[3] is the parity check bit of P[2:0] P[3]=1 if the count of “1” within P[2:0] is odd; P[3]=0 if the count of “1” within P[2:0] is even. Address data. Always send 10’b 0000000000 Set the number of IC in series23:20P[3:0]0000~111119:10 9:0A[9:0] L[9:0]0000000000 N-1 N=Number of IC in series Value30-bit configuration data Bit DefinitionFunction CF1[9:0] are 10 bits data of configuration register 1 (CF1). The 2nd CF1[9:0] double checks the data of configuration29:0CF1N[9:0]~CF1N[9: 0]~X4[6:0]~CF2N[2 :0]30b’0~30b’1register 1 (CF1). It should be the same as the 1st CF1[9:0]; otherwise the data will not be written into register. X4[6:0] are “don’t care” bits. The value is suggested to be “0”. CF2[2:0] are 3 bits data of configuration register 2 (CF2)The configuration data of the last IC is sent first, followed by the previous ICs, and the first IC’s configuration data is sent in the end of the packet.- 21 -October 2011, V2.00

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