北邮数电实验电子沙漏实验报告

数字电路与逻辑设计实验报告

选题：电子沙漏的设计与实现 班级： 学号： 姓名： 序号：

2014年11月12日

一、任务要求： 1、相关知识：

沙漏是一种古老的计时工具，也是一种玩具。电子沙漏用发光二极管表示沙粒，模拟沙漏的运动过程。电子沙漏会像真正的沙漏一样，上部的沙粒（点亮的发光二极管）一粒一粒往下掉，下部的沙粒一粒一粒堆起来。 在结构上，两组各16 个发光二极管分别排列成为两个三角形，如图1 所示。其中：VD0 ～VD15位于上部，排列成倒三角形；VD0'～VD15'位于下部，排列成正三角形。两个三角形的顶尖相对，组成沙漏形状。当上部有一个发光二极管熄灭时，相应地下部就有一个发光二极管点亮，模拟了沙粒的运动。

2、基本要求：

① 采用8*8双色点阵显示电子沙漏的开机界面，如图2所示。其中红色LED代表沙漏的上半部分沙粒VD0～VD15，绿色LED代表沙漏的下半部分VD0'～VD15'。

② 用拨码开关SW1模拟重力感应器。当SW1为低电平时，沙粒从VD0～VD15向VD0'～VD15'移动；当SW1为高电平时，沙粒从VD0'～VD15'向VD0～VD15移动。

③ 按键BTN0作为计时启动停止按键，启动后沙粒即可按照SW1设定的方向移动，以SW1为低电平时为例，LED移动的顺序与对应关系如图3的1～16所示（若SW1为高电平，则点阵显示移动顺序为16～1）。每颗沙粒的移动时间为1秒，当移动到图3的16时，若SW1仍为低电平，则保持沙粒不动，但计时继续，直到SW1的电平发生变化或者BTN0计时停止。

④ 设计实现一个60秒计时器，当按键BTN0启动时开始工作，用于在沙粒移动过程中进行计时校准，并用数码管DISP0～DISP1显示计时结果。

3、提高要求：

① ② ③ ④ ⑤

可以调节控制电子沙漏的流动速度。 用多种方式呈现电子沙漏界面。

自行设定沙粒的移动路径，显示每颗沙粒的移动过程。 外接重力感应器，实现真实的电子沙漏功能。 自拟其它功能。

二、系统设计：

总体框图：

时钟

防抖模块 输入 主程序 译码模块 输出译码 数码管、点阵显示 分块设计：

① 输入模块：由btn按钮和拨码开关构成。采用序列存储的方式存储相应的输入。

② 输入译码模块：将输入的符号序列转化成先用状态，以便选取对应的计算方法；将输入的8421bcd码转化成相应的两位十进制数。

③ 数码管、点阵显示模块：将寄存器内的数进行输出到数码管上。

④ 防抖模块：在用按键输入时，所得到的信号可能 会有抖动，因此加入此抖动电路。

流程图：

end process ;

clkout2<=clktmp2;

p8:process(bto_out,clkout1,sw) --ji shu qi begin

if (bto_out='0') then elsif(bto_out1='1') then

q<=0;p<=0; zhuang tai ji shu

elsif (q=60) then else

if (clkout1'event and clkout1='1' ) THEN q<=q+1; end if;

if (clkout2'event and clkout2='1' ) THEN if(sw='0' ) then if(p<16) then p<=p+1; else end if;

elsif(sw='1' ) then if(p>0) then p<=p-1; else

end if; end if; end if; end if; end process ; shi<=q/10;

ge<=q rem 10;

p9:process(cat_kongzhi,ge,shi) begin

if cat_kongzhi=0 then cat<=\ case ge is

when 0 =>a<=\ when 1 =>a<=\ when 2 =>a<=\ when 3 =>a<=\ when 4 =>a<=\ when 5 =>a<=\

--q:miao zhong ji shu,p:dian zhen when 6 =>a<=\ when 7 =>a<=\ when 8 =>a<=\ when 9 =>a<=\ --when others =>a<=\ end case;

elsif cat_kongzhi=1 then cat<=\ case shi is

when 0 =>a<=\ when 1 =>a<=\ when 2 =>a<=\ when 3 =>a<=\ when 4 =>a<=\ when 5 =>a<=\ when 6 =>a<=\ when 7 =>a<=\ when 8 =>a<=\ when 9 =>a<=\ --when others =>a<=\ end case; end if; end process ; p10:process(p) begin case p is when 0 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\

when others =>hang<=\ end case; when 1 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 2 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 3 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 4 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 5 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\

when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 6 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 7 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\

when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 8 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 9 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\

when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 10 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 11 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\

when others =>hang<=\ end case; when 12 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 13 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 14 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 15 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\ when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case; when 16 =>

case dz_kongzhi is

when 0 =>hang<=\

lieh<=\ when 1 =>hang<=\

lieh<=\

when 2 =>hang<=\

lieh<=\ when 3 =>hang<=\

lieh<=\ when 4 =>hang<=\

lieh<=\ when 5 =>hang<=\

lieh<=\ when 6 =>hang<=\

lieh<=\ when 7 =>hang<=\

lieh<=\ when others =>hang<=\ end case;

end case; end process ; end;

五、功能说明及资源利用情况：

本次实验完成了题目的所有基本要求以及调节速度的提高要求，即用8*8双色点阵模拟了电子沙漏，实现了沙粒的流动；用拨码开关sw1模拟了重力感应器；用DISP0~DISP1模拟了60秒计时器；用按键btn0控制启动和暂停，btn1实现复位，btn2实现三种速度的切换。

器件资源使用情况如下：

Total logic elements：2721270（21%） Total pins：42/116(36%)

管脚定义如下

六、故障及问题分析：

① 编写VHDL源程序时，应确保实体名与工程名一致，否则会发生编译错误； 存盘时也要确保文件名与工程名一致；

② 下载后按键没有反映，检查代码多次后发现是管脚设置出错，由于粗心浪费了很多时间。

③ vhdl里面并列的语句之间要写分号，而不能写逗号。 ④ 各个process之间为并行关系，编写代码时经常造成冲突。 在编写代码前就规划好全局，理清各个模块的关系，做到统筹全局。

七、总结和结论：

数字电路与逻辑设计实验对我来说是一个巨大的挑战，这是我第一次独立编写一个如此复杂的VHDL程序，经过了四周的努力终于成功实现了题目的要求。

虽然上学期也编写过VHDL程序，但上学期的内容都是比较简单的小程序，所以当我看到本学期的实验题目时有些无从下手。不过第一节课时老师就要求我们设计了系统的各个模块和总体框图，这样让我们对程序的全局有了更好的认识，在后来的编程过程中有了全局意识，少走了许多弯路。

本次实验让我进一步了解了VHDL语言，并基本掌握了VHDL语言的编写方法，对于如何独立编写一个完整的VHDL程序有了更深刻的认识。我更懂得了设计实验的难点并不是代码的编写，而是系统模块的划分和设计，规划好全局后在着手编写代码会事半功倍。

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