CCS 教程 培训资料
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CCS 教程 培训资料
DSP C5000Chapter 3 Addressing Modes
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
ObjectivesPresent the main addressing modes and allocation of sections Present the main addressing modes of the C54 family Present the main addressing modes of the C55 family Explain how to use these addressing modes Do exercises to practice using the different addressing modesESIEE, Slide 2 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
OutlineGeneralities on addressing modes C54x
C55x
ESIEE, Slide 3
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Addressing Modes: What are the Problems?Specify operands per instruction:A single instruction can access several operands at a time thanks to the many internal data busses, But how do we specify many addresses using a small number of bits?
Repeated processing on an array of data:Many DSP operations are repeated on an array of data stored at contiguous addresses in data memory. There are cases where it is useful to be able to modify the addresses as part of the instruction (increment or decrement).ESIEE, Slide 4 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Main Addressing Modes of C5000 FamilyImmediate addressing Absolute addressing Direct addressing Indirect addressing by registerSupport for circular indirect addressingDefinition
Access to Memory Mapped Registers MMRs
ESIEE, Slide 5
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Allocating Sections
ESIEE, Slide 6
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
ExampleSystem Diagram Algorithm y= x1+ x0+ x2DROM init[3] EPROM (code) RAM x[3] C5000 CPU RAM y
ProcedureAllocate sections (code, constants, vars) Setup addressing modes Add the values (x1+ x0+ x2) Store the result (y) How do we allocate the proper sections?ESIEE, Slide 7 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Writing relocatable codeThe programmer should not have to give the exact addresses:where to read the code in program memory, where to read the data in data memory.
The assembler allows to use symbolic addresses. The assembler and the linker work with COFF files:COFF= Common Object File Format. In COFF files, specialized sections are used for code, variables or constants. The programmer specifies in a command file for the linker where the different sections should be allocated in the memory of the system.ESIEE, Slide 8 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Definition of SectionsDifferent sections for code, vars, constants. The sections can be initialized or not.An initialized section is filled with code or constant values. An uninitialized section reserves memory space for a variable.
The sections can have default names or names given by the programmer.
ESIEE, Slide 9
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Definition and names of SectionsThe programmer uses special directives to identify the sections.Initialized sections code Variables Code or c
onstants Unitialized sections, reserve space for data
Named sections, name given by user Unnamed sections, default nameESIEE, Slide 10
.sect
.usect
.text
.data
.bss
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Example of sections.sect”init" tbl .int 1,2,3 x y .usect"vars",3 .usect"result",1 .sect“code”Initialized named section: Initialization of constants. Definition of address tbl Uninitialized named section: x[3], y[1], Definition of address x and y. Initialized named section: code
System Diagram How are these sections placed into the memory areas shown?DROM tbl[3] EPROM codeESIEE, Slide 11
RAM x[3] 54x CPU RAM y
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
C54x Addressing Modes
ESIEE, Slide 12
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Format of Data and Instructions, Internal Busses of the C54x FamilyIn the C54x DSP, the data and program memories are organized in 16-bit words. Data busses have a 16-bit width. Data and instructions are generally of size N=16 bits. Some instructions may take several 16-bit words. Some data operands may be double precision and occupy 2 words. Internal busses: 2 data read, 1 data writeESIEE, Slide 13 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Terms from the User’s GuideTerm Smem Xmem Ymem lk dmad pmad src dst PA What it means 16-bit single data memory 16-bit dual data memory operand used in dual-operand instructions and some single-operand instructions. Read through D bus. 16-bit dual data-memory operand used in dual-operand instructions. Read through C bus. 16-bit long 16-bit immediate data memory address (0 - 65,535) 16-bit immediate program memory address (0 - 65,535) This includes extended program memory devices Source accumulator (A or B) Destination accumulator (A or B) 16-bit port (I/O) immediate address (0 - 65,535)
ESIEE, Slide 14
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Immediate Addressing Mode#Instruction contains the value of the operand. Value is preceded by#. ADD#4,A Example:Add the value 4 to the content of accumulator A.
Useful for initializations. Long (16 bits) or short values:For long values: instruction uses 2 words.
ESIEE, Slide 15
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Immediate Addressing Mode#16 bit value2 words, 2 cycles Initialization of ARi for exampleExample:
STM
#1234h,AR2
Load AR2 with the value 1234h.
Short value3, 5, 8, 9 bits constant 1 word, 1 cycle To initialize short length registers or bit fields:DP, ASM…Example:
LD
#6, DP
Load DP with the value 6.
Not always availableESIEE, Slide 16 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Example: MMR (Memory Mapped Registers) and Immediate Addressing.sect”init" tbl .int 1,2,3 x y .usect"vars",3 .usect"result",1 .sect“code” start: STM STM#tbl,AR1#x,AR2#tbl is the 16-bit address of the first element of the array tbl.STM (STore to Memory-mapped register) store
s an immediate value to the specified MMR or Scratch address.
0000 MMRs 0060 007F
MMR= Memory Mapped Registers
Scratch
Scratch memory
ESIEE, Slide 17
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Direct Addressing Mode@Direct addressing= random access from a specified base address.The instruction contains an offset relative to the base address.
The base address can be the beginning of a data memory page or the stack pointer.The data memory is virtually divided in 512 pages of 128 words (512x128= 216).
Data Page DP relative direct addressCPL bit (ComPiler Mode bit)= 0 in ST1
Stack Pointer SP relative direct addressCPL bit= 1 in ST1ESIEE, Slide 18 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Data memory pagesAddresses in Dec 0 Hex 0000 Page 0 128 0080 Page 1 256 0100 Page 2 128 words 128 words 128 words
Data memory
512 Pages
Page 511 65 535 FFFF
128 words
ESIEE, Slide 19
Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Direct Addressing Mode@For DP relative mode:The 16 bit address is split into 9 MSB and 7 LSB.The 7 LSB of the operand address are given in the instruction, The 9 MSB are in the DP register.
For SP relative modeThe 7 bits given in the instruction are used as an offset from the SP to obtain the address.
In both cases, only 7 bits are used in the instruction for the operand address.ESIEE, Slide 20 Copyright 2003 Texas Instruments. All rights reserved.
CCS 教程 培训资料
Direct Addressing Mode@DP relative, CPL= 0 Instruction 15 - 8 Opcode 7 I=0 6-0 dma
DP register Address
9-bit DP 9-bit DP 7-bit dma
SP relative, CPL= 1 SP Register 16-bit Stack Pointer
+Address
7-bit dma
16-bit Data Memory Address
ESIEE, Slide 21
Copyright 2003 Texas Instruments. All rights reserved.
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