dsp实验全部程序

实验1_常用指令实验

;File Name:exp01.asm

;the program is compiled at no autoinitialization mode .mmregs .global _main _main: stm #3000h,sp ssbx xf ;将XF置1 call delay ;调用延时子程序,延时 rsbx xf ;将XF置0 call delay ;调用延时子程序, b _main ;程序跳转到\ nop nop

;延时子程序 delay: stm 270fh,ar3 loop1: stm 0f9h,ar4 loop2: banz loop2,*ar4- banz loop1,*ar3- ret nop nop .end

实验2_数据存储

*File Name:exp02.asm

;get some knowledge of the cmd file

;the program is compiled at no autoinitialization mode .mmregs .global _main _main:

;store data stm 1000h,ar1 ;address of internal memory rpt #07h st 0bbbbh,*ar1+ ;将数据\存放到以地址1000H~1007H的八个存储单元中. ;read data then re-store stm 7h,ar3 stm 1000h,ar1 stm 1008h,ar2

loop: ;循环的将1000H~1007H的八个单元中的数据COPY到1008H~100F的 ;八个存储单元中. ld *ar1+,t

st t,*ar2+ banz loop,*ar3- .end

实验3_ IO实验

;File Name :exp03.asm

;learn how to operate the I/O ports ;get some knowledge of the rts.lib file ;in the I/O space 0x8000=>8 switches ; 0x8001=>8 LEDs .mmregs .global _main .text _main: stm 3100h,sp stm 1000h,ar1 portr 8000h,*ar1 ;读入I/O 8000H数据,将其存储到数据空间的1000H nop ;NOP为空操作,起延时作用. nop portw *ar1,8001h ;将数据空间的1000H单元的数据,写出到I/O 8000H nop nop b _main ;程序跳转到\执行. nop nop

.end

实验4_定时器实验

.mmregs .global _initial _initial: NOP LD #0, DP ; reset data pointer STM #0, CLKMD ; software setting of DSP clock STM #0, CLKMD ; (to divider mode before setting) TstStatu1:

LDM CLKMD, A

AND #01b, A ;poll STATUS bit BC TstStatu1, ANEQ STM #0xF7FF, CLKMD ; set C5402 DSP clock to 10MHz STM 0x3FA0, PMST ; vectors at 3F80h stm 300h,ar1 ;initial 300h data address st #00h,*ar1 ssbx 1,11 ;set ST1.INTM=1,stop all interrrupt stm 0ffffh,ifr ;clear all interrupt indicate

stm 00h,imr ;set imr=0,stop all interrrupt stm 410h,tcr ;stop timer stm 4e1fh,prd ;set prd=4e1fh stm 420h,tcr ;start timer stm 08h,imr ;allow timer interrupt rsbx 1,11 ;set ST1.INTM=0,start all interrrupt ret

实验5_INT中断实验 .mmregs .global _initial .text _initial: NOP LD #0, DP ; reset data pointer STM #0, CLKMD ; software setting of DSP clock STM #0, CLKMD ; (to divider mode before setting) TstStatu1:

LDM CLKMD, A

AND #01b, A ;poll STATUS bit BC TstStatu1, ANEQ STM #0xF7FF, CLKMD ; set C5402 DSP clock to 10MHz STM 0x3FA0, PMST ; vectors at 3F80h ssbx 1,11 ; set st1.intm=1 stop all interrupt stm #00h,imr ;stop all interrupt stm #0ffffh,ifr ;clear all interrupt sign stm #04h,imr ;allow int2 interrupt rsbx 1,11 ;allow all interrupt ret .end

实验6_AD转换实验 .global _InitC5402 .global _OpenMcBSP .global _CloseMcBSP .global _READAD50 .include MMRegs.h _InitC5402: NOP LD #0, DP ; reset data–page pointer STM #0, CLKMD ; software setting of DSP clock STM #0, CLKMD ; (to divider mode before setting) TstStatu1:

LDM CLKMD, A

AND #01b, A ;poll STATUS bit

BC TstStatu1, ANEQ STM #0xF7FF, CLKMD ; set C5402 DSP clock to 10MHz ******* Configure C5402 System Registers ******* STM #0x7fff, SWWSR ; 2 wait cycle for IO space & STM #0x0000,BSCR ; set wait states for bank switch: STM #0x1800,ST0 ; ST0 at default setting STM #0x2900,ST1 ; ST1 at default setting(note:INTM=1) STM #0x00A0,PMST ; MC mode & OVLY=1, vectors at 0080h ******* Set up Timer Control Registers ******* STM #0x0010, TCR ; stop on–chip timer0 STM #0x0010, TCR1 ; stop on–chip timer1 ******* Initialize McBSP1 Registers ******* STM SPCR1, McBSP1_SPSA ; register subaddr of SPCR1 STM #0000h, McBSP1_SPSD ; McBSP1 recv = left–justify STM SPCR2, McBSP1_SPSA ; register subaddr for SPCR2 ; XINT generated by frame sync STM #0000h, McBSP1_SPSD ; McBSP1 Tx = FREE(clock stops ; to run after SW breakpoint STM RCR1, McBSP1_SPSA ; register subaddr of RCR1 STM #0040h, McBSP1_SPSD ; recv frame1 Dlength = 16 bits STM RCR2, McBSP1_SPSA ; register subaddr of RCR2 STM #0040h, McBSP1_SPSD ; recv Phase = 1 ; ret frame2 Dlength = 16bits STM XCR1, McBSP1_SPSA ; register subaddr of XCR1 STM #0040h, McBSP1_SPSD ; set the same as recv STM XCR2, McBSP1_SPSA ; register subaddr of XCR2 STM #0040h, McBSP1_SPSD ; set the same as recv STM PCR, McBSP1_SPSA ; register subaddress of PCR STM #000eh, McBSP1_SPSD ; clk and frame from external (slave) ; FS at pulse–mode(00)

******* Finish DSP Initialization ******* STM #0x0000, IMR ; disable peripheral interrupts STM #0xFFFF, IFR ; clear the intrupts’ flags RET ; return to main NOP NOP

******* Waiting for McBSP0 RX Finished ******* IfRxRDY1: NOP STM SPCR1, McBSP1_SPSA ; enable McBSP1 Rx LDM McBSP1_SPSD, A AND #0002h, A ; mask RRDY bit BC IfRxRDY1, AEQ ; keep checking NOP NOP RET ; return NOP NOP

******* Waiting for McBSP0 TX Finished *******

IfTxRDY1: NOP STM SPCR2, McBSP1_SPSA ; enable McBSP1 Tx LDM McBSP1_SPSD, A AND #0002h, A ; mask TRDY bit BC IfTxRDY1, AEQ ; keep checking NOP NOP RET ; return NOP NOP

****************************************** ****************************************** _OpenMcBSP: stm 1000h,ar0 st 00,*ar0 portw *ar0,8001h ;reset AD50 XF=0 NOP call wait NOP NOP NOP STM SPCR1, McBSP1_SPSA ; enable McBSP1 RX for ADC data in LDM McBSP1_SPSD,A OR #0x0001, A STLM A, McBSP1_SPSD STM SPCR2, McBSP1_SPSA ; enable McBSP1 TX for DTMF out LDM McBSP1_SPSD,A OR #0x0001, A STLM A, McBSP1_SPSD LD #0h, DP ; load data page 0 rpt #23 NOP stm 1000h,ar0 st 0xff,*ar0 portw *ar0,8001h ;out reset aD50 XF=1 NOP NOP nop nop

CALL IfTxRDY1 ;initial ad50 register STM #0x0001, McBSP1_DXR1;request secondary communication NOP CALL IfTxRDY1 STM #0100h, McBSP1_DXR1;write 00h to register 1 15+1bit mode CALL IfTxRDY1 STM #0000h, McBSP1_DXR1

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