GIGABYTE_8I845GE775-G_-_REV_10 ALC850 8110S 8712 FWH FAN5019

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技嘉主板电路图

8I845GE775-GSHEETD

Revision 1.0 SHEET 24 25 26 27 28 29 30 31 32 33 34 35 36 TITLED

TITLE COVER SHEET BOM& PCB MODIFY HISTORY BLOCK DIAGRAM P4_775 CPU P4_775 CPU P4_775 CPU P4_775 CPU GMCH-BROOKDALE-G_A GMCH-BROOKDALE-G_B GMCH-BROOKDALE-G_C DDR SERIAL TERMINATION DDR1& DDR2 DDR3& DDR TERM. AGP SLOT ICH4_1 ICH4_2 FWH ICS950211AF CLOCK GEN PCI1& PCI2 SLOT PCI3& PCI4 SLOT PCI5 SLOT LPC IO ITE 8702& FLOPPY& FAN FRONT USB2.0

01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23

Digitally signed by dd DN: cn=dd, o=dd, ou=dd, email=dddd@, c=US Date: 2009.10.23 06:53:06+07'00'

FRONT PANEL IDE CONNECTOR PS/2 K/B& M/S COM& PRT PORT AC97 CODEC LINE OUT/IN/MIC/FRONT AUDIO& GAME VGA CONNECTOR MISC. PWR& ATX POWER VCORE PWM(FAN5093) DDR POWER REALTEK8110C PCI ROUNTING GPIO PIN LIST

GIGABYTETitle

COVER SHEETSize Document Number Custom Date:5 4 3 2

Rev

8I845GE775-GSheet1

1.01 of 36

Thursday, April 07, 2005

技嘉主板电路图

Model Name: GA-8I845GE775-G Version:1.0D

Circuit or PCB layout change for next version DATE Change Item2005.01.13 2005.03.10 0.1 GERBER OUT. 1.0 GERBER OUT.

ReasonD

Component value change history

293.95x210. 5 mil 60±15% C Type

DATE2005.01.17 2005.03.11

Change Item0.1 NEW BOM RELEASE 1.0A BOM RELEASE ATX USE: 11NH4-020020-61/-62

Reason

Add EMI solution. ACN1,ACN2=180P Add U12 SST 49LF003B 2nd source Clock Gen change to RTM350-110R Add 9701 for USB Drop Issue

Add 0.1u at SLP_S3- but no pop BC9 Add VCC E-CAPx2 but pop 1 EC1

CPU RM REMOVE Main stream 1.4 or performance Homer: DC8:150P, DR32:100ohm, DR28:0, DR31:120K, DR6,DR7,DR8:100K

DL1 change to 11NH2-011507-01 wire.

2005.03.31

1.0B BOM DU2 change to 10TA1-605019-10 Add Q28 to minimum Q27 temperature. Only Q27 run 3D will reach 100C Package

GIGABYTETitle

BOM& PCB MODIFY HISTORYSize Custom Date:5 4 3 2

Document Number

Rev

8I845GE775-GThursday, April 07, 20051

1.02 of 36

Sheet

技嘉主板电路图

BLOCK DIAGRAMINTEL Pentium4 (775)D

CLOCK GENERATORVID0~4CKVDD= 3.3V

PWM/OTHER POWERVCORE= 1.75V/ SLEEP: 1.3V VCC3

PAGE 18

PAGE 4, 5, 6, 7

VCORE= 1.75V (650-1100MHZ)/ SLEEP: 1.3V 5VSB,-12V,+12V,VCC,VCC3,3VDUAL VTT_DDR,2_5VSTR

PAGE 31,32,33

AGP SLOT 4XVDDQ= 1.5V (AGP POWER 4X) VCC3= 3.3V+12V= 12V 3VDUAL= 3.3V VCC= 5V

AGPUSB+/ -

DDR SDRAM DIMM X 3GCBE0~3ST0~2

GAD0~31 ADSTB0,ADSTB0ADSTB1,ADSTB1SBA0~7 SBSTB,SBSTB-

GMCH BROOKDALE-G-DDR

AGP BUS

MAA0~14 MAA_CPC1~5 MAB_CPC1~5 MDD0~63 -DQSD0~7 DM0~7

PAGE 14

VCORE= 1.75V/ SLEEP: 1.3V 2_5VSTR= 2.5V(MEMORY) VDDQ= 1.5V (AGP POWER 4X, HUBLINK)

2_5VSTR= 2.5V(MEMORY,SUSPEND POWER) VTT_DDR= 1.25V

PAGE 8,9, 10

PAGE 11,12,13

HL0~10 CONTROL BUS

HUB LINK

FRONT USB

CONN.

ICH4 REAR USB PORTSVCC= 5V VCC= 5V 5VSB= 5V 5VUSB= 5V VCC25= 2.5V(I/O,MEMORY/I,VLINK/I) 3VDUAL= 3.3V(SUSPEND POWER) VCC3= 3.3V RTCVDD= 3.3V

PAGE 23

IDE Primary and SecondaryPAGE 25

AMRUSB+/ -

PAGE 34

PAGE 15,16

FWHVCC= 5V VCC3= 3V

PCI BUSB

PAGE 17

PCI SLOT 1,2,3,4,5+12= 12V -12= -12V VCC= 5V VCC3= 3V 3VDUAL= 3V

PAGE 19,20,21

REALTEK 8110S LAN AC97 CODEC ALC850+12V= 12V VCC3= 3.3V VCC= 5V AVDD= 5V

LPC BUS

AC97 LINKPAGE 28

+12= 12V -12= -12V VCC= 5V VCC3= 3V 3VDUAL= 3V

LPC I/O ITE8712PAGE 34

FDD IR/CIR S_IRQVCC= 5V VCC3= 3V

PAGE 22

I/O PORTS:A

AUDIO PORTS:LIN_ OUT LINE_IN TELE CD_IN

FRONT AUDIO MICPAGE 29

COMA

COMB LPT PS2PAGE 27

FRONT PANEL/FANSTitle VCC= 5V 5VSB= 5V+12= 12V PVCC= 5V5 4 3 2

GIGABYTEBOM& PCB MODIFY HISTORYDocument Number Rev

PAGE 24

Size Custom Date:

8I845GE775-GThursday, April 07, 20051

1.03 of 36

Sheet

技嘉主板电路图

VCORE

BC1 BC2 10U/12/X/6.3V/X 10U/12/X/6.3V

BC3 BC4 BC5 10U/12/X/6.3V/X 10U/12/X/6.3V/X 10U/12/X/6.3V VTT_OR R1

Closed to Pin-H149.9/6/1 R2 100/6/1 C3 1U/6/Y/10V GTLREF C1 220P/4/N/25V

VCORED

BC11 0.01U/4/X/16V

BC6 BC7 10U/12/X/6.3V/X 10U/12/X/6.3V

BC8 10U/12/X/6.3V

VTT_OL RN122 8 6 4 2

P4A<8> HA[3..16] HA[3..16] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 L5 P6 M5 L4 M4 R4 T5 U6 T4 U5 U4 V5 V4 W5 N4 P5 K4 J5 M6 K6 J6 R6 G5 A03# A04# A05# A06# A07# A08# A09# A10# A11# A12# A13# A14# A15# A16# RSVD RSVD REQ0# REQ1# REQ2# REQ3# REQ4# ADSTB0# PCREQ# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# RSVD RSVD ADSTB1# ADS# BNR# HIT# RSP# BPRI# DBSY# DRDY# HITM# IERR# INIT# LOCK# TRDY# BINIT# DEFER# EDRDY# MCERR# D2 C2 D4 H4 G8 B2 C1 E4 AB2 P3 C3 E3 AD3 G7 F2 AB3 U2 U3 -HADS -BNR -HIT -HADS<8> -BNR<8> -HIT<8> -BPRI -DBSY -DRDY -HITM

7 5 3 1

TESTHI10 TESTHI9 TESTHI8

62/8P4R

-BPRI -DBSY -DRDY -HITM -IERR HINIT-HLOCK -HTRDY -DEFER -EDRDY<8><8><8><8> HINIT-<16,17> -HLOCK<8> -HTRDY<8> -DEFER<8> C2 33P/4/N/50V VTT_OL VTT_OL VTT_OL VTT_OL VTT_OL R6 R7 R8 62/6 62/6 62/6 -IERR -BR0<8> -HREQ0<8> -HREQ1<8> -HREQ2<8> -HREQ3<8> -HREQ4<8> -HADSTB0 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -HADSTB0 -HPCREQ AP0# AP1# CPU_TP1 CPU_TP2<8> HA[17..31] HA[17..31]<8> -HADSTB1 AB6 W6 Y6 Y4 AA4 AD6 AA5 AB5 AC5 AB4 AF5 AF4 AG6 AG4 AG5 AH4 AH5 AJ5 AJ6 AC4 AE4 -HADSTB1 AD5 BR0# TESTHI08 TESTHI09 TESTHI10 DP0# DP1# DP2# DP3# GTLREF RESET# RS0# RS1# RS2# F3 G3 G4 H5 J16 H15 H16 J17 H1 G23 B3 F5 A3 -BR0 TESTHI8 TESTHI9 TESTHI10 CPU_TP3 CPU_TP4 CPU_TP5 CPU_TP6 GTLREF -CPURST -RS0 -RS1 -RS2 -RS0<8> -RS1<8> -RS2<8> C4 22P/4/N/50V -CPURST<8> -BR0<8> -CPURST R18 R19 62/6 62/6 -EDRDY -HPCREQ CPU-SK/775

100U/2V/SPCAP

10U/12/X/6.3V X2CR1

VCORE

BC19 BC1/BC7+ BC37++++

BC18 100U/2V/SPCAP/X

BC19 100U/2V/SPCAP/X

BC36 BC37 100U/2V/SPCAP/X 100U/2V/SPCAP/X

BC5/BC4 BC18 BC6/BC8++ BC36 BC2/BC3 100U/2V/SPCAP

RM/478/BLACK

VCORE

10U/12/X/6.3V X2

BC21 BC20 BC14 BC15 10U/12/X/6.3V/X 10U/12/X/6.3V

/X 10U/12/X/6.3V/X 10U/12/X/6.3V/X

GIGABYTETitle

P4_LGA775-ASize Custom Date:5 4 3 2

Document Number Thursday, April 07, 2005

8I845GE775-GSheet1

Rev

1.0of 36

技嘉主板电路图

P4B<8> HD[0..15] HD[0..15] HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 -DBI0 STBN0 STBP0 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 -DBI1 STBN1 STBP1 B4 C5 A4 C6 A5 B6 B7 A7 A10 A11 B10 C11 D8 B12 C12 D11 A8 C8 B9 D00# D01# D02# D03# D04# D05# D06# D07# D08# D09# D10# D11# D12# D13# D14# D15# DBI0# DSTBN0# DSTBP0 D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DBI1# DSTBN1# DSTBP1 D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# DBI2# DSTBN2# DSTBP2 D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63# DBI3# DSTBN3# DSTBP3 G16 E15 E16 G18 G17 F17 F18 E18 E19 F20 E21 F21 G21 E22 D22 G22 D19 G20 G19 D20 D17 A14 C15 C14 B15 C18 B16 A17 B18 C21 B21 B19 A19 A22 B22 C20 A16 C17 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 -DBI2 STBN2 STBP2 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63 -DBI3 STBN3 STBP3 HD[32..47]<8>

<8> HD[16..31] HD[16..31]<8> -DBI0<8> STBN0<8> STBP0 -DBI2<8> STBN2<8> STBP2<8><8> -DBI1<8> STBN1<8> STBP1 G9 F8 F9 E9 D7 E10 D10 F11 F12 D13 E13 G13 F14 G14 F15 G15 G11 G12 E12 HD[48..63]<8> -DBI3<8> STBN3<8> STBP3<8> CPU-SK/775

GIGABYTETitle

P4_LGA775-CSize Custom Date:5 4 3 2

Document Number Thursday, April 07, 2005

8I845GE775-GSheet1

Rev

1.0of 36

技嘉主板电路图

VCC3

Note:VCCA& VCOREPLL define doesn't same as old P4 design kitVCCA 10UH/8/100mA/S(10LI2-00100A-01/02/03) C6 1U/6/Y/10V BC33 4.7U/8/Y/10V R17 0/SHT/X VSSA C7 1U/6/Y/10V BC32 4.7U/8/Y/10V VCOREPLL 10UH/8/100mA/S(10LI2-00100A-01/02/03)G

VCC3 R16 249/6/1

R12

110/6/1 R13 61.9/6/1

TESTHI0

Place outside ofC11 0.1U/6/Y/25V VTT_OL C5 0.1U/6/Y/25V R10 R11 R14 R15 R78 R88

CPU socketCOMP2 COMP3 COMP0 COMP1 COMP2 COMP3D

100/6/1 100/6/1 60.4/6/1 60.4/6/1 60.4/6/1/X 60.4/6/1/X

VTT_GMCH L1

D S

Q26 2N7002/SSOT23

Closed to Pin-H2VTT_OR R64 49.9/6/1/X R63 100/6/1/X C33 1U/6/Y/10V/X GTLREF1 C32 220P/4/N/25V/X

Trace width doesn't less than 12 Mil

<7,8> GTL_DET

TESTHI0 VTT_GMCH 7 5 3 1 R22

As close as possible to CPU socket<16> -SMI<16> -A20M<16> -FERR<16> INTR<16> NMI<16> -IGNNE<16> -STPCLK -SMI -A20M -FERR INTR NMI -IGNNE -STPCLK VCCA VSSA P2 K3 R3 K1 L1 N2 M3 A23 B23 D23 C23

P4C TESTHI0 TESTHI1 TESTHI11 TESTHI12

RN50 470/8P4R/X 8 6 4 2 62/6

FSBSEL2 FSBSEL0 FSBSEL1 TESTHI2_7

SMI# A20M# FERR#/PBE# LINT0 LINT1 IGNNE# STPCLK# VCCA VSSA RSVD VCCIOPLL VID0 VID1 VID2 VID3 VID4 VID5 RSVD

VCOREPLL VID0 VID1 VID2 VID3 VID4 VID5 TESTHI2_7 -FORCEPR RSVD_G6 -CPUSLP VTT_OL R76 R89 62/6/X 100/6 RSVD_G6<22,32> VID[0..5] VID[0..5] AM2 AL5 AM3 AL6 AK4 AL4

AM5 F28 G28 AE8 SLP# RSVD PWRGOOD PROCHOT# THERMTRIP# COMP0 COMP1 COMP2 COMP3 L2 AH2 N1 AL2 M2 A13 T1 G2 R1 -CPUSLP<16> CPUPWROK -PROCHOT -THRMTRIP COMP0 COMP1 COMP2 COMP3 CPUPWROK<16> -PROCHOT<26> -THRMTRIP<16> C8 1N/4/X/50V<18> CPUCLK<18> CPUCLKCPUCLK CPUCLKBCLK0 BCLK1 SKTOCC#<22> TMPIN3<22> THERMGND TMPIN3 THERMGND AL1 AK1 THERMDA THERMDC BC34 1N/4/X/50V C9 1N/4/X/50V<32> VCC_SENSE<32> VSS_SENSE AN3 AN4 AN5 AN6 F29 R44 R97 62/6/X 62/6/X CPU_TP10 V1 W1 F6 VCC_SENSE VSS_SENSE RSVD RSVD VTT_PKGSENSE MSID1 MSID0 RSVD_F6 RSVD RSVD RSVD RSVD RSVD RSVD N/C N/C N/C N/C GTLREF1 N/C N/C N5 AE6 C9 G10 D16 A20 E7 E23 E24 F23 H2 J2 J3 VTT_OL 7 5 3 1 RN123 8 6 4 2 62/8P4R CPU_TP7 CPU_TP8 CPU_TP9 GTLREF1 RN1 VTT_OR 7 5 3 1 BOOTSELECT LL_ID0 LL_ID1 Y1 V2 AA2 BOOTSEL R42 62/6/X C304 0.1U/6/Y/25V R94 R95 R48 120/6 62/6/X 62/6/X VTT_GMCH R93 R92 CPU-SK/775 P4D 7 RN124 5 62/8P4R 3 1 7 RN125 5 62/8P4R 3 1 R46 8 6 4 2 8 6 4 2 62/6 VTT_GMCH VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTTPWRGD VTT_OUT VTT_OUT VTT_SEL A29 B25 B29 B30 C29 A26 B27 C28 A25 A28 A27 C30 A30 C25 C26 C27 B26 D27 D28 D25 D26 B28 D29 D30 AM6 AA1 J1 F27 R105<32> VCC_SENSE BC35 10U/12/X/6.3V TCK TDI TDO TMS -TRST -BPM0 -BPM1 -BPM2 -BPM3 -BPM4 -BPM5<16,23> SYS_RSTCPU_TP11 CPU_TP12 FSBSEL0 R98 0/6/X FSBSEL00 FSBSEL1 FSBSEL2 AE1 AD1 AF1 AC1 AG1 AJ2 AJ1 AD2 AG2 AF2 AG3 AC2 AK3 AJ3 G29 H30 G30 TCK TDI TDO TMS TRST# BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# DBR# ITPCLK0 ITPCLK1 BSEL0 BSEL1 BSEL2 C305 0.1U/6/Y/25V TDO<32> VSS_SENSE CLOSE TO CPU SIDE R96 R91 62/6 62/6

TESTHI00 TESTHI01 TESTHI11 TESTHI12 TESTHI02 TESTHI03 TESTHI04 TESTHI05 TESTHII06 TESTHI07 FORCEPR# RSVD

F26 W3 P1 W2 F25 G25 G27 G26 G24 F24 AK6 G6

R90 R83

62/6/X 62/6/X

-THRMTRIP -FERR

Locate at ICH6 Side

CPUPWROK

TESTHI12 TESTHI1 TESTHI11

680/8P4R VID2 8 VID5 6 VID0 4 VID4 2 680/6 VID1 VID3 680/6 -PROCHOT BOOTSEL -FORCEPR -BPM0 -BPM1 -BPM5 -BPM3 -BPM4 -BPM2 TDI TMS

-TRST TCK

-STPCLK C35 33P/4/N/50V VTT_PWROK<31,32> VTT_OR VTT_OL VCC3 C10 33P/4/N/50V C34 33P/4/N/50V

-PROCHOT

-CPUSLPA

VTT_GMCH 3

FSBSEL0

1K/6/X

R43 1K/6/X 2 1

Q10 MMBT2222A/SOT23/X

CPU-SK/775

BSEL0

BSEL0<18>

GIGABYTETitle

P4_LGA775-BSize Custom Date:5 4 3 2

Document Number

8I845GE775-GSheet1

Rev

1.0of 36

Thursday, April 07, 2005

技嘉主板电路图

P4H P4F P4E VCORE AA8 AB8 AC23 AC24 AC25 AC26 AC27 AC28 AC29 AC30 AC8 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD8 AE11 AE12 AE14 AE15 AE18 AE19 AE21 AE22 AE23 AE9 AF11 AF12 AF14 AF15 AF18 AF19 AF21 AF22 AF8 AF9 AG11 AG12 AG14 AG15 AG18 AG19 AG21 AG22 AG25 AG26 AG27 AG28 AG29 AG30 AG8 AG9 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC AH11 AH12 AH14 AH15 AH18 AH19 AH21 AH22 AH25 AH26 AH27 AH28 AH29 AH30 AH8 AH9 AJ11 AJ12 AJ14 AJ15 AJ18 AJ19 AJ21 AJ22 AJ25 AJ26 AJ8 AJ9 AK11 AK12 AK14 AK15 AK18 AK19 AK21 AK22 AK25 AK26 AK8 AK9 AL11 AL12 AL14 AL15 AL18 AL19 AL21 AL22 AL25 AL26 AL29 AL30 AL8 AL9 VCORE VCORE AM11 AM12 AM14 AM15 AM18 AM19 AM21 AM22 AM25 AM26 AM29 AM30 AM8 AM9 AN11 AN12 AN14 AN15 AN18 AN19 AN21 AN22 AN25 AN26 AN29 AN30 AN8 AN9 J10 J11 J12 J13 J14 J15 J18 J19 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J30 J8 J9 K23 K24 K25 K26 K27 K28 K29 K30 K8 L8 M23 M24 M25 M26 M27 M28 M29 M30 M8 VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC N23 N24 N25 N26 N27 N28 N29 N30 N8 P8 R8 T23 T24 T25 T26 T27 T28 T29 T30 T8 U23 U24 U25 U26 U27 U28 U29 U30 U8 V8 W23 W24 W25 W26 W27 W28 W29 W30 W8 Y23 Y24 Y25 Y26 Y27 Y28 Y29 Y30 Y8 VCORE A12 A15 A18 A2 A21 A24 A6 A9 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA3 AA30 AA6 AA7 AB1 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB7 AC3 AC6 AC7 AD4 AD7 AE10 AE13 AE16 AE17 AE2 AE20 AE24 AE25 AE26 AE27 AE28 AE29 AE30 AE5 AE7 AF10 AF13 AF16 AF17 AF20 AF23 AF24 AF25 AF26 AF27 AF28 AF29 AF3 AF30 AF6 AF7 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AG10 AG13 AG16 AG17 AG20 AG23 AG24 AG7 AH1 AH10 AH13 AH16 AH17 AH20 AH23 AH24 AH3 AH6 AH7 AJ10 AJ13 AJ16 AJ17 AJ20 AJ23 AJ24 AJ27 AJ28 AJ29 AJ30 AJ4 AJ7 AK10 AK13 AK16 AK17 AK2 AK20 AK23 AK24 AK27 AK28 AK29 AK30 AK5 AK7 AL10 AL13 AL16 AL17 AL20 AL23 AL24 AL27 AL28 AL3 AL7 AM1 AM10 AM13 AM16 AM17 AM20 AM23 AM24 AM27 AM28 AM4 AM7 P4G AN1 AN10 AN13 AN16 AN17 AN2 AN20 AN23 AN24 AN27 AN28 AN7 B1 B11 B14 B17 B20 B24 B5 B8 C10 C13 C16 C19 C22 C24 C4 C7 D12 D15 D18 D21 D24 D3 D5 D6 D9 E11 E14 E17 E2 E20 E25 E26 E27 E28 E29 E8 F10 F13 F16 F19 F22 F4 F7 G1 H10 H11 H12 H13 H14 H17 H18 H19 H20 H21 H22 H23 H24 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS V

SS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS H25 H26 H27 H28 H29 H3 H6 H7 H8 H9 J4 J7 K2 K5 K7 L23 L24 L25 L26 L27 L28 L29 L3 L30 L6 L7 M1 M7 N3 N6 N7 P23 P24 P25 P26 P27 P28 P29 P30 P4 P7 R2 R23 R24 R25 R26 R27 R28 R29 R30 R5 R7 T3 T6 T7 U1 U7 V23 V24 V25 V26 V27 V28 V29 V3 V30 V6 V7 W4 W7 Y2 Y5 Y7

GTL_DET<6,8>

8/31 long. R106 62/6

CPU-SK/775

CPU-SK/775 8/11 long NC pin.

CPU-SK/775

GIGABYTETitle

P4_LGA775-DSize Custom Date:5 4 3 2

Document Number

8I845GE775-GSheet1

Rev

1.0of 36

Thursday, April 07, 2005

技嘉主板电路图

VDDQ<14> GAD[0..31] GAD30<14> SBA[0..7]<15> HL[0..10] GAD14 GAD31D

8.2K/6/X

R701 R702

8.2K/6/X 8.2K/6/XD

<4> HA[3..31]

HA[3..31] HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31 W31 AA33 AB30 V34 Y36 AC33 Y35 AA36 AC34 AB34 Y34 AB36 AC36 AC31 AF35 AD36 AD35 AE34 AD34 AE36 AF36 AE33 AF34 AG34 AG36 AE31 AH35 AG33 AG31 V36 AA31 W33 AA34 W35 AB35 AF30 K30 J31 V35 Y30 B28 H28 L31 N31 N33 J34 G33 C35 E29 C30 B33 E25 D25 C26 T36 V30 U36 N36 M36 P36 T35 U33 T34 M34 U31 R36 U34 P34 D22 E7

U1E HA3* HA4* HA5* HA6* HA7* HA8* HA9* HA10* HA11* HA12* HA13* HA14* HA15* HA16* HA17* HA18* HA19* HA20* HA21* HA22* HA23* HA24* HA25* HA26* HA27* HA28* HA29* HA30* HA31* HD0* HD1* HD2* HD3* HD4* HD5* HD6* HD7* HD8* HD9* HD10* HD11* HD12* HD13* HD14* HD15* HD16* HD17* HD18* HD19* HD20* HD21* HD22* HD23* HD24* HD25* HD26* HD27* HD28* HD29* HD30* HD31* HD32* HD33* HD34* HD35* HD36* HD37* HD38* HD39* HD40* HD41* HD42* HD43* HD44* HD45* HD46* HD47* HD48* HD49* HD50* HD51* HD52* HD53* HD54* HD55* HD56* HD57* HD58* HD59* HD60* HD61* HD62* HD63* T30 R33 R34 N34 R31 L33 L36 P35 J36 K34 K36 M30 M35 L34 K35 H36 G34 G36 J33 D35 F36 F34 E36 H34 F35 D36 H35 E33 E34 B35 G31 C36 D33 D30 D29 E31 D32 C34 B34 D31 G29 C32 B31 B32 B30 B29 E27 C28 B27 D26 D28 B26 G27 H26 B25 C24 B23 B24 E23 C22 G25 B22 D24 G23 H30 H24 D27 HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63

HD[0..63]

<5>

U1D<14><14><14><14> GCBE0GCBE1GCBE2GCBE3GCBE0GCBE1GCBE2GCBE3R4 N4 M2 H2 G_CBE0* G_CBE1* G_CBE2* G_CBE3* GADSTB0 GADSTB0* G_AD0 G_AD1 G_AD2 G_AD3 G_AD4 G_AD5 G_AD6 G_AD7 G_AD8 G_AD9 G_AD10 G_AD11 G_AD12 G_AD13 G_AD14 G_AD15 V8 U7 V4 V2 W4 W5 U5 U4 U2 V3 T2 T3 T4 R2 R5 R7 T8 P3 ADSTB0 ADSTB0GAD0 GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14

GAD15 ADSTB0<14> ADSTB0-<14>

HRCOMP1

R24 24.9/6/1

<14> MCH_AGPREF BC47 0.1U/6/Y/25V<4> -HREQ0<4> -HREQ1<4> -HREQ2<4> -HREQ3<4> -HREQ4<4> -HADSTB0<4> -HADSTB1 -HREQ0 -HREQ1 -HREQ2 -HREQ3 -HREQ4 -HADSTB0 -HADSTB1<14> RBF<14> WBF<14> PIPERBFWBFPIPEG7 G5 H8 GRBF* GWBF* GPIPE* GST0 GST1 GST2 HREQ0* HREQ1* HREQ2* HREQ3* HREQ4* HADSTB0* HADSTB1*<14> ST0<14> ST1<14> ST2 ST0 ST1 ST2 C4 B4 B3 GADSTB1 GADSTB1* M8 L7 P8 K4 K2 J2 M3 L5 L4 H4 G2 K3 J4 J5 J7 H3 K8 G4 ADSTB1 ADSTB1GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31 ADSTB1<14> ADSTB1-<14> GRCOMP VDDQ R25 68.1/6/1 HLRCOMP_G<18> MCHCLK<18> MCHCLKMCHCLK MCHCLKHRCOMP1 HSWNG HRCOMP0 HSWNG STBP0 STBN0 -DBI0 STBP1 STBN1 -DBI1 STBP2 STBN2 -DBI2 STBP3 STBN3 -DBI3 -HADS -HTRDY -DRDY -DEFER -HITM -HIT -HLOCK -BR0 -BNR -BPRI -DBSY -RS0 -RS1 -RS2 -CPURST PWROK HCLKP HCLKN HYRCOMP HYSWING HXRCOMP HXSWING HDSTBP0* HDSTBN0* DINV0* HDSTBP1* HDSTBN1* DINV_1* HDSTBP2* HDSTBN2* DINV_2* HDSTBP3* HDSTBN3* DINV_3* ADS* HTRDY* DRDY* DEFER* HITM* HIT* HLOCK* BREQ0* BNR* BPRI* DBSY* RS0* RS1* RS2* CPURST* PWROK R26 40.2/6/1<5> STBP0<5> STBN0<5> -DBI0<5> STBP1<5> STBN1<5> -DBI1<5> STBP2<5> STBN2<5> -DBI2<5> STBP3<5> STBN3<5> -DBI3<4> -HADS<4> -HTRDY<4> -DRDY<4> -DEFER<4> -HITM<4> -HIT<4> -HLOCK<4> -BR0<4> -BNR<4> -BPRI<4> -DBSY<4> -RS0<4> -RS1<4> -RS2<4> -CPURST<16,18,20,23> PWROK HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 AA7 AB8 AC7 AC5 AD8 AF4 AE4 AE5 AF3 AE2 AF2 AD3 AD2 AD4 AC4 AC2 AJ31 AB3 AB2 HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 HL_VREF HL_SWING HL_STRBS HL_STRBF HL_RCOMP RSTIN* RSVD RSVD GSBSTB GSBSTB* GSBA0 GSBA1 GSBA2 GSBA3 GSBA4 GSBA5 GSBA6 GSBA7 G_AD16 G_AD17 G_AD18 G_AD19 G_AD20 G_AD21 G_AD22 G_AD23 G_AD24 G_AD25 G_AD26 G_AD27 G_AD28 G_AD29 G_AD30 G_AD31 HUBREF HL_SWING BC48 1U/6/Y/10V BC49 1U/6/Y/10V<15> HLSTBS<15> HLSTBF HLSTBS HLSTBF HLRCOMP_G<15,17,20,22,34> PCIRSTPCIRSTF4 E5 C3 C2 D3 D2 E4 E2 F3 F2 SBSTB SBSTBSBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7 SBSTB<14> SBSTB-<14> VTT_GMCH BROOKDALE-GE-DDR/S/B1

<14> GFRAME<18> GMCH3V66<14> GDEVSEL<14> GIRDY<14> GTRDY<14> GSTOP<14> GPAR<14> GREQ<14> GGNT-

GFRAMEGMCH3V66 GDEVSELGIRDYGTRDYGSTOPGPAR GREQGGNTGRCOMP MCH_AGPREF

M4 AE7 N2 N7 N5 P2 P4 D5 B5 L2 W2

GFRAME* GCLKIN GDEVSEL* GIRDY* GTRDY* GSTOP* GPAR GREQ* GGNT* AGPRCOMP AGPVREF

HRCOMP0

R27 24.9/6/1

AGP INTERFACER28 100/6/1 M_GTLREF VDDQ R30 169/6/1 HL_SWING BC52 0.1U/6/Y/25V HUBREF BC54 0.1U/6/Y/25V R31 100/6/1

HD_VREF0 HD_VREF1 HD_VREF2 HA_VREF HCC_VREF

AD30 P30 BC50 0.1U/6/Y/25V BC51 1U/6/Y/10V

R29 226/6/1<15> HL_SWING

BROOKDALE-GE-DDR/S/B1 VCORE

CPU INTERFACE

0.7VNEAR MCH BC53 0.1U/6/Y/25V R33 150/6/1A

VCORE BC55 0.1U/6/Y/25V BC56 1U/6/Y/10V+12V HSWNG R34 75/6/1<6,7> GTL_DET R56 8.2K/6 3 R47 619/6/1

<15> HUBREF

0.35V

R32 100/6/1

D G S

Q9 2N7002/SSOT23

Title M_GTLREF Size Document Number Custom Date:5 4 3 2

BROOKDALE-G_ARev

8I845GE7

75-GSheet1

1.08 of 36

Thursday, April 07, 2005

技嘉主板电路图

VCC3 VCC3 R37 2.7K/6D

VCC R35 2.2K/6 3 VCC3 Q2G

R38 2.7K/6

Q62G

R36 2.2K/6 VGADDCDATA VGADDCDATA<30>

VGA_DDCDATA 1S

<12,13> MAA[0..12]

MAA[0..12] MAA0 MAA_CPC1 MAA_CPC2 MAA3 MAA_CPC4 MAA_CPC5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAB_CPC1 MAB_CPC2 MAB_CPC4 MAB_CPC5<12,13> -SWEA<12,13> -SCASA<12,13> -SRASA -SWEA -SCASA -SRASA SBS0 SBS1 -CS0 -CS1 -CS2 -CS3 AL25 AN25 AP23 AK20 AL19 AL17 AP19 AP17 AN17 AK16 AK26 AL15 AN15 AP25 AN23 AN19 AK18 AP29 AN29 AK28 AN27 AP27

U1C SMAA0 SMAA1 SMAA2 SMAA3 SMAA4 SMAA5 SMAA6 SMAA7 SMAA8 SMAA9 SMAA10 SMAA11 SMAA12 SMAB1 SMAB2 SMAB4 SMAB5 SWE* SCAS* SRAS* SBA0 SBA1 SDQS0 SDM0 SDQ0 SDQ1 SDQ2 SDQ3 SDQ4 SDQ5 SDQ6 SDQ7 SDQS1 SDM1 SDQ8 SDQ9 SDQ10 SDQ11 SDQ12 SDQ13 SDQ14 SDQ15 AR2 AP4 AN4 AP2 AT3 AP5 AN2 AP3 AR4 AT4 AT7 AR8 AT5 AR6 AT9 AR10 AT6 AP6 AT8 AP8 -DQS0 DM0 MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 -DQS1 DM1 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 A37 Y8 Y4 W7 AA5 AA3 AA4 AA2 Y2

2N7002/SSOT23

2 1

VGADDCCLK

VGADDCCLK<30>

<12,13> MAA_CPC[1..5]

MAA_CPC[1..5]

2N7002/SSOT23 SOT23

U1F

<12,13> MAB_CPC[1..5]

MAB_CPC[1..5]

R565 R566

4.7/6 VGA_R4.7/6 VGA_G4.7/6 VGA_B-

VGA_R VGA_G VGA_B

VGA_R<30> VGA_G<30> VGA_B<30>

<11> DM[0..7]

DM[0..7]

DDCA_DATA DDCA_CLK RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD MEM_SEL

C7 D7 VCC

R567

<11> MD[0..63]

MD[0..63]

<11> -DQS[0..7]

-DQS[0..7]

2 3 HSYNC HSYNC C186<30> 10P/6/N/50V C187 C188 10P/6/N/50V HCT125/SOP14/X 0/6<12,13> SBS0<12,13> SBS1<12,13><12,13><12,13><12,13> -CS0 -CS1 -CS2 -CS3 AL29 AP31 AK30 AN31 AP13 AN13 AK14 AL13 SCS0* SCS1* SCS2* SCS3*<12,13><12,13><12,13><12,13> CKE0 CKE1 CKE2 CKE3 CKE0 CKE1 CKE2 CKE3 SCKE0 SCKE1 SCKE2 SCKE3 SDQ16 SDQ17 SDQ18 SDQ19 SDQ20 SDQ21 SDQ22 SDQ23 AP10 AT11 AT13 AT14 AT10 AR12 AR14 AP14 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 DREFCLK 4 D14 14 SDQS2 SDM2 AT12 AP12 -DQS2 DM2 HSYNC VSYNC B7 C6 R39 47/6 7 10P/6/N/50V R62 VCC<18> FSBSEL FSBSEL Y3 PSBSEL REFSET B16 R40 47/6 5 U2B HCT125/SOP14/X VSYNC 6 VSYNC<30> DOTCLK DOTCLK<18> REFSET 7 R61 0/6 BROOKDALE-GE-DDR/S/B1<12> DCLK0<12> -DCLK0<12> DCLK1<12> -DCLK1<12> DCLK2<12> -DCLK2<12,13> DCLK3<12,13> -DCLK3<12,13> DCLK4<12,13> -DCLK4<12,13> DCLK5<12,13> -DCLK5 DCLK0 -DCLK0 DCLK1 -DCLK1 DCLK2 -DCLK2 DCLK3 -DCLK3 DCLK4 -DCLK4 DCLK5 -DCLK5 AL21 AK22 AN11 AP11 AM34 AL33 AP21 AN21 AP9 AN9 AP33 AN34 SCMD_CLK0 SCMD_CLK0* SCMD_CLK1 SCMD_CLK1* SCMD_CLK2 SCMD_CLK2* SCMD_CLK3 SCMD_CLK3* SCMD_CLK4 SCMD_CLK4* SCMD_CLK5 SCMD_CLK5* SDQS3 SDM3 SDQ24 SDQ25 SDQ26 SDQ27 SDQ28 SDQ29 SDQ30 SDQ31 SDQS4 SDM4 SR1 0/6/B/X AK24 AL23 SRCVEN_OUT* SRCVEN_IN* SDQ32 SDQ33 SDQ34 SDQ35 SDQ36 SDQ37 SDQ38 SDQ39 SDQS5 SDM5<12,13> VREF_DDR AM2 BC59 1U/6/Y/10V SM_VREF SDQ40 SDQ41 SDQ42 SDQ43 SDQ44 SDQ45 SDQ46 SDQ47 SDQS6 SDM6 SDQ48 SDQ49 SDQ50 SDQ51 SDQ52 SDQ53 SDQ54 SDQ55 SDQS7 SDM7 SDQ56 SDQ57 SDQ58 SDQ59 SDQ60 SDQ61 SDQ62 SDQ63 AT17 AR18 -DQS3 DM3 MD24 MD25 MD26 MD27 MD28 MD2

9 MD30 MD31 -DQS4 DM4 VCC MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 -DQS5 DM5 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 -DQS6 DM6 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 -DQS7 DM7 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63 HS1 1 MH5 1 2 MH7 1 2 MH8 1 2 K1_ICT/X 1 1 K1_ICT/X 1 K1_ICT/X MH1 1 2 MH2 1 2 MH4 1 2 VC13 2.2P/6/N/50V VC14 2.2P/6/N/50V VC15 2.2P/6/N/50V U2C HCT125/SOP14/X 8 12 14 10 VCC U2D HCT125/SOP14/X 11 14 13 VGA_RVGA_GVGA_BVR4 37.4/6/1 VR5 37.4/6/1 VR6 37.4/6/1 R41 137/6/1 AT15 AP16 AT18 AT19 AR16 AT16 AP18 AR20 AR24 AT24 AR22 AP22 AP24 AT26 AT22 AT23 AT25 AR26 AT29 AP28 AP26 AT28 AR30 AP30 AT27 AR28 AT30 AT31 AT34 AR34 AR32 AT32 AR36 AP35 AP32 AT33 AP34 AT35 AL36 AL34 AN36 AM36 AK36 AJ36 AP36 AM35 AK35 AK34 9

RED RED* GREEN GREEN* BLUE BLUE*

C15 D16 E15 F16 G15 H16

14 U2A

Total trace= 100 milsB

VTT_DDR

SMRCOMP1

HOLE_3/X

HOLE_3/X K4 K5 K6

VTT_DDR SMRCOMP1 BC61 0.1U/6/Y/25V R49 30/6/1 SMRCOMP2 SMRCOMP2 SMRCOMP1

AF10 AJ34 AD16

SMX_RCOMP SMY_RCOMP SMXRCOMP*

8 7 6 5

3 4

8 7 6 5

3 4

8 7 6 5

3 4

BC60 0.1U/6/Y/25V

R45 30/6/1

AU37 AT37 AU36 B37 A36 A2 B1 AU1 AU2 AT1 AJ35 AH34

NC NC NC NC NC NC NC NC NC NC NC NC

8 7

3 4

8 7

3 4

8 7

3 4 K1_ICT/X K1_ICT/X K1_ICT/X

HOLE_3/X

HOLE_3/X Title

BROOKDALE-GE-DDR/S/B1

DDR INTERFACE

HEAT SINK/GIGABYTE Size Document Number Custom Date:

BROOKDALE-G_BRev

8I845GE775-GSheet1

1.09 of 36

Thursday, April 07, 2005

技嘉主板电路图

AD14 AB22 AB20 AB18 AB16 Y22 Y16 V22 V16 T22 T20 T18 T16 P18

VDDQ

VCORE VTTFSB* VTTFSB* VTTFSB* VTTFSB* VTTFSB* VTTFSB* VTTFSB* VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB VTTFSB AB24 Y24 V24 T24 P24 P22 P20 F18 K26 M28 T28 Y28 AD28 B18 B19 B20 C18 C19 C20 D18 D19 D20 E19 F20 H18 G19 H20 J19 K20 K22 K18 R37 L37 AC37 G37 A31

AH28 AB21 U22 W22 AA22 P21 AD21 P23 R24 U24 W24 A33 C33 AJ33 AN33 AR33 W34 D34 A35 E35 G35 J35 L35 N35 R35 U35 AA35 AC35 AE35 AG35 AL35 V28 P28 AF28

VDDQ 0.1U/6/Y/25V VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS AD17 AB17 Y17 V17 T17 U18 V18 Y18 AA18 U20 V20 Y20 AA20 P19 T19 AN35 AR35 AU35 AT36 AH36 W36 B36 C37 E37 J37 N37 U37 AA37 AE37 AG37 AJ37 AN37 AR37 F14 AR13 AJ13 B13 C13 D13 E13 AM12 AK12 AU11 AR11 AR9 AE9 AA9 U9 N9 J9 G9 B8 C8 D8 F8 AF8 AM8 AM10 AU7 AR7 AN7 F6 H6 M6 T6 Y6 AB6 AF6 AM6 AR5 AN5 AG5 C5 A5 AB4 AG4 AM4 AU3 AR3 AN3 AM3 AG3 AC3 AB28 AH20 K28 AH16 AD19 BC62 0.1U/6/Y/25V BC63 0.1U/6/Y/25V BC64 BC65 0.1U/6/Y/25V BC66 BC67 0.1U/6/Y/25V BC68 BC69 A7 L1 R9 P6 P10 R1 V10 W9 AB10 A3 C1 K6 G1 L9 V6 D6 D4 AC1 AC

9 AD6 AE3 0.1U/6/Y/25V VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCAGP VCCHI VCCHI VCCHI VCCHI

U1A M10 T10 F32 H32 K32 M32 P32 T32 V32 Y32 AB32 AD32 AF32 AH32 AM32 AU31 AR31 AL31 C31 F30 AH30 AR29 AJ29 AG29 AE29 AC29 AA29 W29 U29 R29 N29 L29 J29 C29 A29 F28 AM28 AU27 AR27 AL27 J27 C27 A27 F26 AR25 AJ25 J25 C25 A25 F24 AM24 AU23 AR23 J23 D23 C23 A23 F22 H22 AR21 AJ21 J21 G21 A21 B21 C21 D21 E21 AM20 AR19 AR17 AJ17 J17 G17 B17 C17 D17 E17 AM16 AU15 AR15 D15 AC24 AA24 K24 AH24 Y10 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC* VCC*

U1B

0.1U/6/Y/25V/X

0.1U/6/Y/25V

VCORE

BC70 4.7U/8/Y/10V/X

BC71

BC72 BC73 0.1U/6/Y/25V 0.1U/6/Y/25V

4.7U/8/Y/10V/X

2_5VSTR 0.1U/6/Y/25V 0.1U/6/Y/25V

BC78 BC79 BC80 BC81 BC83 BC84 0.1U/6/Y/25V 0.1U/6/Y/25V 0.1U/6/Y/25V 2_5VSTR SC1 0.1U/6/B/Y/25V/X SC2 0.1U/6/B/Y/25V/X GND to PIN AA1/AE1 1 1+ EC3 1000U/D/6.3V/8C+ EC4 1000U/D/6.3V/8C VDDQ R50 1/6 L3 10UH/8/S C238 4.7U/8/Y/10V BC90 0.1U/6/Y/25V VDPLL

20 mils

0.82UH/8/S C239 4.7U/8/Y/10V

VFSB BC91 0.1U/6/Y/25V

20 mils

1UH/12/S/250mA C240 4.7U/8/Y/10V

VSM BC92 0.1U/6/Y/25V

20 mils

A9 D10 H14 W20 K10 K12 K14 K16 A11 B9 B10 B11 B12 C9 C10 C11 C12 D9 D11 D12 E9 E11 F10 F12 G11 G13 H10 H12 J11 J13 J15 U17 U19 U21 V19 W17 W18 W19 W21 Y19 AA17 AA19 AA21 P17 P16 P15 P14 Y14 V14 T14 AB14

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VTTDECAP VTTDECAP VTTDECAP VTTDECAP VTTDECAP

2_5VSTR

0.68UH/8/S C17 4.7U/8/Y/10V R51 1.1/6 BC93 1U/6/Y/10V

VCCQ

20 mils

VCC* VCC* VCC* VCC* VCCAGP* VCCAGP* VCCAGP* VCCHL* VCCA_DPLL VCCA_DAC VCCA_DAC VCCA_FSB VCCA_HI VCCA_SM VCCA_SM VCCQSM VCCQSM VCCQSM

VDPLL VDDQ

A13 A15 B14

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM

AH14 AJ1 AK2 AL5 AU13 AU17 AU25 AU29 AU33 AH18 AH22 AH26 AG7 AG9 AH2 AH3 AH4 AH6 AH8 AJ2 AJ3 AJ4 AJ5 AJ7 AJ9 AJ11 AJ15 AJ19 AJ23 AK3 AK4 AK6 AK8 AK

10 AK32 AL1 AL2 AL3 AL4 AL7 AL9 AL11 AL37 AM14 AM18 AM22 AM26 AU9 AU5 AP20 AP15 AP7 AM30 AJ27 AH12 AH10

BC89 0.1U/6/Y/25V

BC85 BC87 0.1U/6/Y/25V 0.1U/6/Y/25V BC86 BC88 0.1U/6/Y/25V 0.1U/6/Y/25V

2_5VSTR

AD23 AB19 AT2 W3 U3 R3 N3 L3 J3 G3 E3 Y21 AR1 AN1 AE1 AA1 U1 N1 J1 E1 B2

T21 V21 C16 U16 W16 AA16 R14 U14 W14 AA14 AC14 AD15

BC94 0.1U/6/Y/25V

BC95 1U/6/Y/10V

VDDQ

VFSB VSM VCCQ

A17 AD10 AG2 AG1 AT20 AT21 AU21

VCC3 VCCGPIO VSSA_DAC VSSA_DAC VCCSM* VCCSM* VCCSM* VCCSM* B6 B15 C14 AD24 AD22 AD20 AD18

15 milsBC96 0.1U/6/Y/25V

BROOKDALE-GE-DDR/S/B1A

VDDQ

VCORE

2_5VSTR BROOKDALE-GE-DDR/S/B1

2_5VSTR

SC3 0.1U/6/B/Y/25V/X

SC5 0.1U/6/B/Y/25V/X

SC6 0.1U/6/B/Y/25V/X

SC7 0.1U/6/B/Y/25V/X

SC8 0.1U/6/B/Y/25V/X Title

BROOKDALE-G_CSize Document Number Custom Date:5 4 3 2

Rev

8I845GE775-GSheet1

1.010 of 36

Thursday, April 07, 2005

技嘉主板电路图

<12,13> DM_[0..7]<12,13> MD_[0..63] MD[0..63]<9>

DM[0..7]<9>

<12,13> -DQS_[0..7]

-DQS[0..7]<9>

RN7 0/8P4R/X RN9 0/8P4R/X RN11 0/8P4R/X MD_7 MD_3 MD_8 MD_9 MD_19 MD_23 MD_24 MD_28 RN8 RN10 RN12

DM_0 -DQS_0 MD_2 MD_6 MD_0 MD_4 MD_5 MD_1 MD_12 MD_13 -DQS_1 DM_1 MD_14 MD_15 MD_10 MD_11 -DQS_2 DM_2 MD_18 MD_22 MD_29 MD_25 -DQS_3 DM_3 MD_26 MD_30 MD_27 MD_31 MD_32 MD_36 MD_33 MD_37 MD_39 MD_35 MD_40 MD_44 -DQS_4 DM_4 MD_34 MD_38 MD_45 MD_41 DM_5 -DQS_5 MD_48 MD_49 MD_52 MD_53 MD_50 MD_51 MD_60 MD_61 DM_6 -DQS_6 MD_54 MD_55 MD_56 MD_57 DM_7 -DQS_7 MD_59 MD_63 MD_58 MD_62

RN3

RN5

RN6

RN13

RN14

RN15

RN16

RN17

RN18

RN19

RN20

RN21

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 7 5 3 1

2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 8 6 4 2

0/8P4R/X

DM0 -DQS0 MD2 MD6 MD0 MD4 MD5 MD1 MD12 MD13 -DQS1 DM1 MD14 MD15 MD10 MD11 -DQS2 DM2 MD18 MD22 MD29 MD25 -DQS3 DM3 MD26 MD30 MD27 MD31 MD32 MD36 MD33 MD37 MD39 MD35 MD40 MD44 -DQS4 DM4 MD34 MD38 MD45 MD41 DM5 -DQS5 MD48 MD49 MD52 MD53 MD50 MD51 MD60 MD61 DM6 -DQS6 MD54 MD55 MD56 MD57 DM7 -DQS7 MD59 MD63 MD58 MD62

MD_20 MD_16 MD_17 MD_21 MD_42 MD_46 MD_43 MD_47

RN2

RN4

1 3 5 7 1 3 5 7

2 0/8P4R/X 4 6 8 2 0/8P4R/X 4 6 8

MD20 MD16 MD17 MD21 MD42 MD46 MD43 MD47

1 3 5 7 1 3 5 7

2 0/8P4R/X 4 6 8 2 0/8P4R/X 4 6 8

MD7 MD3 MD8 MD9 MD19 MD23 MD24 MD28

2_5VSTR BC97 BC98 BC99 BC100 BC101 BC102 BC103 BC104 BC105 BC352 0.1U/6/Y/25V/X 0.1U/6/Y/25V 0.1U/6/Y/25V 0.1U/6/Y/25V 0.1U/6/Y/25V/X 0.1U/6/Y/25V 0.1U/6/Y/25V 0.1U/6/Y/25V 0.1U/6/Y/25V/X 0.1U/6/Y/25VB

COUPON2A

COUPON1 COUPON2

1 1

2 COUPON/X 2 COUPON/X

2_5VSTRA

COUPON1

GIGABYTE Title

DDR SERIAL TERM.Size B Date:8 7 6 5 4 3

Document Number

Rev

8I845GE775-GThursday, April 07, 20052

1.0111

Sheet

技嘉主板电路图

<9,13> MAA_CPC[1..5]

A_CPC[1..5]

2_5VSTR

15 22 30 54 62 77 96 104 112 128 136 143 156 164 172 180

7 38 46 70 85 108 120 148 168

2_5VSTR DDR1D

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

15 22 30 54 62 77 96 104 112 128 136 143 156 164 172 180

7 38 46 70 85 108 120 148 168 VDD VDD VDD VDD VDD VDD VDD VDD VDD

<9,13> MAA[0..12]

MAA0 MAA_CPC1 MAA_CPC2 MAA3 MAA_CPC4 MAA_CPC5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 SBS0 SBS1

VDD VDD VDD VDD VDD VDD VDD VDD VDD

48 43 41 130 37 32 125 29 122 27 141 118 115 103 59 52 113

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 BA0 BA1 BA2

<9,13> SBS0<9,13> SBS1<9,13> -CS0<9,13> -CS1

<11,13> DM_[0..7]C

-CS0 -CS1

157 158 71 163

CS0 CS1 NC/CS2 NC/CS3 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8 WE CAS RAS CKE0 CKE1

DM_0 DM_1 DM_2 DM_3 DM_4 DM_5 DM_6 DM_7

97 107 119 129 149 159 169 177 140

<9,13> -SWEA<9,13> -SCASA<9,13> -SRASA<9,13> CKE0<9,13> CKE1<9> DCLK1<9> -DCLK1<9> DCLK0<9> -DCLK0<9> DCLK2<9> -DCLK2<11,13> -DQS_[0..7]

-SWEA -SCASA -SRASA CKE0 CKE1

63 65 154

21 111 16 17 137 138 76 75 5 14 25 36 56 67 78 86 47 91 92 181 182 183

DCLK1 -DCLK1 DCLK0 -DCLK0 DCLK2 -DCLK2 -DQS_0 -DQS_1 -DQS_2 -DQS_3 -DQS_4 -DQS_5 -DQS_6 -DQS_7 SMBDATA SMBCLK

CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 SDA SCL SA0 SA1 SA2 VREF VDDID VDDSPD NC NC NC NC NC NC/FETEN

<13,16,18,34> SMBDATA<13,16,18,34> SMBCLK

D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63

2 4 6 8 94 95 98 99 12 13 19 20 105 106 109 110 23 24 28 31 114 117 121 123 33 35 39 40 126 127 131 133 53 55 57 60 146 147 150 151 61 64 68 69 153 155 161 162 72 73 79 80 165 166 170 171 83 84 87 88 174 175 178 179

MD_0 MD_1 MD_2 MD_3 MD_4 MD_5 MD_6 MD_7 MD_8 MD_9 MD_10 MD_11 MD_12 MD_13 MD_14 MD_15 MD_16 MD_17 MD_18 MD_19 MD_20 MD_21 MD_22 MD_23 MD_24 MD_25 MD_30 MD_27 MD_28 MD_29 MD_26 MD_31 MD_32 MD_33 MD_34 MD_35 MD_36 MD_37 MD_38 MD_39 MD_40 MD_41 MD_42 MD_43 MD_44 MD_45 MD_46 MD_47 MD_48 MD_49 MD_50 MD_51 MD_52 MD_53 MD_54 MD_55 MD_61 MD_57 MD_63 MD_59 MD_60 MD_56 MD_62 MD_58

MD_[0..63]<11,13><9,13> MAB_CPC[1..5] MAA0 MAB_CPC1 MAB_CPC2 MAA3 MAB_CPC4 MAB_CPC5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12

DDR2

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

48 43 41 130 37 32 125 29 122 27 141 118 115 103 59 52 113

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13

SBS0 SBS1

BA0 BA1 BA2

<9,13> -CS2<9,13> -CS3

-CS2 -CS3

157 158 71 163

CS0 CS1 NC/CS2 NC/CS3 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8 WE CAS RAS CKE0 CKE1

DM_0 DM_1 DM_2 DM_3 DM_4 DM_5 DM_6 DM_7

97 107 119 129 149 159 169 177 140

-SWEA -SCASA -SRASA<9,13> CKE2<9,13> CKE3<9,13> DCLK4<9,13> -DCLK4<9,13> DCLK3<9,13> -DCLK3<9,13> DCLK5<9,13> -DCLK5 -DQS_0 -DQS_1 -

DQS_2 -DQS_3 -DQS_4 -DQS_5 -DQS_6 -DQS_7 SMBDATA SMBCLK 2_5VSTR CKE2 CKE3

63 65 154 21 111 16 17 137 138 76 75 5 14 25 36 56 67 78 86 47 91 92 181 182 183 1 82 184 9 10 101 102 173 167

CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 SDA SCL SA0 SA1 SA2 VREF VDDID VDDSPD NC NC NC NC NC NC/FETEN

VREF_DDR 2_5VSTR BC106 0.1U/6/Y/25V

1 82 184 9 10 101 102 173 167

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND WP

44 45 49 51 134 135 142 144 90

VREF_DDR 2_5VSTR BC107 0.1U/6/Y/25V

3 11 18 26 34 42 50 58 66 74 81 89 93 100 116 124 132 139 145 152 160 176

DDR1/BLACK

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 3 11 18 26 34 42 50 58 66 74 81 89 93 100 116 124 132 139 145 152 160 176 WP

2_5VSTRA

DDR1/BLACKA

2R52 75/6/1

2 1

VREF_DDR R53 75/6/1 BC108 0.1U/6/Y/25V BC109 1U/6/Y/10V

VREF_DDR

<9,13>

GIGABYTE Title

DDR1,2Size B Date:8 7 6 5 4 3

Document Number

Rev

8I845GE775-GThursday, April 07, 20052

1.0121

Sheet

技嘉主板电路图

VTT_DDR VTT_DDR<9,12> MAB_CPC[1..5] MAB_CPC[1..5] 2_5VSTR VTT_DDR CN7 MD_1 MD_5 MD_4 MD_0 MD_6 MD_2 -DQS_0 DM_0 MD_10 CKE3 MD_15 MD_14 MD_9 MD_8 MD_3 MD_7 MD_17 MAA12 MD_16 MD_20 MAA7 MD_22 MD_18 MAA9 MD_24 MD_23 MD_19 MAA8 MD_26 MAA3 DM_3 -DQS_3 MD_39 SBS0 MD_38 MD_34 MD_36 MD_32 SBS1 MAA10 -SRASA MD_44 MD_40 MD_35 MD_47 MD_43 MD_46 MD_42 MD_55 MD_54 -DQS_6 DM_6 MD_53 MD_52 MD_49 MD_48 MD_59 MD_63 MD_58 MD_62 MD_61 MD_60 MD_51 MD_50 -DQS_7 DM_7 MD_57 MD_56 -DQS_5 DM_5 -CS3 -CS1 DM_1 -DQS_1 MD_13 MD_12 DM_4 -DQS_4 MD_37 MD_33

DDR3

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7

2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8

15 22 30 54 62 77 96 104 112 128 136 143 156 164 172 180

7 38 46 70 85 108 120 148 168

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1

3 5 7 1 3 5 7

2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8 2 4 6 8

RN22 56/8P4R RN24 56/8P4R

MD_25 MD_29 MD_28 MAA6 DM_2 MAA11 -DQS_2 MD_21 MAA0 MD_31 MD_27 MD_30 -SCASA -SWEA MAA_CPC1 MAA_CPC2 MAA_CPC4 MAB_CPC4 MAB_CPC1 MAB_CPC2 MAA_CPC5 MAB_CPC5

1 3 5 7 1 3 5 7 1 3 5 7

2 4 6 8 2 4 6 8 2 4 6 8

RN23 56/8P4R

RN26 56/8P4R RN28 56/8P4R R54 R55 56/6 56/6 RN31 33/8P4R RN33 33/8P4R

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD VDD VDD VDD VDD

RN25 56/8P4R RN27 56/8P4R RN29 56/8P4R RN30 56/8P4R RN32 56/8P4R RN34 56/8P4R

<9,12> MAA[0..12]

MAA0 MAB_CPC1 MAB_CPC2 MAA3 MAB_CPC4 MAB_CPC5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 SBS0 SBS1 -CS3 -CS2

48 43 41 130 37 32 125 29 122 27 141 118 115 103 59 52 113

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 BA0 BA1 BA2

<9,12> SBS0<9,12> SBS1<9,12> -CS3<9,12> -CS2

<11,12> DM_[0..7]

<9,12> -SWEA<9,12> -SCASA<9,12> -SRASA<9,12> CKE3<9,12> CKE2<9,12> DCLK4<9,12> -DCLK4<9,12> DCLK3<9,12> -DCLK3<9,12> DCLK5<9,12> -DCLK5<11,12> -DQS_[0..7]

CN11

157 158 71 163

CS0 CS1 NC/CS2 NC/CS3 DQM0 DQM1 DQM2 DQM3 DQM4 DQM5 DQM6 DQM7 DQM8 WE CAS RAS

DM_0 DM_1 DM_2 DM_3 DM_4 DM_5 DM_6 DM_7

97 107 119 129 149 159 169 177 140

-SWEA -SCASA -SRASA CKE3 CKE2

63 65 154

21 111 16 17 137 138 76 75

CKE0 CKE1 CK0/DNU CK0/DNU CK1 CK1 CK2/DNU CK2/DNU DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8 SDA SCL SA0 SA1 SA2 VREF VDDID VDDSPD NC NC NC NC NC NC/FETEN

-DQS_0 -DQS_1 -DQS_2 -DQS_3 -DQS_4 -DQS_5 -DQS_6 -DQS_7 SMBDATA SMBCLK

5 14 25 36 56 67 78 86 47 91 92 181 182 183 1 82 184 9 10 101 102 173 167

<12,16,18,34> SMBDATA<12,16,18,34> SMBCLK 2_5VSTR VREF_DDR

CN8

<9,12> -SCASA<9,12> -SWEA

CN9

CN10

1 3 5 7 1 3 5 7

2 4 6 8 2 4 6 8

RN35 56/8P4R RN36 56/8P4R RN37 56/8P4R RN38 56/8P4R

CN12

CN13

<9,12> -SRASA

<11,12> MD_[0..63]<11,12> DM_[0..7]

MD_[0..63]

MPD_[0..7]

<11,12> -DQS_[0..7]<9,12> MAA[0..12]<9,12> -CS[0..3]<9,12> CKE[0..3]<9,12> SBS[0..1]<9,12> MAA_CPC[1..5]<9,12> MAB_

CPC[1..5]

-DQS_[0..7] MAA[0..12] -CS[0..3] CKE[0..3] SBS[0..1]

RN39 56/8P4R RN40 56/8P4R RN41 56/8P4R RN42 56/8P4R RN43 56/8P4R

VTT_DDR CN14

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7

2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8 2 0.1U/8P4C 4 6 8

MAA_CPC[1..5] MAB_CPC[1..5]

CN15

CN16

CN17

RN44 56/8P4R

<9,12> VREF_DDR

2_5VSTR BC316 0.1U/6/Y/25V

CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND WP

44 45 49 51 134 135 142 144 90

RN45 56/8P4R RN46 56/8P4R

CN18

CN19

DDR1/BLACK

CN20

-CS2 MD_41 -CS0 MD_45 CKE2 CKE0 MD_11 CKE1

1 3 5 7 1 3 5 7

2 4 6 8 2 4 6 8

RN47 56/8P4R RN48 56/8P4R

3 11 18 26 34 42 50 58 66 74 81 89 93 100 116 124 132 139 145 152 160 176

CN21A

GIGABYTE Title

DDR TERM.Size B Date:8 7 6 5 4 3

Document Number

Rev

8I845GE775-GThursday, April 07, 20052

1.0131

Sheet

技嘉主板电路图

<8> SBA[0..7]<8> ST[0..2]<8> GAD[0..31]

SBA[0..7] VDDQ ST[0..2] GAD[0..31] BC171 0.1U/6/Y/25V+12V AGP R735 8.2K/6/X TYPEDETD

VCC

VCC3 VCC

VDDQ

5VSB BC172 0.1U/6/Y/25V/X

<18> AGPCLK

AGPCLK C18 10P/6/N/50V/X

<15> PIRQB<8> GREQ-

PIRQBGREQ<8> ST0<8> ST2 ST0 ST2

<8> RBF-

RBF-

SBA0 SBA2<8> SBSTB SBSTB SBA4 SBA6

SBA5 SBA7 MCH_AGPREF 3VDUAL R59 1K/6/1 BC451 0.1U/6/Y/25V GAD31 GAD29 GAD27 GAD25 GAD23 GAD21 GAD19 GAD30 GAD28 GAD26 GAD24 C21 Close to AGP Slot 470P/6/50V/X<8> ADSTB1 ADSTB1 ADSTB1GCBE3GAD22 GAD20 GAD18 GAD16 GFRAMEGFRAME-<8> ADSTB1-<8> GCBE3-<8><8> GCBE2<8> GIRDYGIRDYGAD17 GCBE2<8> GDEVSELGDEVSELGPERRGSERR<8> GCBE1GCBE1GAD14 GAD12 GAD10 GAD8<8> ADSTB0 ADSTB0 GAD7 GAD5 GAD3 GAD1<8> MCH_AGPREF MCH_AGPREF BC166 0.01U/6/X/50V

B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41

OVRCNT# 5V 5V USB+ GND INTB# CLK REQ# VCC3.3 ST0 ST2 RBF# GND RESV SBA0 VCC3.3 SBA2 SB_STB GND SBA4 SBA6 RESV GND 3VSB VCC3.3 AD31 AD29 VCC3.3 AD27 AD25 GND AD_STB1 AD23 VDDQ3.3 AD21 AD19 GND AD17 C/BE2# VDDQ3.3 IRDY#

12V TYPEDET# RESV USBGND INTA# RST# GNT# VCC3.3 ST1 RESV PIPE# GND WBF# SBA1 VCC3.3 SBA3 SB_STB# GND SBA5 SBA7 RESV GND RESV VCC3.3 AD30 AD28 VCC3.3 AD26 AD24 GND AD_STB1# GC/BE3# VDDQ3.3 AD22 AD20 GND AD18 AD16 VDDQ3.3 FRAME#

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41

PIRQA-AGPRST GGNTST1 ST1<8> PIPEWBFSBA1 SBA3 SBSTB-

PIRQA-<15,19,20,21> -AGPRST<20> GGNT-<8> C19 10000P/6/X/50V/X PIPE-<8> WBF-<8> 470P/6/50V/X BC165 0.1U/6/Y/25V R57 1K/6/1 R58 75/6/1/X VDDQ C20

SBSTB-<8>

R60 75/6/1/X

B46 B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66

DEVSEL# VDDQ3.3 PERR# GND SERR# C/BE1# VDDQ3.3 AD14 AD12 GND AD10 AD8 VDDQ3.3 AD_STB0 AD7 GND AD5

AD3 VDDQ3.3 AD1 VREF_CG

TRDY# STOP# PME# GND PAR AD15 VDDQ3.3 AD13 AD11 GND AD9 C/BE0# VDDQ3.3 AD_STB0 AD6 GND AD4 AD2 VDDQ3.3 AD0 VREF_GCAGP/124/C/PURPLE

A46 A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66

R9 GAD15 GAD13 GAD11 GAD9 GCBE0GAD6 GAD4 GAD2 GAD0

0/6/X

GTRDYGSTOPPCIPMEGPAR

GTRDY-<8> GSTOP-<8> PCIPME-<15,19,20,21,34> GPAR<8> VDDQ GTRDYGDEVSELGSTOPGPERRADSTB0-<8> GIRDYGFRAMERN119 8 6 4 2 8.2K/8P4R/X

GCBE0-<8> ADSTB0-

7 5 3 1R697 R698

8.2K/6/X 8.2K/6/X

VDDQ RN49<8> GPAR GPAR GSERRGAD15 GAD13

7 5 3 1

8 6 4 2

8.2K/8P4R ST2 ST0 ST1 GGNTRN112 8 6 4 2

<8> ST2<8> ST0<8> ST1<8> GGNT-

7 5 3 1

8.2K/8P4R

GIGABYTE Title

AGP SLOTSize Document Number Custom Date:8 7 6 5 4 3

Rev

8I845GE775-GSheet 141

1.0of 36

Thursday, April 07, 20052

技嘉主板电路图

A_D[0..31]

<19,20,21,34> U10B<24><24><24><24><24><24><24><24><34><34><34><34> USBP0+ USBP0USBP1+ USBP1USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5<24,34> USBOCUSBP0+ USBP0USBP1+ USBP1USBP2+ USBP2USBP3+ USBP3USBP4+ USBP4USBP5+ USBP5USBOCC20 D20 A21 B21 C18 D18 A19 B19 C16 D16 A17 B17 B15 C14 A15 B14 A14 D14 J20 G22 F20 G20 F21 H20 F23 H22 G23 H21 F22 E23 F19 L19 L20 M19 M21 P19 R19 T20 R20 P23 L22 N22 K21 P21 N20 R23 R22 M23 T21 A10 A9 A11 B10 C10 A12 B11 C11 HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 HL11 HLSTBS HLSTBF HLRCOMP_I HL_SWING HUBREF ICH3V66 HL[0..10] HL[0..10]<8>

HL_SWING HUBREF BC173 0.01U/6/X/50V BC174 0.01U/6/X/50V

U10D<14,19,20,21> PIRQA<14> PIRQB<19,20,21> PIRQCD

<19,20,21,34> PIRQF<19,20,21> PIRQG<19,21><19,20><19,20><19><19><19,34><19,21><19,20><19,20><19><19><19,34> REQ4REQ3REQ2REQ1REQ0REQ5GNT4GNT3GNT2GNT1GNT0GNT5-

PIRQAPIRQBPIRQCPIRQDPIRQEPIRQFPIRQGPIRQHREQ4REQ3REQ2REQ1REQ0REQ5REQAGNT4GNT3GNT2GNT1GNT0GNT5GNTAFRAMEIRDYTRDYDEVSELSTOPPAR PERRPLOCKSERRPCIPMER67 22/6 ICH33

D5 C2 B4 A3 C8 D7 C3 C4 B6 C7 B3 A2 B1 A6 B5 D6 B7 A7 E6 C1 C5 E8 F1 L5 F2 M3 F3 G1 L4 M2 K5 W2 U5 P5

PIRQA# PIRQB# PIRQC# PIRQD# PIRQE#/GPIO2 PIRQF#/GPIO3 PIRG*/GPIO4 PIRQH#/GPIO5 REQ4# REQ3# REQ2# REQ1# REQ0# REQB#/REQ5#/GPIO1 REQA#/GPIO0 GNT4# GNT3# GNT2# GNT1# GNT0# GNT5#/GNTB#/GPIO17 GNTA#*/GPIO16 FRAME# IRDY# TRDY# DEVSEL# STOP# PAR PERR# PLOCK# SERR# PME# PCIRST# PCICLK

<19,20,21,34> FRAME<19,20,21,34> IRDY<19,20,21,34> TRDY<19,20,21,34> DEVSEL<19,20,21,34> STOP<19,20,21,34> PAR<19,20,21,34> PERR<19,20,21> PLOCK<19,20,21,34> SERRC<14,19,20,21,34> PCIPME<8,17,20,22,34> PCIRST<18> ICH33

C22 100P/6/N/50V/X

AC_SDIN0 AC_SDIN1 AC_SDIN2 R71 R72 R73 8.2K/6/X 8.2K/6/X 8.2K/6 C/BE3# C/BE2# C/BE1# C/BE0# N4 M4 K4 J2<18> USBCLK USBCLK CLK48 C_BE3C_BE2C_BE1C_BE0<19,20,21,34><19,20,21,34><19,20,21,34><19,20,21,34>

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

P4 D2 R1 D3 P2 E1 P1 E2 M5 E4 N3 E3 N2 E5 N1 F4 F5 L3 H2 L2 G4 L1 G2 K2 J5 H4 J4 G5 K1 H3 J3 H5

A_D31 A_D30 A_D29 A_D28 A_D27 A_D26 A_D25 A_D24 A_D23 A_D22 A_D21 A_D20 A_D19 A_D18 A_D17 A_D16 A_D15 A_D14 A_D13 A_D12 A_D11 A_D10 A_D9 A_D8 A_D7 A_D6 A_D5 A_D4 A_D3 A_D2 A_D1 A_D0

USBP_0 USBP_0# USBP_1 USBP_1# USBP_2 USBP_2# USBP_3 USBP_3# USBP_4 USBP_4# USBP_5 USBP_5# OC0# OC1# OC2# OC3# OC4# OC5# GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43

HL0 HL1 HL2 HL3 HL4 HL5 HL6 HL7 HL8 HL9 HL10 HL11 HI_STBS/HI_STB HI_STBF/HI_STB# HICOMP HISWING HIREF CLK66 LANRXD0 LANRXD1 LANRXD2 LANTXD0 LANTXD1 LANTXD2 LANRSTSYNC LANCLK

VDDQ R66 62/6 R65 68.1/6/1 BC175 0.1U/6/Y/25V BC176 0.01U/6/X/50V VCORE

HLSTBS<8> HLSTBF<8> HL_SWING<8> HUBREF<8> ICH3V66<18>

<23> GPO35<33> GPO36<33> GPO37

GPO32 TP_G22 GPO34 GPO35 GPO36 GPO37 GPI38 BSEL1 GPI40 GPO41 GPI42 GPO43

Less than 500mils from ICH4

EE_DIN EE_CS EE_SHCLK EE_DOUT

D11 D10 C12 A8

R68 22.6/6/1

B23 A23

USBRBIAS# USBRBIAS

ICH4/S/A1

AC_SYNC AC_SDOUT AC_BITCLK AC_RST# AC_SDIN0 AC_SDIN1 AC_SDIN2

C9 D9 B8 C13 D13 A13 B13

R69 R70

33/6 33/6 BIT_CLK SOUND_RSTAC_SDIN0 AC_SDIN1 AC_SDIN2

SYNC SDATA_OUT

SYNC<28> SDATA_OUT<28> BIT_CLK<28> SOUND_RST-<28> AC_SDIN0<28>

ICH4/S/A1

VCC3 0.1U/6/Y/25V BC177 0.1U/6/Y/25V VCC3 BC178 0.1U/6/Y/25V/X BC179

3VDUAL

VDDQ

1_5VSTR ICH5VREF

5VSB VCC3 VCC3 R4 R5 8.2K/6/X 8.2K/6/X GPI42 GPO43 THRMOGPO21 GPI6 PIRQBPIRQHPIRQDGNTAPIRQE<16> GPO18<16> GPO19<16,22> SERIRQ<16> GPO20 GPO18 GPO19 SERIRQ GPO20 GPO34 GPO36 GPO37 GPI38 VCC<17> GPO32 VCC3 R74 1K/6 ICH5VREF 1N5817/S REQAGPO41 GPO32 BSEL1 RN54 2 8.2K/8P4R 4 6 8 2 8.2K/8P4R 4 6 8 2 8.2K/8P4R 4 6 8 2 8.2K/8P4R 4 6 8 8.2K/6 8.2K/6 8.2K/6 8.2K/6/X 8.2K/6/X VCC3

BC181 0.1U/6/Y/25V

BC182 BC184 0.1U/6/Y/25V 0.1U/6/Y/25V

BC185 0.1U/6/Y/25V

BC186 BC187 0.1U/6/Y/25V 0.1U/6/Y/25V

BC188 0.1U/6/Y/25V

BC189 0.1U/6/Y/25V VCC3

<16,22> THRMO<16,17> GPO21<16,23> GPI6

1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7

3VDUAL

VDDQ

1_5VSTR

VCORE

VDDQ R75 8.2K/6/X

RN55

A5 B2 H6 J1 K6 M10 P6 U1 P12 V10 V16 V18 AC8 AC17 H18 J18

P14 U18 AA23

K10 K12 K18 K22 P10 T18 V14 U19 L23 M14 P18 T22

F6 F7 E12 R6 T6 U6 G18 E13 F14 E20

E9 F9 E11 F10 V9 V8 V7 F15 F16 F17 F18 K14

E15

C22

GPI40 U10E BC190 0.1U/6/Y/25V BC191 0.01U/6/X/50V R1206 8.2K/6/X RN56

VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCC1_5 VCCHI0 VCCHI1 VCCHI2 VCCHI3

V5REF1 V5REF2

E7 V6

V_CPU_IO V_CPU_IO V_CPU_IO

VCCSUS1_5/VCCLAN1_5 VCCSUS1_5/VCCLAN1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5 VCCSUS1_5

VCCUS3_3/VCCLAN3_3 VCCUS3_3/VCCLAN3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3 VCCUS3_3

V5REF_SUS

VCCPLL

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

RN57

D22 AC23 AC18 AC14 AC10 AC5 AC1 AB20 AB7 AA22 AA16 AA12 T1 V3 AA3 W5 Y7 W8 AA9 V15

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS V

SS VSS VSS VSS VSS

D1 C23 C21 C19 C17 C15 C6 B22 B20 B18 B16 B12 B9 A22 A20 A18 A16 A4 A1 D4

R77 R559 R125 R409 R410

3VDUAL PCIPMEGPO28 GPO27 GPO25 RN58 7 8.2K/8P4R 5 3 1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

V17 R18 T19 Y19 W22 M20 P20 R21 R5 T23 P22 P13 P11 P3 N23 N21 N19 N14 N13 N12 N11 N10 N5 M13 M12 M11 M1 M22 L21 L14 L13 L12 L11 L10 K23 U20 K19 K13 K11 K3 J6 H1 G21 G19 G6 G3 F8 E22 E21 E19 E18 E17 E16 E14 E10 D23 D21 D19 D17 D15 D12 D8

ICH4/S/A1

<16,23> GPO28<16,23> GPO27<16,23> GPO25

8 6 4 2

GIGABYTE Title

ICH4 1/2Size Document Number Custom Date:8 7 6 5 4 3 2

Rev

8I845GE775-GSheet 151

1.0of 36

Thursday, April 07, 2005

技嘉主板电路图

RTCVDD

RTCVDD<22>

R79 82K/6

1K/6

VBAT<22> RTCRST-

R81 C23 1U/6/Y/10V 3VDUAL Q125 BAT54C/S R80D

1K/6 C26 R85 1K/6 VBIAS 0.047U/6/Y/25V

C24 1U/6/Y/10V/X

C25 1U/6/Y/10VD

RTCRST-

4 1

7 6 NC 3

RTCRSTCLR_CMOS PH/1*2/BLACK/1-2

CLR_CMOS SHORT Clear CMOS Normal<25> PDD[0..15]

U10C PDD[0..15] PDD15 PDD14 PDD13 PDD12 PDD11 PDD10 PDD9 PDD8 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 Y11 W11 W10 AB10 W9 AC9 Y9 AB9 AA8 Y8 AB8 AA7 AA10 Y10 AC11 AB11 W12 Y12 AA11 AC12 AB12 AA13 AB13 W13 Y13 AB14 PDD15 PDD14 PDD13 PDD12 PDD11 PDD10 PDD9 PDD8 PDD7 PDD6 PDD5 PDD4 PDD3 PDD2 PDD1 PDD0 SDD15 SDD14 SDD13 SDD12 SDD11 SDD10 SDD9 SDD8 SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0 Y17 AA17 Y16 AB16 Y15 AA15 AC15 Y14 AA14 W14 AB15 W15 AC16 W16 AB17 W17 SDD15 SDD14 SDD13 SDD12 SDD11 SDD10 SDD9 SDD8 SDD7 SDD6 SDD5 SDD4 SDD3 SDD2 SDD1 SDD0 SDD[0..15] SDD[0..15]<25>

BAT BAT-SK/H

OPEN

<6,23> SYS_RST<15,23> GPI6<22> LPCPMEC

SYS_RSTGPI6 GPI7 LPCPMEGPI12 GPI13

<15><15><15><15,17>

GPO18 GPO19 GPO20 GPO21

<15,23> GPO25<15,23> GPO27<15,23> GPO28<18,22,33> SLP_S3-

GPO18 GPO19 GPO20 GPO21 GPO22 GPO23 GPO24 GPO25 GPO27 GPO28

U10A R2 R3 V4 AGPBUSY#/GPIO6 GPIO7 GPIO8 GPIO12 GPIO13 APICCLK APICD_0 APICD_1 J19 H19 K20 R86 R87 8.2K/6 8.2K/6 V5 W3 Y21 W18 W19 T3 Y20 J21 AC2 V2 W1 W4 STP_PCI#/GPIO18 SLP_S1#/GPIO19 STP_CPU#/GPIO20 C3_STAT#/GPIO21 CPUREF#/GPIO22 SSMUXSEL/GPIO23 CLOKRUN#/GPIO24 GPIO25 GPIO27 GPIO28 STPCLK# A20M# CPUSLP# CPUPWRGD INTR NMI SMI# IGNNE# A20GATE RCIN# FERR# INIT# SERIRQ SLP_S3# SLP_S4# SLP_S5# RI# PWRBTN# SYS_RST# LANRST# BATLOW#/TP0 SUS_STAT#/LPCPD# VGATE/VRMPWRGD THERMTRIP# THRM# SMILINK0 SMLINK1 SMBDATA SMBCLK SMBALERT#/GPIO11 SPKR CLK14 LFRAME*/FWH4 LDRQ0# LDRQ1# LAD0/FWH0 LAD1/FWH1 LAD2/FWH2 LAD3/FWH3 SUSCLK INTRUDER# RTCRST# PWROK RSMRST# VCCRTC VBIAS RTCX1 RTCX2 DPRSLPVR NC ICH4/S/A1 C28 18P/6/N/50V C29 18P/6/N/50V BC195 1U/6/Y/10V/X VCC3 BC196 0.1U/6/Y/25V BC197 0.1U/6/Y/25V/X BC198 0.1U/6/Y/25V V23 AB23 U21 Y23 AB22 V21 W23 W21 Y22 U22 AA21 V22 J22 T5 U3 U4 T2 R4 T4 U2 AA4 SUSCLK 330K/6 PWROK<8,18,20,23> RSMRST-

<33> R102 R104 10M/6 10M/6 RTCVDD BC194 0.01U/6/X/50V BC193 0.1U/6/Y/25V LFRAMELDRQ0LDRQ1-STPCLK -A20M -CPUSLP CPUPWROK INTR NMI -SMI -IGNNE A20GATE KBRST-FERR HINITSERIRQ -STPCLK<6> -A20M<6> -CPUSLP<6> CPUPWROK<6> INTR<6> NMI<6> -SMI<6> -IGNNE<6> A20GATE<22> KBRST-<22> -FERR<6> HINIT-<4,17> SERIRQ<15,22> VCC3<25> PDIOW<25> PDDACK<25> PDDREQ<25> PDIOR<25> PIORDY PDIOWPDDACKPDDREQ PDIORPIORDY PDIOW# PDDACK# PDDREQ PDIOR# PIORDY RDA0 RDA1 RDA2 SDIOW# SDDACK# SDDREQ SDIOR# SIORDY AA18 AB19 AB18 Y18 AC19 AA20 AC20 AC21 SDIOWSDDACKSDDREQ SDIORSIORDY SDA0 SDA1 SDA2 SDIOW-<25> SDDACK-<25> SDDREQ<25> SDIOR-<25> SIORDY<25> SDA[0..2]<25> PDA[0..2] PDA[0..2] PDA0 PDA1 PDA2 SDA0 SDA1 SDA2 SDA[0..2]<25><25> PCS1<25> PCS3PCS1PCS3PDCS1# PDCS3# SDCS1# SDCS3# IRQ14 IRQ15 ICH4/S/A1 LAD0 LAD1 LAD2 LAD3<17,22><17,22><17,22><17,22> AB21 AC22 AC13 AA19 SCS1SCS3IRQ14 IRQ15 SCS1-<25> SCS3-<25> IRQ14<25> IRQ15<25> R641 LAD0 LAD1 LAD2 LAD3 LFRAME-<17,22> LDRQ0-<22> 8.2K/6/X AC3 AB1 AB4 AC4 AA5 H23 J23 R101 W6 INTRUDER RTCRSTW7 PWROK AB6 RSMRSTAA6 RTCVDD AB5 VBIAS Y6 AC7 AC6 V20 U23 DPRSLPVR X1 32.768K/12.5P/20PPM/40K/TF38 VCC3

SLP_S3Y4 R733 0/S6/X Y2 R734 0/6/X AA2<23,33> S4_S5RIY1<27> RIPWRBTSW AA1<22> PWRBTSW R99 SYS_RSTY3 3VDUAL 1K/6 LAN_RSTY5 BATLOW AB2 SUSTATAB3 R100 VRMPWRGD V19 VCORE 62/6 W20<6> -THRMTRIP THRMOV1<15,22> THRMO-

<12,13,18,34> SMBDATA<12,13,18,34> SMBCLK<23> SPKR VCC3<18> ICHCLK14

SMBDATA SMBCLK GPI11 SPKR R103 1K/6/X ICHCLK14 C27 10P/6/N/50V/X

VCORE

R84

62/6

-FERR VRMPWRGD R107 3VDUAL BATLOW VCC3 LAN_RSTSMBDATA SMBCLK SUSCLK GPO24 RIGPI11 SUSTATSLP_S3S4_S5LPCPMER119 R120 R121 R122 R123 R127 R403 R190 R192 R649 8.2K/6 RSMRSTR109 R113 220K/6 22K/6 RN113 1 3 5 7 PWROK R108 8.2K/6 8.2K/6 3VDUAL

GPI7 DPRSLPVR GPI12

R117 R128 R118 R110

8.2K/6/X 8.2K/6 8.2K/6/X 8.2K/6

2 4 6 8

RN59<22> A20GATE<22> KBRSTGPO23 A20GATE KBRSTGPO22 7 5 3 1 8 6 4 2

VCC3

<22> LPCPME-

8.2K/8P4R 8.2K/6 8.2K/6 8.2K/6 8.2K/6/X 8.2K/6/X 8.2K/6 8.2K/6/X 8.2K/6 8.2K/6/X

GIGABYTE Title

8.2K/8P4R GPI13 PWROK C30 10P/6/N/50V/X

ICH4 2/2Size Document Number Custom Date: Thursday, April 07, 20052

Rev

8I845GE775-GSheet 161

1.0of 36

技嘉主板电路图

VCC3 R129 8.2K/6D D

MHINIT-

VCORE R131 8.2K/6

Q4 MMBT2222A/S

SOT23 VCC3

VCC3

PCIRST<4,16> HINITHINITBC200 0.1U/6/Y/25V BC199 0.1U/6/Y/25V C31 1000P/6/X/50V

U12 RN60

1 3 5 7

2 4 6 8

<8,15,20,22,34> PCIRST-

8.2K/8P4R

VCC3<15,16> GPO21 P66DET<25> S66DET<25>

R134

8.2K/6/X

VPP PCIRSTFGPI3 FGPI2 FGPI1 FGPI0 FWPTBLLOCK1

R135 8.2K/6/X

<16,22> LAD0<16,22> LAD1<16,22> LAD2

LAD0 LAD1 LAD2

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

VPP RST# FGPI3 FGPI2 FGPI1 FPGI0 WP# TBL# ID3 ID2 ID1 ID0 FWH0 FWH1 FWH2 GND

VCC CLK FGPI4 IC(VIL) GND VCC GND VCC INIT# FWH4 RFU RFU RFU RFU RFU FWH3

32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

FWH33 FGPI4 IC

FWH33<18> R132 R133

8.2K/6 8.2K/6

MHINITLFRAME-

LFRAME-<16,22>

LAD3

<15> GPO32

R130

8.2K/6

FWP-

LAD3<16,22>

SST49LF003A_3M/SMD

BIOS_WP 1 2 3

JP1X3/H/X 1-2: WRITE PROTECT 2-3: DISABLE

VCCB B

RN70 470/8P4R FDD

8 6 4 2

R222 470/6

1 3 7 9 11 13 15 17 19 21 23 25 27 29 31 33

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34FDD/N/BLACK

7 5 3 1

DENSEL-<22> INDEX-<22> MOTEA-<22> DRVB-<22> DRVA-<22> MOTEB-<22> DIR-<22> STEP-<22> WDATA-<22> WGATE-<22> TK00-<22> WPT-<22> RDATA-<22> SIDE1-<22> DSKCHG-<22>

GIGABYTE Title

FWHSize B Date:8 7 6 5 4 3

Document Number

Rev

8I845GE775-GThursday, April 07, 20052

1.0171

Sheet

技嘉主板电路图

VCC3 FB4

CKVDD

BC201 0.1U/6/Y/25V

1/8 BC202 1U/6/Y/10V/X MTS

R136 1K/6/X MULTISEL1 R137 1K/6

R691 1K/6/X

R692 1K/6/X

MODE R693 1K/6 R694 1K/6

IREF CN1 LPC48 USBCLK DOTCLK R138 475/6/1

1U/6/Y/10V BC203 BC204

0.1U/6/Y/25V BC205 BC206

0.1U/6/Y/25V BC207 BC208

0.1U/6/Y/25V BC209 BC210 BC211

1 3 5 7

2 4 6 8

10P/8P4C/X CPUCLK CPUCLKMCHCLK MCHCLKPCLK5 LANCLK C38 C39 C43 C44 C215 C216 CN2 AGPCLK U52 10P/6/N/50V/X 10P/6/N/50V/X 10P/6/N/50V/X 10P/6/N/50V/X 10P/6/N/50V/X 22P/6/N/50V/X

1U/6/Y/10V

0.1U/6/Y/25V

2 9 18 24 32 34 39 46 5 13 21 29 33 36 43 47 3 4<12,13,16,34> SMBDATA<12,13,16,34> SMBCLK<16,22,33> SLP_S3SMBDATA SMBCLK D4 VCC3 1N4148/S CKVDD R156 R154 R149 1K/6/X 1K/6/X 8.2K/6

VDDREF VDD_PCI VDD_PCI VDD_48MHZ VDD_3V66 VDD_CORE VDD_CPU VDD_MREF GND_PCI GND_PCI GND_48MHz GND_3V66 GND_CORE GND_CPU GND_MREF GND_REF X1 X2 SDATA SCLK

IREF REF0/MULTISEL0 REF1/MULTISEL1

35 48 1

IREF MTS MULTISEL1 FS0 FS1

FS0/48MHz FS1/24_48MHz 3V66_0 3V66_1 3V66_2 3V66_3

22 23 31 30 28 27

R140 R139 R142 R141 R144

22/6 22/6 22/6 22/6 33/6

ICHCLK14 97CLK14 USBCLK DOTCLK LPC48

ICHCLK14<16> 97CLK14<28> USBCLK<15> DOTCLK<9> LPC48<22> AGPCLK<14> ICH3V66<15> GMCH3V66<8> PCLK3<20> PCLK4<20> PCLK2<19> PCLK1<19> PCLK5<21> LANCLK<34> CPUCLK CPUCLKMCHCLK MCHCLK-

ICH3V66 GMCH3V66

1 3 5 7

2 4 6 8

10P/8P4C/X CN4

R145

R146 R147 R148 1K/6/X

33/6 33/6 33/6

AGPCLK ICH3V66 GMCH3V66 PCLK3 PCLK4 PCLK2 PCLK1 PCLK5 LANCLK

FWH33 LPC33 ICH33

1 3 5 7

2 4 6 8

C49

10P/6/N/50V

10P/8P4C/X CN5

14.318M/16P/20PPM/40/49US/D

C50

10P/6/N/50V

FS4/PCI0 PCI1 PCI2 PCI3 PCI4 PCI5 PCI6 CPU0 CPU0# CPU1 CPU1#

10 11 12 14 15 16 17

FS4 PCI1 PCI2 PCI3

R700

PCI2 RN126 1 PCI3 3 PCI1 5 FS4 7 R699 R648 1K/6/X RN63 1 3 5 7

2 33/8P4R 4 6 8 33/6 22/6

PCLK3 PCLK4 PCLK2 PCLK1

1 3 5 7

2 4 6 8

10P/8P4C/X

25 26 42 44 45 19

41 40 38 37 6 7 8 20FS2 FS3 MODE

2 33/8P4R 4 6 8 2 33/8P4R 4 6 8

CPUCLK CPUCLKMCHCLK MCHCLKFWH33 LPC33 ICH33 PWROK

<6><6><8><8>

PWR_DWN# PCI_STOP# CPU_STOP# VTT_PWRGD#

FS2/CPI_F0 FS3/PCI_F1 MODE/PCI_F2 RST#

MODE RN127 1 3 FS2 5 7

FWH33<17> LPC33<22> ICH33<15> PWROK<8,16,20,23>

CPUCLK CPUCLKMCHCLK

R150 R151 R152 R153

51.1/6/1 51.1/6/1 51.1/6/1 51.1/6/1

VCC3

RTM360-110R R704 8.2K/6/X MCHCLK-

R155 8.2K/6 CKVDDB

CKVDD Q5 MMBT2222A/S

R158 VCORE 220/6 R157 1K/6/X

FS0

R159 R705 R706 R707

8.2K/6 8.2K/6 8.2K/6 8.2K/6

SOT23 FS3 FS2 FS4 CKVDD

R163 1K/6

<6> BSEL0

BSEL0

R161

1K/6

FS1

R162

8.2K/6 R164 8.2K/6

FSBSEL

FSBSEL<9>

GIGABYTE Title

CLOCK GENERATORSize Document Number Custom Date:5 4 3 2

Rev

8I845GE775-GSheet1

1.018 of 36

Thursday, April 07, 2005

技嘉主板电路图

-12V

VCC

VCC3

+12V

-12V

VCC

VCC3

+12V

PCI1

PCI2

<15,20,21,34> PIRQF<14,15,20,21> PIRQA-

PIRQFPIRQA-

<18> PCLK1<15> REQ0-

PCLK1 REQ0A_D31 A_D29 A_D27 A_D25

<15,20,21,34> C_BE3-

<15,20,21,34> C_BE2<15,20,21,34> IRDY-

<15,20,21,34> DEVSEL-

<15,20,21> PLOCK<15,20,21,34> PERR<15,20,21,34> SERR-

A_D27 A_D25 A_D24 A_D22 A_D20 A_D18 A_D16 A_D24 A_D22 A_D20 A_D18 A_D16 C_BE3A_D23 A_D21 A_D19 A_D16 C_BE3A_D23 A_D21 A_D19 A_D17+12V A_D17 C_BE2IRDYA_D17 C_BE2IRDYFRAMETRDYFRAME-<15,20,21,34> TRDY-<15,20,21,34> STOP-<15,20,21,34> BC216 BC217 0.1U/6/Y/25V/X 10000P/6/X/50V/X FRAMETRDYDEVSELDEVSELSTOPSTOPPLOCKPERRSERRC_BE1A_D14 A_D12 A_D10 PLOCKPERRSERRPAR A_D15 A_D13 A_D11 A_D9 C_BE0A_D6 A_D4 A_D2 A_D0 R165 8.2K/6 VCC BC212 BC213 0.1U/6/Y/25V/X 10000P/6/X/50V/X A_D8 A_D7 A_D5 A_D3 A_D1 ACK64 PAR<15,20,21,34> -12V A_D12 A_D10 C_BE1A_D14 PAR A_D15 A_D13 A_D11 A_D9 C_BE0A_D6 A_D4 A_D2 A_D0 R166 8.2K/6 VCC A_D8 A_D7 A_D5 A_D3 A_D1 ACK64

<15,20,21,34> C_BE1-

B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 B47 B48 B49 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62

-12V TCK GND TDO+5V+5V INTB INTD PRSNT1 RESERVED PRSNT2 GND GND RESERVED GND CLK GND REQ+5V AD31 AD29 GND AD27 AD25+3.3V C/BE3 AD23 GND AD21 AD19+3.3V AD17 C/BE2 GND IRDY+3.3V DEVSEL GND LOCK PERR+3.3V SERR+3.3V C/BE1 AD14 GND AD12 AD10 GND AD8 AD7+3.3V AD5 AD3 GND AD1+5V ACK64+5V+5V

TRST+12V TMS TDI+5V INTA INTC+5V RESERVED+5V RESERVED GND GND 3.3V_AUX RST+5V GNT GND PME AD30+3.3V AD28 AD26 GND AD24 IDSEL+3.3V AD22 AD20 GND AD18 AD16+3.3V FRAME GND TRDY GND STOP+3.3V SDONE SBO GND PAR AD15+3.3V AD13 AD11 GND AD9 C/BE0+3.3V AD6 AD4 GND AD2 AD0+5V REQ64+5V+5VPCI

A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 A47 A48 A49 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62

PIRQCPIRQG-

PIRQC-<15,20,21> PIRQG-<15,20,21>

PIRQGPIRQC-

PCIRST1GNT0PCIPMEA_D30 A_D28 A_D26

3VDUAL PCIRST1-<20,21><18> PCLK2 GNT0-<15><15> REQ1PCIPME-<14,15,20,21,34>

PCLK2 REQ1A_D31 A_D29

-12V TCK GND TDO+5V+5V INTB INTD PRSNT1 RESERVED PRSNT2 GND GND RE

SERVED GND CLK GND REQ+5V AD31 AD29 GND AD27 AD25+3.3V C/BE3 AD23 GND AD21 AD19+3.3V AD17 C/BE2 GND IRDY+3.3V DEVSEL GND LOCK PERR+3.3V SERR+3.3V C/BE1 AD14 GND AD12 AD10 GND AD8 AD7+3.3V AD5 AD3 GND AD1+5V ACK64+5V+5V

PIRQFPIRQA-

PCIRST1GNT1PCIPMEA_D30 A_D28 A_D26

3VDUAL

GNT1-<15>

C_BE0-<15,20,21,34>

<20,21> ACK64B

VCC VCC3 VCC3 RN65 A_D[0..31]<15,20><15,20><15,21><15,34> GNT3GNT2GNT4GNT5GNT3GNT2GNT4GNT5RN64 1 FRAMEIRDYTRDYDEVSELBC214 0.1U/6/Y/25V/X BC215 0.1U/6/Y/25V+ EC11 1000U/D/6.3V/8E/X

<15,20,21,34> A_D[0..31]

1 3 5 7

2 4 6 8

1 3 5 7

2 4 6 8VCC3

8.2K/8P4R/X VCC3 GNT0PIRQFPIRQAGNT1R167 R168 R169 R170 8.2K/6/X 8.2K/6 8.2K/6 8.2K/6/X STOPPLOCKPERRSERR-

8.2K/8P4R RN66

<15> GNT0<14,15,20,21> PIRQA<15> GNT1A

1 3 5 7

2 4 6 8

8.2K/8P4R VCC

BC218 0.1U/6/Y/25V/X