Cortex-M4在keil下启动文件解析

Stack_Size EQU 0x00000400

定义栈空间大小为0x00000400个字节，即1Kbyte。 AREA STACK, NOINIT, READWRITE, ALIGN=3

AREA指令：伪指令，用于定义代码段或数据段，后跟属性标号。其中比较重要的一个标号为“READONLY”或者“READWRITE”，其中 “READONLY”表示该段为只读属性，具有只读属性的段保存于FLASH区。而 “READWRITE”表示该段为“可读写”属性，可知“可读写”段保存于SRAM区。

由此可以知，堆栈段位于SRAM空间，中断向量表放置与FLASH区，而这也是整片启动代码中最先被放进FLASH区的数据。因此可以得到一条重要的信息？？地址存放的是栈顶地址__initial_sp，？？地址存放的是复位中断向量 Reset_Handler。 K60使用32位总线，因此存储空间为4字节对齐。 Stack_Mem SPACE Stack_Size

开辟一段大小为Stack_size的内存空间作为栈。 __initial_sp

标号__initial_sp,表示栈空间的顶地址。 Heap_Size EQU 0x00000000 定义堆空间大小。

AREA HEAP, NOINIT, READWRITE, ALIGN=3 伪指令AREA。 __heap_base

标号__heap_base，表示堆空间起始地址。 Heap_Mem SPACE Heap_Size

开辟一段大小为Heap_Size的内存空间作为堆。 __heap_limit

标号__heap_limit，表示堆空间的结束地址。 PRESERVE8

告诉编译器以8字节对齐。 THUMB

告诉编译器使用THUMB指令集

AREA RESET, DATA, READONLY

伪指令AREA，定义只读数据区，实际上是在CODE区 EXPORT __Vectors

EXPORT __Vectors_End EXPORT __Vectors_Size

EXPORT，将标号__Vectors，__Vectors_End，__Vectors_Size声明为全局标号，这样外部文件就可以使用这个标号。 __Vectors

标号 __Vectors，表示中断向量的入口地址。 DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler

DCD HardFault_Handler ; Hard Fault Handler DCD MemManage_Handler ; MPU Fault Handler DCD BusFault_Handler ; Bus Fault Handler

DCD UsageFault_Handler ; Usage Fault Handler DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved DCD 0 ; Reserved

DCD SVC_Handler ; SVCall Handler

DCD DebugMon_Handler ; Debug Monitor Handler DCD 0 ; Reserved

DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler 建立内部中断向量表 ; External Interrupts

DCD DMA0_IRQHandler ; DMA Channel 0 Transfer Complete DCD DMA1_IRQHandler ; DMA Channel 1 Transfer Complete DCD DMA2_IRQHandler ; DMA Channel 2 Transfer Complete DCD DMA3_IRQHandler ; DMA Channel 3 Transfer Complete DCD DMA4_IRQHandler ; DMA Channel 4 Transfer Complete DCD DMA5_IRQHandler ; DMA Channel 5 Transfer Complete DCD DMA6_IRQHandler ; DMA Channel 6 Transfer Complete DCD DMA7_IRQHandler ; DMA Channel 7 Transfer Complete DCD DMA8_IRQHandler ; DMA Channel 8 Transfer Complete DCD DMA9_IRQHandler ; DMA Channel 9 Transfer Complete DCD DMA10_IRQHandler ; DMA Channel 10 Transfer Complete DCD DMA11_IRQHandler ; DMA Channel 11 Transfer Complete DCD DMA12_IRQHandler ; DMA Channel 12 Transfer Complete DCD DMA13_IRQHandler ; DMA Channel 13 Transfer Complete DCD DMA14_IRQHandler ; DMA Channel 14 Transfer Complete DCD DMA15_IRQHandler ; DMA Channel 15 Transfer Complete DCD DMA_Error_IRQHandler ; DMA Error Interrupt DCD MCM_IRQHandler ; Normal Interrupt DCD FTFL_IRQHandler ; FTFL Interrupt

DCD Read_Collision_IRQHandler ; Read Collision Interrupt

DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning DCD LLW_IRQHandler ; Low Leakage Wakeup DCD Watchdog_IRQHandler ; WDOG Interrupt DCD RNG_IRQHandler ; RNGB Interrupt DCD I2C0_IRQHandler ; I2C0 interrupt DCD I2C1_IRQHandler ; I2C1 interrupt DCD SPI0_IRQHandler ; SPI0 Interrupt DCD SPI1_IRQHandler ; SPI1 Interrupt DCD SPI2_IRQHandler ; SPI2 Interrupt

DCD CAN0_ORed_Message_buffer_IRQHandler ; CAN0 OR'd Message Buffers Interrupt DCD CAN0_Bus_Off_IRQHandler ; CAN0 Bus Off Interrupt DCD CAN0_Error_IRQHandler ; CAN0 Error Interrupt

DCD CAN0_Tx_Warning_IRQHandler ; CAN0 Tx Warning Interrupt DCD CAN0_Rx_Warning_IRQHandler ; CAN0 Rx Warning Interrupt DCD CAN0_Wake_Up_IRQHandler ; CAN0 Wake Up Interrupt DCD Reserved51_IRQHandler ; Reserved interrupt 51 DCD Reserved52_IRQHandler ; Reserved interrupt 52

DCD CAN1_ORed_Message_buffer_IRQHandler ; CAN1 OR'd Message Buffers Interrupt DCD CAN1_Bus_Off_IRQHandler ; CAN1 Bus Off Interrupt DCD CAN1_Error_IRQHandler ; CAN1 Error Interrupt

DCD CAN1_Tx_Warning_IRQHandler ; CAN1 Tx Warning Interrupt DCD CAN1_Rx_Warning_IRQHandler ; CAN1 Rx Warning Interrupt DCD CAN1_Wake_Up_IRQHandler ; CAN1 Wake Up Interrupt DCD Reserved59_IRQHandler ; Reserved interrupt 59 DCD Reserved60_IRQHandler ; Reserved interrupt 60

DCD UART0_RX_TX_IRQHandler ; UART0 Receive/Transmit interrupt DCD UART0_ERR_IRQHandler ; UART0 Error interrupt

DCD UART1_RX_TX_IRQHandler ; UART1 Receive/Transmit interrupt DCD UART1_ERR_IRQHandler ; UART1 Error interrupt

DCD UART2_RX_TX_IRQHandler ; UART2 Receive/Transmit interrupt DCD UART2_ERR_IRQHandler ; UART2 Error interrupt

DCD UART3_RX_TX_IRQHandler ; UART3 Receive/Transmit interrupt DCD UART3_ERR_IRQHandler ; UART3 Error interrupt

DCD UART4_RX_TX_IRQHandler ; UART4 Receive/Transmit interrupt DCD UART4_ERR_IRQHandler ; UART4 Error interrupt

DCD UART5_RX_TX_IRQHandler ; UART5 Receive/Transmit interrupt DCD UART5_ERR_IRQHandler ; UART5 Error interrupt DCD ADC0_IRQHandler ; ADC0 interrupt DCD ADC1_IRQHandler ; ADC1 interrupt DCD CMP0_IRQHandler ; CMP0 interrupt DCD CMP1_IRQHandler ; CMP1 interrupt DCD CMP2_IRQHandler ; CMP2 interrupt

DCD FTM0_IRQHandler ; FTM0 fault, overflow and channels interrupt DCD FTM1_IRQHandler ; FTM1 fault, overflow and channels interrupt DCD FTM2_IRQHandler ; FTM2 fault, overflow and channels interrupt DCD CMT_IRQHandler ; CMT interrupt DCD RTC_IRQHandler ; RTC interrupt

DCD Reserved83_IRQHandler ; Reserved interrupt 83 DCD PIT0_IRQHandler ; PIT timer channel 0 interrupt DCD PIT1_IRQHandler ; PIT timer channel 1 interrupt DCD PIT2_IRQHandler ; PIT timer channel 2 interrupt DCD PIT3_IRQHandler ; PIT timer channel 3 interrupt DCD PDB0_IRQHandler ; PDB0 Interrupt DCD USB0_IRQHandler ; USB0 interrupt

DCD USBDCD_IRQHandler ; USBDCD Interrupt

DCD ENET_1588_Timer_IRQHandler ; Ethernet MAC IEEE 1588 Timer Interrupt

DCD ENET_Transmit_IRQHandler ; Ethernet MAC Transmit Interrupt DCD ENET_Receive_IRQHandler ; Ethernet MAC Receive Interrupt

DCD ENET_Error_IRQHandler ; Ethernet MAC Error and miscelaneous Interrupt DCD I2S0_IRQHandler ; I2S0 Interrupt DCD SDHC_IRQHandler ; SDHC Interrupt DCD DAC0_IRQHandler ; DAC0 interrupt DCD DAC1_IRQHandler ; DAC1 interrupt DCD TSI0_IRQHandler ; TSI0 Interrupt DCD MCG_IRQHandler ; MCG Interrupt

DCD LPTimer_IRQHandler ; LPTimer interrupt

DCD Reserved102_IRQHandler ; Reserved interrupt 102 DCD PORTA_IRQHandler ; Port A interrupt DCD PORTB_IRQHandler ; Port B interrupt DCD PORTC_IRQHandler ; Port C interrupt DCD PORTD_IRQHandler ; Port D interrupt DCD PORTE_IRQHandler ; Port E interrupt

DCD Reserved108_IRQHandler ; Reserved interrupt 108 DCD Reserved109_IRQHandler ; Reserved interrupt 109 DCD Reserved110_IRQHandler ; Reserved interrupt 110 DCD Reserved111_IRQHandler ; Reserved interrupt 111 DCD Reserved112_IRQHandler ; Reserved interrupt 112 DCD Reserved113_IRQHandler ; Reserved interrupt 113 DCD Reserved114_IRQHandler ; Reserved interrupt 114 DCD Reserved115_IRQHandler ; Reserved interrupt 115 DCD Reserved116_IRQHandler ; Reserved interrupt 116 DCD Reserved117_IRQHandler ; Reserved interrupt 117 DCD Reserved118_IRQHandler ; Reserved interrupt 118 DCD Reserved119_IRQHandler ; Reserved interrupt 119 建立外部中断向量表 __Vectors_End

标号__Vectors_End，表示中断向量表的结束地址。 __Vectors_Size EQU __Vectors_End - __Vectors 标号__Vectors_Size，表示中断向量表空间的大小。

BackDoorK0 EQU 0xFF BackDoorK1 EQU 0xFF BackDoorK2 EQU 0xFF BackDoorK3 EQU 0xFF BackDoorK4 EQU 0xFF BackDoorK5 EQU 0xFF BackDoorK6 EQU 0xFF BackDoorK7 EQU 0xFF nFPROT0 EQU 0x00

FPROT0 EQU nFPROT0:EOR:0xFF

nFPROT1 EQU 0x00

FPROT1 EQU nFPROT1:EOR:0xFF nFPROT2 EQU 0x00

FPROT2 EQU nFPROT2:EOR:0xFF nFPROT3 EQU 0x00

FPROT3 EQU nFPROT3:EOR:0xFF nFDPROT EQU 0x00

FDPROT EQU nFDPROT:EOR:0xFF nFEPROT EQU 0x00

FEPROT EQU nFEPROT:EOR:0xFF FOPT EQU 0xFF FSEC EQU 0xFE IF :LNOT::DEF:RAM_TARGET

AREA |.ARM.__at_0x400|, CODE, READONLY

DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7 DCB FPROT0, FPROT1, FPROT2, FPROT3 DCB FSEC, FOPT, FEPROT, FDPROT ENDIF

IF?ENDIF为预编译结构，判断是否使用外部SRAM，在第1行中已定义为“不使用”。 AREA |.text|, CODE, READONLY 伪指令AREA。 Reset_Handler PROC

EXPORT Reset_Handler [WEAK] IMPORT SystemInit 声明SystemInit标号

IMPORT __main 声明__main标号

LDR R0, =SystemInit BLX R0

LDR R0, =__main BX R0 ENDP

NMI_Handler PROC

EXPORT NMI_Handler [WEAK] B . ENDP HardFault_Handler\\

PROC

EXPORT HardFault_Handler [WEAK] B . ENDP MemManage_Handler\\

PROC

EXPORT MemManage_Handler [WEAK] B . ENDP BusFault_Handler\\

PROC

EXPORT BusFault_Handler [WEAK] B . ENDP UsageFault_Handler\\

PROC

EXPORT UsageFault_Handler B . ENDP SVC_Handler PROC

EXPORT SVC_Handler B . ENDP DebugMon_Handler\\

PROC

EXPORT DebugMon_Handler B . ENDP PendSV_Handler PROC

EXPORT PendSV_Handler B . ENDP SysTick_Handler PROC

EXPORT SysTick_Handler B . ENDP Default_Handler PROC

EXPORT DMA0_IRQHandler EXPORT DMA1_IRQHandler EXPORT DMA2_IRQHandler EXPORT DMA3_IRQHandler EXPORT DMA4_IRQHandler EXPORT DMA5_IRQHandler EXPORT DMA6_IRQHandler EXPORT DMA7_IRQHandler EXPORT DMA8_IRQHandler EXPORT DMA9_IRQHandler EXPORT DMA10_IRQHandler EXPORT DMA11_IRQHandler [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK] [WEAK]

EXPORT DMA12_IRQHandler [WEAK] EXPORT DMA13_IRQHandler [WEAK] EXPORT DMA14_IRQHandler [WEAK] EXPORT DMA15_IRQHandler [WEAK] EXPORT DMA_Error_IRQHandler [WEAK] EXPORT MCM_IRQHandler [WEAK] EXPORT FTFL_IRQHandler [WEAK]

EXPORT Read_Collision_IRQHandler [WEAK] EXPORT LVD_LVW_IRQHandler [WEAK] EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT LLW_IRQHandler [WEAK] Watchdog_IRQHandler [WEAK] RNG_IRQHandler [WEAK] I2C0_IRQHandler [WEAK] I2C1_IRQHandler [WEAK] SPI0_IRQHandler [WEAK] SPI1_IRQHandler [WEAK] SPI2_IRQHandler [WEAK]

CAN0_ORed_Message_buffer_IRQHandler [WEAK] CAN0_Bus_Off_IRQHandler [WEAK] CAN0_Error_IRQHandler [WEAK]

CAN0_Tx_Warning_IRQHandler [WEAK] CAN0_Rx_Warning_IRQHandler [WEAK] CAN0_Wake_Up_IRQHandler [WEAK] Reserved51_IRQHandler [WEAK] Reserved52_IRQHandler [WEAK]

CAN1_ORed_Message_buffer_IRQHandler [WEAK] CAN1_Bus_Off_IRQHandler [WEAK] CAN1_Error_IRQHandler [WEAK]

CAN1_Tx_Warning_IRQHandler [WEAK] CAN1_Rx_Warning_IRQHandler [WEAK] CAN1_Wake_Up_IRQHandler [WEAK] Reserved59_IRQHandler [WEAK] Reserved60_IRQHandler [WEAK]

UART0_RX_TX_IRQHandler [WEAK] UART0_ERR_IRQHandler [WEAK] UART1_RX_TX_IRQHandler [WEAK] UART1_ERR_IRQHandler [WEAK] UART2_RX_TX_IRQHandler [WEAK] UART2_ERR_IRQHandler [WEAK] UART3_RX_TX_IRQHandler [WEAK] UART3_ERR_IRQHandler [WEAK] UART4_RX_TX_IRQHandler [WEAK] UART4_ERR_IRQHandler [WEAK] UART5_RX_TX_IRQHandler [WEAK]

EXPORT UART5_ERR_IRQHandler [WEAK] EXPORT ADC0_IRQHandler [WEAK] EXPORT ADC1_IRQHandler [WEAK] EXPORT CMP0_IRQHandler [WEAK] EXPORT CMP1_IRQHandler [WEAK] EXPORT CMP2_IRQHandler [WEAK] EXPORT FTM0_IRQHandler [WEAK] EXPORT FTM1_IRQHandler [WEAK] EXPORT FTM2_IRQHandler [WEAK] EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT EXPORT CMT_IRQHandler [WEAK] RTC_IRQHandler [WEAK]

Reserved83_IRQHandler [WEAK] PIT0_IRQHandler [WEAK] PIT1_IRQHandler [WEAK] PIT2_IRQHandler [WEAK] PIT3_IRQHandler [WEAK] PDB0_IRQHandler [WEAK] USB0_IRQHandler [WEAK] USBDCD_IRQHandler [WEAK]

ENET_1588_Timer_IRQHandler [WEAK] ENET_Transmit_IRQHandler [WEAK] ENET_Receive_IRQHandler [WEAK] ENET_Error_IRQHandler [WEAK] I2S0_IRQHandler [WEAK] SDHC_IRQHandler [WEAK] DAC0_IRQHandler [WEAK] DAC1_IRQHandler [WEAK] TSI0_IRQHandler [WEAK] MCG_IRQHandler [WEAK] LPTimer_IRQHandler [WEAK] Reserved102_IRQHandler [WEAK] PORTA_IRQHandler [WEAK] PORTB_IRQHandler [WEAK] PORTC_IRQHandler [WEAK] PORTD_IRQHandler [WEAK] PORTE_IRQHandler [WEAK]

Reserved108_IRQHandler [WEAK] Reserved109_IRQHandler [WEAK] Reserved110_IRQHandler [WEAK] Reserved111_IRQHandler [WEAK] Reserved112_IRQHandler [WEAK] Reserved113_IRQHandler [WEAK] Reserved114_IRQHandler [WEAK] Reserved115_IRQHandler [WEAK]

EXPORT Reserved116_IRQHandler [WEAK] EXPORT Reserved117_IRQHandler [WEAK] EXPORT Reserved118_IRQHandler [WEAK] EXPORT Reserved119_IRQHandler [WEAK]

DMA0_IRQHandler DMA1_IRQHandler DMA2_IRQHandler DMA3_IRQHandler DMA4_IRQHandler DMA5_IRQHandler DMA6_IRQHandler DMA7_IRQHandler DMA8_IRQHandler DMA9_IRQHandler DMA10_IRQHandler DMA11_IRQHandler DMA12_IRQHandler DMA13_IRQHandler DMA14_IRQHandler DMA15_IRQHandler DMA_Error_IRQHandler MCM_IRQHandler FTFL_IRQHandler

Read_Collision_IRQHandler LVD_LVW_IRQHandler LLW_IRQHandler Watchdog_IRQHandler RNG_IRQHandler I2C0_IRQHandler I2C1_IRQHandler SPI0_IRQHandler SPI1_IRQHandler SPI2_IRQHandler

CAN0_ORed_Message_buffer_IRQHandler CAN0_Bus_Off_IRQHandler CAN0_Error_IRQHandler

CAN0_Tx_Warning_IRQHandler CAN0_Rx_Warning_IRQHandler CAN0_Wake_Up_IRQHandler Reserved51_IRQHandler Reserved52_IRQHandler

CAN1_ORed_Message_buffer_IRQHandler CAN1_Bus_Off_IRQHandler

CAN1_Error_IRQHandler

CAN1_Tx_Warning_IRQHandler CAN1_Rx_Warning_IRQHandler CAN1_Wake_Up_IRQHandler Reserved59_IRQHandler Reserved60_IRQHandler

UART0_RX_TX_IRQHandler UART0_ERR_IRQHandler UART1_RX_TX_IRQHandler UART1_ERR_IRQHandler UART2_RX_TX_IRQHandler UART2_ERR_IRQHandler UART3_RX_TX_IRQHandler UART3_ERR_IRQHandler UART4_RX_TX_IRQHandler UART4_ERR_IRQHandler UART5_RX_TX_IRQHandler UART5_ERR_IRQHandler ADC0_IRQHandler ADC1_IRQHandler CMP0_IRQHandler CMP1_IRQHandler CMP2_IRQHandler FTM0_IRQHandler FTM1_IRQHandler FTM2_IRQHandler CMT_IRQHandler RTC_IRQHandler

Reserved83_IRQHandler PIT0_IRQHandler PIT1_IRQHandler PIT2_IRQHandler PIT3_IRQHandler PDB0_IRQHandler USB0_IRQHandler USBDCD_IRQHandler

ENET_1588_Timer_IRQHandler ENET_Transmit_IRQHandler ENET_Receive_IRQHandler ENET_Error_IRQHandler I2S0_IRQHandler SDHC_IRQHandler DAC0_IRQHandler DAC1_IRQHandler

TSI0_IRQHandler MCG_IRQHandler LPTimer_IRQHandler Reserved102_IRQHandler PORTA_IRQHandler PORTB_IRQHandler PORTC_IRQHandler PORTD_IRQHandler PORTE_IRQHandler

Reserved108_IRQHandler Reserved109_IRQHandler Reserved110_IRQHandler Reserved111_IRQHandler Reserved112_IRQHandler Reserved113_IRQHandler Reserved114_IRQHandler Reserved115_IRQHandler Reserved116_IRQHandler Reserved117_IRQHandler Reserved118_IRQHandler Reserved119_IRQHandler B . ENDP ALIGN

IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE

IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap

LDR R0, = Heap_Mem

LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

TSI0_IRQHandler MCG_IRQHandler LPTimer_IRQHandler Reserved102_IRQHandler PORTA_IRQHandler PORTB_IRQHandler PORTC_IRQHandler PORTD_IRQHandler PORTE_IRQHandler

Reserved108_IRQHandler Reserved109_IRQHandler Reserved110_IRQHandler Reserved111_IRQHandler Reserved112_IRQHandler Reserved113_IRQHandler Reserved114_IRQHandler Reserved115_IRQHandler Reserved116_IRQHandler Reserved117_IRQHandler Reserved118_IRQHandler Reserved119_IRQHandler B . ENDP ALIGN

IF :DEF:__MICROLIB EXPORT __initial_sp EXPORT __heap_base EXPORT __heap_limit ELSE

IMPORT __use_two_region_memory EXPORT __user_initial_stackheap __user_initial_stackheap

LDR R0, = Heap_Mem

LDR R1, =(Stack_Mem + Stack_Size) LDR R2, = (Heap_Mem + Heap_Size) LDR R3, = Stack_Mem BX LR ALIGN ENDIF END

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